# ECEN 301 Lecture #25

AI and Robotics

Nov 24, 2013 (4 years and 5 months ago)

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Discussion #25

ECEN 301

1

Conversion

Mosiah 5:2

2 And they all cried with one voice, saying: Yea, we
believe all the words which though has spoken unto
us; and also, we know of their surety and truth,
because of the Spirit of the Lord Omnipotent, which as
wrought a
mighty change

in us, or in our hearts, that
we have more disposition to do evil, but to do good
continually.

Discussion #25

ECEN 301

2

Lecture 25

Analog to Digital

Discussion #25

ECEN 301

3

Sensors are generally
analog
, but most signal processing devices
(appliances, computers, etc.) are
digital

thus there must be a conversion

coming into a device

Digital to analog (DAC)

going out of a device

Device

DAC

Digital

Analog

Analog

Actuator

Sensor

Discussion #25

ECEN 301

Discussion #24

DAC

4

DAC

Digital

Analog

Analog

001110011…

2.23094…

2.23094…

Sensors are generally
analog
, but most signal processing devices (appliances,
computers, etc.) are
digital

thus there must be a conversion

coming into a device

Digital to analog (DAC)

going out of a device

Discussion #25

ECEN 301

5

: converts an analog voltage or current into a
binary

word

Word length (n)
: the number of bits in the
sequence of
1
s and
0
s representing an output

EX:

0110

4
-
bit word length

100101

6
-
bit word length

Binary word (B)
: a sequence of n
1
s and
0
s

B

=
b
n
-
1
b
n
-
2
…b
2
b
1
b
0

EX:

B = 10100101 (n = 8)

Note: many
convert positive
or negative
values

Discussion #25

ECEN 301

6

: converts an analog voltage or current into a
binary

word

Resolution
δ
v
: minimum step size by which the
output voltage (or current) can increment

Input voltage v
a
: the analog value represented by
the binary word
B

EX: let n=4 (number of bits)

v
a

= (
2
3
∙b
3

+
2
2
∙b
2

+ 2
1
∙b
1

+ 2
0
∙b
0
)
δ
v

Max input voltage v
aMax
: the maximum analog
value

EX: let n=4
(number of bits)

v
aMax

= (2
3

+
2
2

+ 2
1

+ 2
0
)
δ
v

= (2
n

1)
δ
v

Example
:
δ
v
= 1V,
B

= 10110 (n = 5)

Find
v
aMax

and
v
a

v
aMax

=
(2
n

1)

δ
v

=

(2
5

1)

1

=

31

v
a
=
(2
4
∙b
4
+
2
3
∙b
3

+
2
2
∙b
2

+ 2
1
∙b
1

+ 2
0
∙b
0
)
δ
v

=
(16
∙1 + 8∙0 + 4∙1 + 2∙1 + 1∙0) ∙ 1

= (16 + 4 + 2)

= 22

Discussion #25

Op Amp Comparator

An op amp without feedback is a binary comparator

Rail
-
to
-
rail output swing

Simple one
-
bit analog to digital converter

v
v
v
v
v
v
A
v
OL
o
5
5
)
(
:
Model

Loop
-
Open

From

+

v
o

v
+

v

v
ref

+

v
input

Positive power supply (+5V)

Negative power supply (

5V)

V
S
+

V
S

Discussion #25

Quantization

Analog representation by a binary value results in
quantization of the value

v
d

b
3

b
2

b
1

b
0

0

0

0

0

0

1
0

0

0

1

2
0

0

1

0

3
0

0

1

1

14
1

1

1

0

15
1

1

1

1

Binary

representation

Quantized

voltage

0

2

4

6

8

10

0

2

4

6

8

10

v
in

(volts)

v
out

(volts)

v
v
v
in
out

Quantization
error (
v
out
-
v
in
)
always non
-
positive for
this case

1

v

Discussion #25

ECEN 301

9

Quantization
:

The analog output (
v
a
) has a step
-
like appearance because of the discrete nature
of a binary signal

The
resolution

(coarseness of the “staircase”) can be adjusted by changing the
word length

(the number of bits)

Approximated
using 2
-
bits

Approximated
using 3
-
bits

δ
v

δ
v

Discussion #25

ECEN 301

10

Digital to Analog Converter (DAC)

Comparison of an ADC and DAC

+

+

v
a

R
1

R
n
-
2

R
n
-
1

R
F

R
0

v
in

b
n
-
1

b
n
-
2

b
1

b
0

DAC

Digital
output

+

v
in

+

+

+

+

+

Digital logic encoder

+V

R

R

R

R

R

R

R

Discussion #25

Successive approximation

Takes time, input must remain steady during
conversion

+

v
in

v
ref

DAC

Register &
Control

Logic

Clock

Digital value

output

Conversion

complete

Start

conversion

comparator

Discussion #25

during conversion

Quicker than successive
approximation type

+

v
in

v
ref

DAC

Clock

Digital value

output

Up
-
down

counter

up

down

comparator

Discussion #25

Fast (no sample
-
and
-
hold
required)

Complex

2
N

comparators required

Number of bits limited

+

v
in

+

+

+

+

+

Digital logic encoder

+V

R

R

R

R

R

R

R

Discussion #25

Sample
-
and
-
hold

ADC required constant input voltage during conversion. How
do we guarantee this?

Use sample
-
and
-
hold circuit

Basic idea: store voltage on a capacitor, then hold during conversion

Design caution: capacitor voltage can “droop” during hold

+

v
in

+

v
out

Sample/

hold

voltage

follower

(buffer)

voltage

follower

(buffer)

Storage

capacitor

Discussion #25

ECEN 301

15

Example 1
:
v
in

= 4.1V,
Vref
=5 V, N=4 bits

Find
Dout
and the quantization error

V
V
v
N
ref
333
.
0
)
1
2
(
5
)
1
2
(
4

1100
12
3
.
12
333
.
0
1
.
4

v
Vin
Dout

V
v
Dout
Vin
Qerr
1
.
0
12
333
.
0
1
.
4

Discussion #25

Multiplexing

Time share expensive ADC between channels

ADC has to run at higher rate

Analog

multiplexer

Sample

and

hold

Control logic

Clock

Digital

out

trigger

amplifier

Analog

in

Discussion #25

Time sampling

ADC samples input voltage (generally) at regular
intervals

Time
and

voltage quantization

v
v
v
in
out

0

2

4

6

8

10

0

2

4

6

8

10

v
in

(volts)

v
out

(volts)

1

v

0

t

V(t)

Discussion #25

Ideally, ADC should take signal samples at evenly
spaced intervals

Can then use discrete Fourier transform (DFT) analysis

Sample frequency = 1 / Sample interval

Many inexpensive systems use variable spacing

This can cause artifacts in measured signals, resulting in
reduced accuracy

May be OK for signals that change slowly with respect to
the sample spacing

Discussion #25

Nyquist sampling

When measuring a waveform that changes with
time, it must be sampled at twice the highest
frequency present to avoid
aliasing

s

s

= 1/T
s

An analog low pass filter is generally included
before the ADC to insure that no signal
frequencies are higher than twice the sample
rate

max
max
2
1
2
f
T
f
f
s
s

The Nyquist sampling requirement means that the highest frequency sine
wave in the signal has at least two samples per cycle of the sine wave or
undesireable aliasing will result.

Discussion #25

Aliasing

Aliasing occurs when the waveform is undersampled (sampled
at too low a frequency). It makes a high frequency signal look
like it is a low frequency waveform.

Aliasing should always be avoided.

The red waveform is
undersampled
at 1 Hz. The processor will think the samples (black
dots) are from the blue waveform. The red signal is
aliased

into the blue signal.

Discussion #25

ECEN 301

21

Sample Frequency

Example 1
:
T
s

= 0.001 s

What is the highest frequency that can be sampled without
aliasing? What is the frequency of the low pass filter that
should be included before the ADC?

Hz
T
f
s
s
s
500
001
.
0
2
1
2
1

max
max
2
1
2
f
T
f
f
s
s

The lowpass filter
cutoff frequency

should be
less

than 500 Hz
(usually by at least 10%)

Discussion #25

Schmitt Trigger

Schmitt trigger circuit uses hysteresis to
improve noise tolerance

S
out
V
R
R
R
v
R
R
R
v
3
2
2
2
1
2

v
v
V
v
v
V
v
S
S
ut
o

S
V
R
R
R
V
2
1
2
2

S
ref
V
R
R
R
V
3
2
2
v
out

R
1

v
in

R
2

R
3

v
+

v

V
S
+

V
S

V
S
+

+

v
out

v
in

V
S

V
S
+

V
ref

Δ
V

0

t

v
out

t

v
out

t

v
out

0

0

0

Δ
V

V
ref

Schmitt trigger

Conventional comparator

Noisy signal