Some Important Points!!!

wistfultitleElectronics - Devices

Nov 24, 2013 (3 years and 8 months ago)

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Some Important Points!!!

“Attitude, not aptitude will take you to the
altitude.”


Attendance Policy.


Class Discipline.


Break timings.


Missed Quizzes/Assignments.


Microelectronic Circuits
-

Fifth Edition Sedra/Smith

2

Figure 3.7

The
i

v

characteristic of a silicon junction diode.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

3

Figure 3.8

The diode
i

v

relationship with some scales expanded and others compressed in order to reveal
details.


Microelectronic Circuits
-

Fifth Edition Sedra/Smith

4

Figure 4.1

Physical structure of the enhancement
-
type NMOS transistor:
(a)

perspective view;
(b)

cross
-
section. Typically
L

= 0.1 to 3
m
m,
W

= 0.2 to 100
m
m, and the thickness of the oxide layer (t
ox
) is in the range of 2 to 50 nm.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

5

Figure 4.2

The enhancement
-
type NMOS transistor with a positive voltage applied to the gate. An
n

channel
is induced at the top of the substrate beneath the gate.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

6

Figure 4.3


An NMOS transistor with
v
GS

>
V
t

and with a small
v
DS

applied. The device acts as a resistance whose
value is determined by
v
GS
. Specifically, the channel conductance is proportional to
v
GS



V
t


and thus
i
D

is
proportional to (
v
GS



V
t
)
v
DS
. Note that the depletion region is not shown (for simplicity).

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

7

Figure 4.4

The
i
D

v
DS

characteristics of the MOSFET in Fig. 4.3 when the voltage applied between drain and
source,
v
DS
,

is kept small. The device operates as a linear resistor whose value is controlled by
v
GS
.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

8

Figure 4.5

Operation of the enhancement NMOS transistor as
v
DS
is increased. The induced channel acquires
a tapered shape, and its resistance increases as
v
DS

is increased. Here,
v
GS

is kept constant at a value >
V
t
.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

9

Figure 4.6

The drain current
i
D

versus the drain
-
to
-
source voltage
v
DS

for an enhancement
-
type NMOS
transistor operated with
v
GS
>
V
t
.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

10

Figure 4.7

Increasing
v
DS

causes the channel to acquire a tapered shape. Eventually, as
v
DS

reaches
v
GS


V
t

the channel is pinched off at the drain end. Increasing
v
DS

above
v
GS


V
t
has little effect (theoretically, no
effect) on the channel’s shape.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

11

Figure 4.8

Derivation of the
i
D

v
DS

characteristic of the NMOS transistor.

Microelectronic Circuits
-

Fifth Edition
Sedra
/Smith

12

Figure 4.9

Cross
-
section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate
n
-
type region, known as an
n

well. Another arrangement is also possible in which an
n
-
type body is used and
the
n

device is formed in a
p

well. Not shown are the connections made to the
p
-
type body and to the
n

well;
the latter functions as the body terminal for the
p
-
channel device.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

13

Figure 4.10

(a)

Circuit symbol for the
n
-
channel enhancement
-
type MOSFET.
(b)

Modified circuit symbol
with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e.,
n

channel).
(c)

Simplified circuit symbol to be used when the source is connected to the body or when the
effect of the body on device operation is unimportant.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

14

Figure 4.11

(a)

An
n
-
channel enhancement
-
type MOSFET with
v
GS

and
v
DS

applied and with the normal
directions of current flow indicated.
(b)

The
i
D

v
DS

characteristics for a device with
k’
n

(
W
/
L
) = 1.0 mA/V
2
.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

15

Figure 5.19 (a)

Conceptual circuit for measuring the
i
C


v
CE

characteristics of the BJT.
(b)

The
i
C


v
CE

characteristics of a practical
BJT.

Microelectronic Circuits
-

Fifth Edition Sedra/Smith

16

Figure 5.21
Common
-
emitter characteristics. Note that the horizontal scale is expanded around the origin to show the saturation
region in some detail.