SYSC5603 (ELG6163) Digital Signal Processing
Microprocessors, Software and Applications
[Ackenhusen99] J. G. Ackenhusen,
time Signal Processing: Design and
Implementation of Signal Processing Systems,
Prentice Hall, 1999.
antinides04] G. A. Constantinides, P. Y. K. Cheung, W.
Optimization of DSP Algorithms
, Academic Publishers, 2004.
[Chassaing05] R. Chassaing,
Digital Signal Processing and Applications with the C6713
and C6416 DSK,
John Wiley & Sons, 20
[Kester03] W. Kester,
Signal and DSP Design Techniques
, Analog Devices,
[Kuo05] S. M. Kuo, W. S. Gan,
Digital Signal Processors: Archi
Implementations, and Applications
, Prentice Hall, 2005.
[Lapsley97] P. Lapsley, J. Bier, A. Shoham, E. A. Lee,
DSP Processor Fundamentals:
Architecture and Features
, IEEE Press, 1997.
[Meerbergen] J. van Meerbergen,
Embedded Multimedia Systems
, Technology Eindhoven, Department ICS,
[Meyer04] U. Meyer
Digital Signal Processing with Field Programmable Gate
Verlag, New York, 2004.
[Mitra06] S. K. Mitra,
Digital Signal Processing, A Computer
[Oppenheim98] A. V. Oppenheim, R. W. Schafer,
time signal processing
edition, Prentice Hall, 1998.
rhi 99] K. K. Parhi,
VLSI Signal Processing Systems
Design and Implementation
John Wiley & Sons, Inc., New York, 1999.
[Shenoi06] B. A. Shenoi,
Introduction to Digital Signal Processing
and Filter Design
John Wiley & Sons, Inc., 2006.
Smith97] S. Smith,
The Scientist and Engineer's Guide to Digital Signal Processing,
California Technical Publishing, 1997.
[Sriram00] S. Sriram, S. S. Bhattacharyya,
Embedded Multiprocessors: Scheduling
, Marcel Dekker Inc., 2000.
[Wanhammar99] Lars Wanhammer,
DSP Integrated Circuits
, Academic Press, San
[Adams04] L. Adams
, “Semiconductor options for real
time signal processing,”
November 25, 2004, p. 87
[Allen05] R. Allen, “
level languages to DSPs: automating the
IEEE Signal Processing Magazine,
Vol. 22, no 3
, pp. 47
[Bondalapati00] K. Bondalapati,
V. K. Prasanna,
Architectures, Models and Al
Current Science: Special Section on
Computational Science 78(7), April 2000.
[Cravotta05] R. Cravotta
EDN 2005 DSP Direct
ory: Targeted DSPs take aim
[Duhamel90] P. Duhamel, M. Vetterli, “Fast Fourier Transform: A tutorial review and a
state of the art”, Signal Processing 19, pp. 259
[Eyre00] J. Eyre, and J. Bier, "
The evolution of DSP processors
," IEEE Signal Processing
magazine, March 2000, vol. 17, no.2, pp. 43
[Fridman00] J. Fridman, "
word parallelism in
digital signal processing
the TigerSHARC architecture
," IEEE Signal Processing Magazine, vol. 17, no. 2, pp. 27
35, March 2000.
[Guerra96] L. M. Guerra,
Behavioral Level Guidance Using Property
, Ph.D. thesis, Berkeley, 1996.
Y. H. Hu, “
based VLSI architecture for digital
IEEE Signal Processing Magazine, July 1992, pp. 16
[Jerraya04] A.A. Jerraya, W. Wolf,”
The What, Why, and How of MpSOCs
Chips, Morgan Kaufman, 2004
[Kim95] S. Kim, K. Kum, and W. Sung.
Point Optimization Utility for C and C++
Based Digital Signal Processing Programs. In
Workshop on VLSI and Signal Processing,
, November 1995.
[Kumar05] R. Kumar, D
. M. Tullsen, N.P. Jouppi, P. Ranganathan,
,” IEEE Computer
Issue: 11, pp. 32
[Li03] W Li,
low power FFT processors
Linköpings University, 2003
[Liu71] B. Liu, “
Effect of Finite Word Length on the Accuracy of Digital Filters
IEEE Trans. on Circuit Theory, Vol. 18, No 6, Nov. 1971
[McFarland88] Michael C. McFarland, Alice C. Parker, Raul Camposano, "
dings of the 25th ACM/IEEE conference on Design
automation, pp. 330
336, June 1988.
[Moretti05] G. Moretti,”
Design complexity requires system
,” EDN, 2005.
[Parker96] D.A. Parker,
efficient parallel FIR digital filter
,” Proceedings of International Conference on
Systems, Architectures and Processors, 1996.
Algorithm transformation techniques for concurrent processors
, vol. 77(12), pp. 1879
1895, December 1989.
and D.G. Messerschmitt, “
Pipeline interleaving and
recursive digital filters
IEEE Trans. Acoustics, Speech, Signal Processing
, vol. 37(7),
1135, July 1989.
[Parhi92] K. K. Parhi, C.
Y. Wang, an
d A. P. Brown, “
Synthesis of control circuits in
folded pipelined DSP architectures
IEEE J. Solid
, vol. 27, pp. 29
[Parhi95] K. K. Parhi,
level algorithm and architecture transformations for DSP
, The Journal of VLSI Signal Processing, Vol 9, pp 121
[Richards04] M. A. Richards, and G. A. Sha
Chips, Architectures and Algorithms:
Reflections on the Exponential Growth of Digital Signal Processing Capabilities
Submitted to IEEE Signal Processing
[Rabay98] J. M. Rabay et al (Ed.), “
VLSI Implementation Fuels the Signal Processing
,” IEEE Signal Processing Magazine, Jan. 1998.
. Seshan, “
High VelociTI Processing
,” IEEE Signal Processing Mag, March
1998, pp. 86
Tutorial on TMS320C6000 VelociTI Advanced VLIW Architecture
[Sung95] W. Sung, K. Kum, “
Simulation Based Word Length Optimization Method for
Point Digital Signal Processing Systems
,” IEEE Trans.
3090, Dec. 1995
[Thiele05] L. Thiele, E. Wandeler; S. Chakraborty,
Performance analysis of
multiprocessor DSPs: a stream
oriented component model
EE Signal Processing
Vol. 22, no 3
, pp. 38
S. A. White, "
Applications of distributed arithmetic to digital signal
processing: a tutorial review
," IEEE ASSP Magazine, Vol. 6, no. 3 , July 1989, pp. 4
[Wiangtong05] T. Wiangtong, P.Y.K. Cheung, W. Luk, “
Hardware/software codesign: a
systematic approach targeting data
IEEE Signal Processing
Vol. 22, no 3
, pp. 14
[Lall05] N. Lall, E. Cigan
Plug and Play Desi
gn Methodologies for FPGA
FPGA and Programmable Logic Journal, 2005.
ps] Philips Semiconductors, “
An Introduction To Very
Long Instruction Word
(VLIW) Computer Architecture
DSP Literature, 2005.
Interesting courses and sites
Slides] R.W. Brodersen EECS 225C
VLSI Signal Processing
, Course notes,
Slides] N. Dahnhoun,
31611 Real Time Signal Processing
, Slides for the
TMS320C6000 Teaching ROM
Bristol University, 2002.
] The DSP
FPGAs Primer, University of Strathclyde, Scotland, UK,
ign Flow and Tools
, Course notes, National
Chung Cheng University, Taiwan, 2005.
u Hen Hu,
ECE 734 VLSI Array Structures for Digital Signal Processing
Course notes, University of Wisconsin, 2004.
Slides] J. van Meerbergen,
Embedded Multimedia Systems in Silicon
, Technology Eindh
oven, Department ICS,
[Takala05] J. Takala,
3516 Signal P
, Lecture slides, Tampere University
of Technology, 2005.
Slides] Ingrid Verbauwhede, EE213A
Advanced Digital Signal
Processing Circuit Design
, Course notes, UCLA, 2000.
Implementing DSP Designs in FPGAs
, Altera Labs, System On A Chip Research Group,
University of New Brunswick.