EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
1
Operational Amplifier Circuits (Part 1)
–
A
Bipolar Op

Amp Circuit
The
741 op

amp:
Description of general circuit configurations
perform
detailed dc analysis
perform
detailed small

signal analysis
Circuit Description
Figure
1
: Equivalent circuit, 741 op

amp.
The 741 consists of input differential amplifier stage, gain stage, output
stage and separate bias circuit.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
2
Input Diff

Amp
Input stage (Q1 to Q7)
Input tran
sistors Q1 & Q2
: emitter followers
high
R
id
Q3 & Q4: common

base amplifier
large voltage gain
Output currents from Q1 & Q2 are input currents to Q3 & Q4.
Q5, Q6 & Q7 with R1, R2 & R3: active load for diff

amp
Output (single

sided) taken at collector of
Q4 & Q6
Dc output voltage at collector Q6 is at lower potential than inputs at
bases Q1 & Q2.
Dc voltage level shifts several times as signal passes through the
opamp
zero dc output voltage for zero differential input
.
Two null terminals: for appropria
te adjustments to achieve zero dc
voltage design goal.
Biasing (Q8 to Q12)
Q12, Q11 & R5: dc current biasing
provides
I
REF
Q11, Q10 & R4:
Widlar current source
for biasing of common

base
transistors (Q3 & Q4) and current mirror formed by Q8 & Q9.
To gain
stage
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
3
Voltag
e breakdown protection
Q3 & Q4:
lateral pnp devices
larger breakdown voltage
(smaller current gain
)
Figure
2
: (a) Basic common

emitter differential pair with a large differential voltage
and (b) 741 input stage, with a large
differential voltage.
From Figure 2,
V
1
= 15 V,
V
2
= 0 V.
Fig 2(a): B

E of Q2 reverse biased by approx. 14.3V
npn have breakdown voltage of 3

6 V so Q2 suffers permanent
damage.
Fig 2(b): B

E of Q1 & Q3 are forward biased
series combination of B

E junction of Q2 & Q4 reverse biased by
13.6 V.
Breakdown voltage of lateral pnp is about 50 V
B

E of Q4 provides breakdown protection
.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
4
Gain Stage
Q16 & Q17: second gain stage
Q16: emitter follower
large
R
in
Q13: two transistors in paral
lel
Q13A: ¼ area of Q12
Q13B: ¾ area of Q12
Q13B: provides bias current for
Q17, and also acts as an active load
to produce high voltage gain
Q17: common

emitter
output voltage at collector of
Q17 is input to the output stage
signal undergo
es
another dc
level shift
Capacitor C1: internal feedback
compensation
(Miller
compensation)
for stability
connected between output and
input terminals of the gain stage
Output Stage
Q14 & Q20: class

AB circuit of
complementary emitter

follower
t
o provide low
R
out
and current gain (for driving large
load currents)
Output of gain stage connected to
base of Q22
emitter follower,
high
R
in
.
Q13A: bias currents for Q22, Q18
& Q19
Q18 & Q19
provide quiescent
bias current in output transistors
Q14
& Q20.
Q15 & Q21: short

circuit
protection
normally off.
To output
stage
From
input stage
From gain
stage
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
5
Q15 & Q21 conduct only when output is inadvertently connected to
ground
and resulting in a very large output current.
An abbreviated data sheet for the 741 is shown in Table 13.1 (page 949,
Neam
en 3
rd
ed. textbook). A more complete data sheet for the 741 op

amp is
available in Appendix C (Neamen textbook).
DC Analysis
To determine dc bias currents.
Assumptions:
o
non

inverting and inverting input terminals at ground potential.
o
dc supply voltage
s are +15 V and

15 V.
o
V
BE
for npn =
V
EB
for pnp = 0.6 V.
o
In
most cases
dc base currents are neglected.
Bias Circuit and Input Stage
Figure
3
: Bias circuit and input stage portion of 741 op

amp circuit.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
6
The reference current
is established by Q12, Q11 & R5:
(1.1)
Current
I
C10
is obtained from the Widlar current source (Q11, Q10 &
R4):
(1.2)
where Q10 & Q11 are assumed matched.
Neglecting base currents,
I
C8
=
I
C9
=
I
C10
. Hence, the quiescent
collector currents in Q1 t
hrough Q4 are:
(1.3)
Assuming
dc currents
in the input stage are exactly
balanced
, dc
voltage at collector of Q6 = dc voltage at collector Q5, i.e.:
(1.4)
The dc level shifts through the opamp.
See Example 13.1.
Base Current Effects
in
Q3, Q4, Q8 & Q9 (lateral pnp’s)
may be small, hence their
base
currents
may
not
be
negligible
. But
base currents in npn’s are negligible
.
I
C10
establishes base currents in Q3 &
Q4
establish emitter currents
I
. At
collector of Q8:
(1.5)
since
I
C
8
=
I
C9
.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
7
Therefore,
(1.6)
Even if pnp transistor base currents are not negligible, bias currents in
Q1 and Q2 are, from eq. (1.6), very nearly:
(1.7)
Hence, previous assumption (eq. (1.3)) is correct.
Gain Stage
Q12 & Q13 form a current
mirror.
Q13B is scaled to 0.75 of Q12.
Hence, neglecting base currents:
(1.8)
The collector current in Q16:
(1.9)
See Example 13.2, Exercise 13.2.
Figure
4
: Reference circuit and gain stage, 741
op

amp.
1
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
8
Output Stage
(Class AB configuration)
I
Bias
is supplied by Q13A
Input signal applied to base of
Q22 (emitter follower).
Q18 & Q19 establishes
2V
BE
drops
between base terminals of
Q14 & Q20
V
BB
produces quiescent
collector currents in Q14 and
Q20.
Output trans
istors
Q14 & Q20
biased
slightly in conducting
state
, i.e.‘on’ with no signal
present
removes cross

over
distortion (more in Ch 8!!).
Figure
5
: Basic output stage, 741 op

amp.
Q13A is scaled to 0.25 of Q12. Neglecting base c
urrents,
(1.10)
where
I
REF
is given by equation (1.1).
Neglecting base currents,
I
C22
=
I
Bias
.
The collector current in Q18 is:
(1.11)
Therefore,
(1.12)
Since
V
BB
remains almost constant:
o
as
v
1
increases, base voltage of Q14 increases and
v
O
increases
o
as
v
1
decreases, base voltage of Q20 decreases and
v
O
decreases
Hence,
small

signal gain of output stage is unity
.
See Example 13.3, Exercise 13.3.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
9
Short

Circuit Protection Circuitry
To protect Q14 from burnout due
to large current induced in
transistors if output terminal is
shorted to ground during a
positive signal.
R6 & Q15 limits current in Q14 in
event of short circuit.
o
If current in Q14 reaches
20mA,
V
R6
is 540 mV.
o
Hence, Q15 turns on, and
conducts excess current from
base of Q14 into i
ts collector.
o
Thus, current in Q14 is limited
to a maximum value.
Figure
6
: Output stage, 741 op

amp with
short

circuit protection devices.
Maximum current in Q20 limited by R7, Q21 & Q24:
o
Large output current results in
V
R7
, whi
ch turns on Q21.
o
Excess current in Q20 will be shunted by Q21 & Q24.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
10
Small

Signal Analysis
Input Stage
Effective impedance at base of Q3
& Q4 is ideally infinite, i.e. open
circuit, due to constant

current
biasing at base of Q3 & Q4.
R
a
ct
1
effective resistance of active
load.
R
i2
input resistance of gain stage.
The small

signal differential
voltage gain is:
(1.13)
where I
CQ
= quiescent collector
current in each of the transistors Q1
to Q4.
Figure
7
: Simplified ac equivalent circuit of 741 op

amp input stage.
Effective resistance of active load (Widlar current source):
(1.14)
Input resistance of gain stage:
(1.15)
where
(1.16)
See Example 13.4, Exercise 13.4.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
11
Gain Stage
Figure
8
: The ac equivalent circuit, gain stage
of 741 op

amp.
R
act2
effective resistance of active
load
R
i3
input resistance of output stage.
From Figure 8, the small

signal
voltage gain can be developed
directly.
Input base current to Q
16:
(1.17)
where
R
i2
= input resistance to the gain stage.
The base current into Q17:
(1.18)
The output voltage:
(1.19)
where
R
o17
= output impedance looking into collector of Q17.
Hence, combining (1.17), (1.18) and (1.19), the small

signal
voltage
gain:
(1.20)
Effective resistance of active load is the resistance looking into
collector of Q13B:
(1.21)
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
12
The input resistance of the output stage
R
i3
can be determined from
Figure 9.
**Important!
Assume only
either
Q20
OR
Q14 is conduc
ting.
Assumption:
pnp output transistor
Q20 is active
and npn output
transistor
Q14 is cut

off
.
Q22 is an emitter follower.
A load resistance
R
L
is included.
Hence, input resistance of output
stage:
(1.22)
Resistance
R
19
is given by:
R
19
= R
e19
+ R
e18
+ R
13A
However, (
R
e19
+ R
e18
)
< R
13A
,
thus:
(1.23)
The output transistor Q20 is also an emitter follower, therefore:
(1.24)
where
R
L
>> R
7
.
See Example 13.5, Exercise 13.5 (in these examples R
8
is neglected in
calculation of R
O1
7
).
Figure
9
: The ac equivalent circuit, 741
op

am
p output stage, for calculating
input resistance.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
13
Overall Gain
The
product of individual gain factors
(since loading effects were
considered in voltage gain of each stage).
(1.25)
It is assumed that
A
V3
≈ 1
. Typical voltage gain values of the 741 op

amp is in the range of 200,000.
Output
Resistance
Ac equivalent circuit of figure 10 is referred, assuming
Q20 is
conducting
and
Q14 is cutoff
.
Figure
10
: The ac equivalent circuit, 741 op

amp output stage, for calculating output
resistance.
The output resistance:
(1.26)
where:
(1.27)
As before,
R
e19
+
R
e18
small
compared to
R
c13A
, so
R
c19
≈
R
c13A
.
Also:
(1.28)
where:
(1.29)
(1.30)
See Example 13.6, Exercise 13.6.
EEEB273/EEEB 314 Electronics II
–
Operational Amplifier Circuits (Part 1)
Dr. Ungku Anisa, UNITEN, 2007
14
Problem

Solving Technique: Op

Amp Circuits
1.
DC Analysis:
Identify the bias portion of op

amp circuit
Determine the reference current.
Determine the bias currents
in the individual building blocks of the
overall circuit.
2.
AC Analysis:
Analyse the small

signal properties of the building blocks
individually.
Loading effects of follow

on stages must be taken into account in the
analysis of each building block.
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