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N A S A G O D D A R D S P A C E F L I G H T C E N T E R

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Do not distribute this material without permission

from
the Scientific Point of Contact Rob Petre (Robert.Petre
-
1@nasa.gov)

or the Programmatic Point of Contact Gerry Daelemans (Gerard.J.Daelemans@nasa.gov)

This
document contains sensitive information and is intended for NASA Official Use
Only

X
-
Ray Calorimeter

~
Concept Presentation
~

Electrical
Design



C. Paul
Earle

Terry Smith


Feb 17, 2011

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
2

Final Version


Calorimeter Front
End Electronics
(FEE)

Calorimeter
Data
Processing Unit (DEEP)


(Event Processing)


Cryocooler

Control
Electronics
(CCE)

ADR Control
Electronics (ADRC)























260
-
300 K

Precooler

compressor

LHP

condenser

Cryocooler

cold head

x
-
rays

JT

compressor

Filter wheel

Main Electronic Box


-
LVPS

-
Power Switching & Distribution (PDU)

-
Single Board Computer (SBC)

-
Digital I/O

-
Housekeeping (analog input)

-
Filter Wheel Mechanism Drive (A/B)



S/C C&DH

Cryostat

ADR

Control

Detector
Control

Vent valve

3
-
stage Adiabatic
Demagnetization
Refrigerator (ADR)

Commercial
Cryo

Purchase


ASTRO
-
H Heritage Rebuild


Commercial
Avionics Purchase


Custom
Build (in
-
house assumed
)

KEY

S/C Power

Door
Actuator

(S/C one
-
time actuation)

(S/C one
-
time actuation)

System Block Diagram

(Electrical Approach*)

SpW

(science Data)

Filter Wheel Motor &

X
-
Ray Source HVPS

1pps

* The systems presentation has a more complete block diagram indicating the build
approach, while this is intended to address electrical boxes only

directly to very high current
ADRC & CCE boxes

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
3

Final Version

Electrical Architecture

Calorimeter Front
End Electronics
(FEE)

Calorimeter
Data
Processing Unit
(DEEP)

Cryocooler

Assembly

ADR
Control
Electronics (ADRC)

Temp, V, & I sensors

S/C C&DH (mil
-
std
-
1553)

S/C Power (+28V)

SpW

(science Data)

Main Electronics Box

Low Voltage Power Supply (LVPS)

Power Switching & Distribution (PDU
)

Single Board Computer (SBC)

FW Stepper Motor Drive (A/B)

Housekeeping (analog input)

HVPS

(A/B)

LVPS

Filter
wheel Stepper
Motor (A/B)

X
-
Ray
Sources
(2A/2B)

Door Actuator
(A/B)

Vent Valve Actuator
(A/B)

Survival Heaters
(A/B)

Survival Temp Sensors
(A/B)

pulse
cmd

status

pulse
cmd

statu
s

S/C power

return

(S/C Monitoring)

S/C Power

Digital I/O

LVPS (2A)

1pps

1553

1553

1553

1553

1553

1553

master

KEY

COTS Purchase


In
-
house rebuild of ASTRO
-
H Heritage


Commercial
Avionics
Purchase


custom assembly


Custom
Build (in
-
house assumed
)

ADR

Detector
and SQUIDs

Dewar

Filter Wheel Assembly
(mounted to
Instrument Mounting
Deck)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
4

Final Version


SQUID

Final Stage

Z
out

~ 50 Ω

0.1
°

K Layer

Pre Amp

Anti
-
aliasing


Filter

BW ≤ 20 MHz


ADC

14
-
bit


0.3 nV/√Hz

BW ≤ 20 MHz


100
-
200 Msp/sec

FPGA



demux



PI loop

Very Slow


DAC

~ 10 µA

Zin~ 50 Ω

Z matching


network

4
°

K Layer

DAC

14
-
bit

100
-
200
Msp
/sec

50 Ω

pulse
processing

CPU

2 Ω max

Simplified
MicroCalorimeter

Control
Electronics

FEE

DE

EP

Calorimeter
Controller/Amplifier

(take from 2008 XMS Study)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
5

Final Version

Calorimeter
Controller/Amplifier

(take from 2008 XMS Study)

FEE

DE

(
Spcaecube

2.0)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
6

Final Version

Pulse Processing Electronics (PPE
)

(take from 2008 XMS Study)

EP

(
Spcaecube

2.0)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
7

Final Version

Data Rates

Average Data Rate:


Assume Count Rate ~ 500 counts/sec (for ~10milli
-
Crab source)


Assume ~10 bits each for positions X and Y position on the Array


Signal ~ 52 bits (energy, time stamp, rise time, event type/grade, & anti
-
co)



Average Data rate ~ [(52 + 10+ 10) bits/count ] x (500 counts/sec) ~
36,000bps

(x2 for 100% margin)


Average Data Rate
~
72Kbps
(with 100% margin)


Peak Data Rate:


Maximum count rate capability ~ 15,000counts/sec (
ie
. 80% throughput and full energy resolution)


Assume 4
-
bits (16 pixels) each for positions X and Y at center of the Array


Signal ~ 52 bits (energy, time stamp, rise time, event type/grade, & anti
-
co)



Peak Data Rate ~ [(52 + 8)bits/count ] x 15000 counts/sec) ~
900,000bps

(x2 for 100% margin)


Peak Data Rate ~
1.8Mbps

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
8

Final Version

SpaceCube

2.0

½ Detector


(18 Columns)

SpW


t
o SSR

DEEP

FEE Card (1)

CPU
-
1

(9 Ch.)

CPU
-
2

(9 Ch.)

Detector

FEE

LVPC

Flash Memory

Mission Unique I/O

9

6

6

6

Data Flow Redundancy

(1.28Mbps)

(6 Cards)

(10 Cards)

FEE Card (2)

LVPC (1)

9

DE Card (1)

DE
Card
(2)

DE
Card
(3)

3

3

6

6

(Xilinx FPGA
-
1)

6

6

6

DE Card (4)

DE
Card
(5)

DE
Card
(6)

3

3

6

6

FEE Card (3)

FEE Card (4)

LVPC (1)

½ Detector


(18 Columns)

9

9

CPU
-
3

(9 Ch.)

CPU
-
4

(9 Ch.)

(Xilinx FPGA
-
2)

(to MEB)

(36 Columns)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
9

Final Version

Mission
Unique


SpaceCube
2
Processor
Card

Power Card


Mission
Unique

+ I/O Cards

FLASH

Memory
Card

cPCI

/ SATA

Spacewire

(
SpW
)
/ LVDS / MGT / GigE / Mission Unique High
-
speed

36 inputs

(
from FEE)

SpaceCube

2.0 Block Diagram

(DE)

(EP)

SpW

Output

(to S/C)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
10

Final Version

SpaceCube

2.0 Processor Card

Std J1

cPCI

32
-
bit

LVDS/RS
-
422

Ethernet

Custom
J2


serial
gigabit,
Spacewire
,
analog, and
GPIO

UART

MGT

Special Command Reset

SpaceWire

V5 SIRF

8MB rad
-
hard SRAM, a 64Mb
PROM,

8
GB Flash,
512MB
SDRAM

3U Compact PCI Card

JTAG

V5FX130T

PPC440


PPC440

512MB RAM


512MB RAM

2GB FLASH


2GB FLASH

V5FX130T

PPC440


PPC440

512MB RAM


512MB RAM

2GB FLASH


2GB FLASH

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
11

Final Version

Current
SpaceCube

Systems

SpaceCube

1.0b

SpaceCube

1.0a

Prototype

SpaceCube

1.5

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
12

Final Version

MIPS

Power

MIPS/
W

MIL
-
STD
-
1750A

3

15W

0.2

RAD6000

35

10
-
20W

2.33
1

RAD750

300

10
-
20W

20
2

SPARC V8

86

1W
3

86
3

LEON 3FT

60

3
-
5W
3

15
3

GSFC
SpaceCube

1.0

3000

5
-
15W

400
4

GSFC
SpaceCube

2.0

5000

10
-
20W

500
5

Notes:

1


typical, 35 MIPS at 15 watts

2


typical,
300
MIPS at 15 watts

3


processor device only ... total board power TBD

4


3000 MIPS at 7.5 watts (measured)

5


5000 MIPS at 10 watts (calculated)

Processor Comparison

12

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
13

Final Version

SpaceCube

Family Overview

Unit

Mission

Notes

Specs

Stats

Status

SpaceCube

1.0a

Hubble Servicing
Mission 4

Relative Navigation Sensors
Experiment

STS
-
125 May 2009

4”x4” card

(2) Virtex4

Size: 5”x5”x7”

Wt: 7.5 lbs

Pwr: 37W

2009
Flight

SpaceCube

1.0b

MISSE
-
7

(ISS)

added RS
-
485, RHBS,

STS
-
129 Nov 2009

4”x4” card

(2) Virtex4

Size: 5”x5”x7”

Wt: 7.5 lbs

Pwr: 32W

In
Flight

SpaceCube

1.5

SMART (
DoD
/ORS)

adds GigE & SATA,
commercial parts,

sounding rocket flight

4”x4” card

(1) Virtex5

Size: 5”x5”x4”

Wt: 4 lbs

Pwr: < 20W

2011
Flight

SpaceCube

1.0c

Argon Ground
Demonstration

Original RNS unit, w/added
1553 & Ethernet

4”x4” card

(2) Virtex4

Size: 5”x5”x7”

Wt: 7.5 lbs

Pwr: 40W

Softwar
e
Develop
ment

SpaceCube

1.0d

STP
-
H4

(ISS)

CIB Experiment Interface
w/added 1553 & Ethernet

4”x4” card

(2) Virtex4

Size: 5”x5”x7”

Wt: 7.5 lbs

Pwr: 40W

2013

Flight

SpaceCube

2.0

Earth/Space Science
Exploration missions


ISE 2.0

(ISS)

Std 3U form factor, GigE, SATA,
Spacewire, cPCI

4”x6” card

(2) Virtex5

SIRF

Size: 5”x5”x7”

Wt: < 10 lbs

Pwr: 15
-
20W

Under
Development

(ISE 2.0 2013

Flight)


SpaceCube

2.0 Mini

CubeSats
, Sounding
Rocket, UAV


IPEX
Cubesat

“Mini” version

of
SpaceCube

2.0,

CubeSat

form factor

2.5”x2.5” cards

(1) Virtex5/SIRF

(1)

Aeroflex

Rad
-
Hard
FPGA

Size: 3.5”x3.5”x3.5”

Wt: < 3 lbs

Pwr: 5
-
15W

Under
Developme
nt (IPEX
2014 Flight)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
14

Final Version

FEE Box Size Spreadsheet

FEE Circuit Boards





Comments

Length

Width

Quantity



8

6

6

Length/Width in inches

20.32

15.24



Length/Width in centimeters (1in = 2.54 cm)

Backplane:







8

7

0.6

Backplane Length/Width in inches, Mass in Kg.

Board Mass Total:

4.4

Kg

My Metric: 0.5 Kg each 8"x6" board



7.9

lbs

1lb = 0.45359237 Kg, 1Kg =2.204Kg







1 in = 0.0254 meters = 2.54cm = 25.4 mm, 1 meter = 39.370 in







Electronics Box







Depth (D)

Height (H)

Width (W)



9

7

7



22.86

17.78

17.78

(centimeters). Divide by 100 for meters

Surface Area Total

0.23



Area = 2(DH+HW+WD)/10000 square meters

Wall thickness (mm)

2.50



millimeters. Divide by 1000 for meters

Density (Aluminum)

2,700.00



Kg/Meter3









Housing Mass:

1.5

Kg

(Mass = Volume x Density. ie Area x Thickness x Density)



3.4

lbs









Box Mass Total:

5.9

Kg

(ie. C8+C19)



11.3

lbs

(
ie
. C9+C20)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
15

Final Version

FEE Box Summary

FEE Power Estimate

Basis of Estimate

4 DACs per channel @ 0.6W each

~ 2.4W per channel

9 Channels per Card

~ 21.6W per Card

~
86.4W Total

FEE Box Summary:

Size ~ (9”x 7” x 7”)

Mass ~ 5.9Kg

Power ~ 115.2W

Circuit

Boards

Qty

Power

FEE

4

86.4

LVPC

2

28.8



Total:

115.2

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
16

Final Version

DEEP Box Summary

Standard 3U Card Form
Factor

DEEP (
SpaceCube

2.0) Box Size

Cards

Qty

Mass

Power

Processor Card

1

0.35

10.0

Digitizer Cards

6

2.1

79.2

Memory (SEAKR)

1

0.35

4.0

I/O

1

0.35

4.0

LVPC

1

0.7

31.1

Backplane

1

0.5

0

Housing

1

1.3

0



Total:

5.65

128.3

Basis of Estimate

1 ADC per channel @ 1W

2 DACs per channel @ 0.6W each

~ 2.2W per channel

6 Channels per Card

~ 13.2W per Card

~
79.2W Total Digitizer Cards

FEE Box Summary:

Size ~
(5.5”x 5.5” x 11”)

Mass ~
5.6Kg

Power ~
128.3W

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
17

Final Version

Design Drivers

Piece Parts

A/D Converters:


National ADC14V155


14
-
bit, 155 MSPS


1W each (36 Required,
ie
. 36W)


DACs:


National
DAC081S101 (QML)


8
-
bit
, 155 MSPS


0.6W
each
(2 required per channel,
ie
. 1.2W)


36 channels require 72 DACs (
ie
. 86.4W)


DEEP Digital I/O Readout Needs:


The DACs in the DEEP Digital I/O card is a significant development concern


It has very demanding requirements for high sampling rate, high
resolution, and low noise


A commercial ground
-
based version of this component doesn't exist yet

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
18

Final Version

MEB Box Size Spreadsheet

MEB Circuit Boards





Comments

Length

Width

Quantity



8

6

7

Length/Width in inches

20.32

15.24



Length/Width in centimeters (1in = 2.54 cm)

Backplane:







8

8

0.7

Backplane Length/Width in inches, Mass in Kg.

Board Mass Total:

4.2

Kg

My Metric: 0.5 Kg each 8"x6" board



9.2

lbs

1lb = 0.45359237 Kg, 1Kg =2.204Kg







1 in = 0.0254 meters = 2.54cm = 25.4 mm, 1 meter = 39.370 in







Electronics Box







Depth (D)

Height (H)

Width (W)



9

7

8



22.86

17.78

20.32

(centimeters). Divide by 100 for meters

Surface Area Total

0.25



Area = 2(DH+HW+WD)/10000 square meters

Wall thickness (mm)

2.50



millimeters. Divide by 1000 for meters

Density (Aluminum)

2,700.00



Kg/Meter3









Housing Mass:

1.7

Kg

(Mass = Volume x Density. ie Area x Thickness x Density)



3.7

lbs









Box Mass Total:

5.8

Kg

(ie. C8+C19)



12.9

lbs

(
ie
. C9+C20)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
19

Final Version

Main Electronics Box (MEB) Summary

Circuit Boards (20x15) cm
2
(8”x6”), 0.5Kg each

QTY

PWR

(Watts)

Mass

(Kg)

Description


%

Analog
/Digital

Power Switching Card

1

5.0

0.5

70/25

Single Board Computer

1

10.0

0.5

5/90

Digital I/O Card

1

5.0

0.5

5/90

Stepper Motor Drive Card

1A/1B

3.0

1.0

70/25

Housekeeping

1

4.0

0.5

50/50

Power Converter

1

9.7

0.5

Assume 75% efficiency

90/5

Backplane

1

-

0.7

Housing

1

-

1.7

Total

-

36.7

5.9

Box Size: (23x18x20) cm
3
, or (10” X 7” x 13”),
5.9Kg

(
ie
. 4.2Kg board total + 1.7 Kg Housing)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
20

Final Version

Instrument Power Summary

Spacecraft Power Bus Requirement

Load

Avg. Power

(Watts)

Peak

ON Power

(Watts)

FEE Box

115.2

115.2

DEEP (
SpaceCube

2.0) Box

128.3

128.3

MEB (Main Electronics Box)

36.7

36.7

ADR Control Electronics

29

55

Filter Wheel & HVPS Assembly (< 1 % duty
cycly
)

~

8

Cryocooler

Assembly

350

450

FEE, ADR, & Cryostat Operational Heaters

27 (
tbd
)

27 (
tbd
)

* One
-
time actuators

~

~

Instrument Total:

686.2

820.2

* The one
-
time use items are short duration and do not factor into instrument power demand

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Kickoff Presentation, p
21

Use or disclosure of this data is subject to the
restriction on the title page of this document

GeoMAC

Study Week:
9/14


9/20/11


Harness Mass
Estimates







Harness











Wrapper



Connector Mass

Backshell Mass

Line
Totals













Length

Density

Mass

Density

Mass

From

To

From

To

Mass

From

To

Type

Description

Qty

Meters

(ft.)

(g/ft.)

(g)

(g/ft.)

(g)

(g)

(g)

(g)

(g)

(g)

FEE Box

Detector

TSP

analog (24 AWG)

252

1.0

3.3

5.600

4629.92

5.200

17.06

41.200

0

68.000

0

4756.18

FEE Box

DEEP Box

TSP

signal, address
(24AWG)

252

2.0

6.6

5.600

9259.84

5.200

34.12

41.200

41.200

68.000

68.000

9512.36

MEB

FEE Box

Pair

power (20AWG)

8

2.2

7.2

5.000

288.71

5.200

37.53

7.600

7.600

21.000

21.000

383.45

MEB

DEEP Box

Pair

power (20AWG)

1

0.2

0.7

5.000

3.28

5.200

3.41

5.600

5.600

15.000

15.000

47.89

MEB

DEEP Box



1553

1

0.2

0.7

7.200

4.72

5.200

3.41

5.600

5.600

15.000

15.000

49.34

MEB

FW & X
-
Ray
Source

Pair

HV power

1

1.0

3.3

5.000

16.40

5.200

17.06

5.600

5.600

15.000

15.000

74.66

MEB

FW & X
-
Ray
Source



1553

1

1.0

3.3

7.200

23.62

5.200

17.06

5.600

5.600

15.000

15.000

81.88

MEB

ADR Electronics

Pair

power (20AWG)

1

3.0

9.8

5.000

49.21

5.200

51.18

5.600

5.600

15.000

15.000

141.59

MEB

ADR Electronics



1553

1

3.0

9.8

7.200

70.87

5.200

51.18

5.600

5.600

15.000

15.000

163.25

MEB

Cryo

Electronics

Pair

power (20AWG)

1

1.0

3.3

5.000

16.40

5.200

17.06

5.600

5.600

15.000

15.000

74.66

MEB

Cryo Electronics



1553

1

1.0

3.3

7.200

23.62

5.200

17.06

5.600

5.600

15.000

15.000

81.88

MEB

3X (Heaters A/B)

TP

power (20AWG)

6

3.0

9.8

5.000

295.28

5.200

51.18

7.600

7.600

21.000

21.000

403.66

MEB

3X (Temp Sens
-

A/B)

TP

analog (22AWG)

6

3.0

9.8

3.200

188.98

5.200

51.18

7.600

7.600

21.000

21.000

297.36

MEB

2X (actuator
-

A/B)

TSP

power (20AWG)

4

1.5

4.9

5.000

98.43

5.200

25.59

7.600

7.600

21.000

21.000

181.22

ADR

ADR Electronics

TP

analog

1

2.0

6.6

5.600

36.75

5.200

34.12

5.600

5.600

15.000

15.000

112.07

Cryocooler

Cryo Electronics
A/B

TP

analog

2

2.0

6.6

5.600

73.49

5.200

34.12

5.600

5.600

15.000

15.000

148.81

































Column Totals:

15079.5
3



462.34

168.8

127.6

370

302

16510.26

g

Harness
Total:

16.51

Kg

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Kickoff Presentation, p
22

Use or disclosure of this data is subject to the
restriction on the title page of this document

GeoMAC

Study Week:
9/14


9/20/11


FPGA Costing

Predefined Schema for Costing New FPGA
Developments


I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

FPGA Development Cost Information

-
Predefined schema for costing new FPGA development

-
Parametric
cost estimate includes the procurement costs for flight selected FPGAs from the
manufacturer; NRE cost estimate includes the engineering labor to generate the
algorithms


The most used FPGA on future missions is the
Actel

AX
-
2000


Many functions/algorithm that have been previously designed and coded, and are available as
intellectual Property (IP) in VHDL Format. Implementing VHDL IP into an FPGA requires very
little FTEs.


IP developed by NASA is available for free


IP from industry requires a license for its usage


Examples of VHDL IP that are available


Spacewire

Data Network Protocol/interface


PCI Data Bus Interface for both Bus Controller and Terminals


Mil
-
STD
-
1553 Data Bus Controller and Remote Terminals


Short Reed
-
Solomon Encoder/Decoder for Error Detection & Correction (EDAC) of Data in
SEU vulnerable memory


Rice Data Compression Algorithm (~2:1 Lossless)


Pixel
-
Processor (for science data reduction)


Downlink Formatting & Encoding


CCSDS VCDU protocol Formatting


Long Reed
-
Solomon Encoding for EDAC across downlink channels


Convolution Encoding


Randomization


I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

FPGA Firmware Development Costs

Unique FPGAs

Box

Algorithm Type

Cost

2 FPGAs

DEEP

Spacecube

2.0 Processor Card

(Included)

Event Trigger

$400K

Pulse Event Processing

$400K

Data Reduction

$400K

Total firmware development costs

$1.2M

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

FPGA Firmware Costing Scheme


This scheme was revised by several Product Design Leads (PDLs)
in Code 564 in Oct, 2011 for the IDL to capture the firmware
development labor associated with FPGAs


The hardware costs are captured parametrically


$
400K Minimum for FPGA Development for the chip pin
assignments and interface frame work, for each unique FPGA
(firmware costs are assumed to be zero for identical FPGA chips)


1.50 FTEs of New Code Design (VHDL coding and Simulation)


0.50 FTEs of New Code Verification (by Analysis)


0.25 FTEs of Signal Integrity Analysis (of all I/O lines)


0.25 FTEs of Lab Code Test


$400K
per unique Algorithm, which are executed from within the
FPGA frame work


1.00
FTEs of New Algorithm


1.00
FTEs of New Algorithm lab Test/Verification



I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

FPGA Contacts at Goddard

Code 564 Branch Contacts


Dave Sohl (
David.W.Sohl@nasa.gov
)

Branch Head


Jack Mccabe (
John.F.Mccabe@nasa.gov
)

Associate Branch Head


Lavida Cooper (
Lavida.D.Cooper@nasa.gov
)
-

Associate Branch Head


FPGA Developers in Code 564


Damon Bradley (
Damon.C.Bradley@nasa.gov
)


Instrument Digital Signal Processing


George Winkert (
George.E.winker@nasa.gov
)


FPGA development


Richard Katz (
Richard.b.Katz@nasa.gov
)

FPGA development


Integrated Design Center (IDC) Avionics Engineer & FPGA Consultant


Terry Smith (
Terrence.M.Smith@nasa.go
v
)


I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
27

Final Version


No
electrical tall poles or low TRL concerns
.



Design
assumes
separate pre
-
amplifier electronics, power supply, and data
processing FPGAs for each half of the detector, thereby providing some degree of
fault tolerance to meet the assumed three (3) year reliability goal.



Baseline design utilizes
Spacecube

2.0 which give superior performance for
throughput (5000 MIPS), power @ 10W, and overall size/mass for the processor Card
(and hence the DEEP Box). The DEEP Box will require custom designed DE Cards,
modified I/O card, and modified LVPC, but will utilize standard processor card.



Design drivers are the A/D converters and the DACs due to their large quantity (
ie
.
This causes a multiplying effect for power consumption).



The Main Electronics Box assumes purchased items only with no custom designed
circuit boards to minimize cost.



All heaters, motors, and actuators have redundant circuitry.



Mass and power estimates are best estimates of actual (
ie
. no margin added)

Issues / Conclusion

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
28

Final Version

Backup Charts

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
29

Final Version

SpaceCube

2.0

½ Detector

(18 Columns)

SpaceWire


To S/C SSR

DEEP

½ Detector

(18 Columns)

FEE Cards (2)

FEE Cards (2)

Mission Unique
Digitizer Cards

(3)

Mission Unique
Digitizer Cards

(3)

CPU
-
1

(9 Ch.)

CPU
-
2

(9 Ch.)

CPU
-
3

(9 Ch.)

CPU
-
4

(9 Ch.)

Detector

FEE

+1 LVPC

+1 LVPC

LVPC

Flash Memory

Mission Unique I/O

18

18

18

18

18

18

Data Flow Redundancy

(1.28Mbps)

(6 Cards)

(10 Cards)

I n t e g r a t e d D e s i g n C a p a b i l i t y / I n s t r u m e n t D e s i g n L a b o r a t o r y

Use or disclosure of this data is subject to the
restriction on the title page of this document

X
-
Ray Calorimeter
Study Week:
2/13


2/17/12

Presentation Delivered: Feb 17, 2012

Electrical Design p
30

Final Version

Initial

Block Diagram

main shell

ADR Stage 2

ADR Stage 1

ADR Stage 3

0.6
-
1.0
K

4.5 K

50 mK

15 K

45 K

150 K

260
-
300 K

cold
head

JT stage

Antico

detector

Microcalorimeter

4K SQUIDs &
termination
resistors

Focal Plane
Assembly (FPA)
at 50mK

x
-
rays

filters

SQUID

readout
amplifiers

Vent
valve

Loop Heat Pipe
to radiator

Custom cryostat
encloses the FPA and
ADR, as well as the
readout amplifiers

Commercial
Cryocooler

3
-
stage Adiabatic
Demagnetization
Refrigerator (ADR)

Aperture cover

Calorimeter/ADR
Insert

Cryocooler

Calorimeter/ADR insert

heat switch


Detector 50
mK

stage

filters

thermal link

superconducting cable

conductive bond

cryostat shells

KEY

ADR

Control

Detector
Control