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Oct 29, 2013 (3 years and 9 months ago)

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Introduction

Course Overview and Basic
understanding of Computer
Architecture

Assistant Professor

Dept. of Computer Science and Engineering

Jahangirnager University, Savar, Dhaka

Bangladesh



Instructor:

Abu Sayed Md. Mostafizur Rahaman

Teaching Assistant:

Rezaur

Rahman

(Reza)

4
th

year 2
nd

year student (Appeared)

Dept. of Computer Science Engineering

Jahangirnagar University, Savar, Dhaka

Bangladesh

3

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Seat Plan during this course

Door

4

Schedule may subject
to change



From 23 May, 2011 to 19 September, 2011



Every week (excluding holydays)



Monday



11:00
-
13:00 (2 classes)



Wednesday


10:20
-

12:10 (2 classes)

Schedule

5


Lecture Materials

http://chyon.wikispaces.com


Contains



News and schedule update



Lecture slides



Exercises (at least 5)



Assignments



Additional materials for further readings

Computer Architecture

6


References

http://chyon.wikispaces.com


D
.
A
.

Patterson

and

J
.
L
.

Hennessy,

Computer

Architecture

and

Design
:

The

Hardware/Software

Interface
,

4
th

edition
,

Elsevier/Morgan

Kauffman
.



3
rd

edition

OK

if

4
th

edition

not

available
.


Mostafa

ABD
-
Al
-
Barr

&

Hesham

El
-
Rewini


Fundamentals

of

computer

organization

and

architecture”

Willy

press
.



J
.

Hennessy

and

D
.

Patterson,

“Computer

Architecture
:

A

Quantitative

Approach”

(
3
rd

Edition),

Morgan

Kaufmann

Publishers,

2003
.

ISBN

1558605967
.

Computer Architecture

7


Grading Policy

http://chyon.wikispaces.com


Attendance



= 10 %


Assignments



= 05 %


Exercises test



= 05 %



Instant exams


Class Test
(Best of three)


= 20 %

======================================







= 40 %


Final Examination


= 60 %

======================================







= 100 %

Computer Architecture

8


Class Test Schedule

http://chyon.wikispaces.com

Test number

Date and Time

Syllabus

CT
-
01

Wednesday

July 13, 2011

Chapter:

01

Chapter: 02

CT
-
02

Monday

August

08
,
2011

Chapter: 03

CT
-
03

Monday

August 29,
2011

Chapter: 04

CT
-
04

Monday

September
19, 2011

Chapter: 05 and
others

**Schedule may subject to change

Computer Architecture

9

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Course Overview


Introduction:

Instruction codes, formats, cycle, timing etc; Addressing modes;
Types of instruction; RISC characteristics; CISC characteristics and Yields.


Chapter 1 & 2 from first reference book (3 lectures)


Computer Arithmetic:

Different types of data representation; Addition and
subtraction; Multiplication algorithms; Division algorithms.


Chapter 3 from 1
st

reference book (3 lectures)


Fundamentals of parallel processing:

Parallel processing; Pipelining; Vector
processing; Multiprocessors; Array processor, Bit
-
slice processor
Interconnection structures.


From 1
st

and 3
rd

reference books (4 lectures)


Memory Organization:

Main memory; Auxiliary memory; Associative
memory; Cache memory; Virtual memory; Memory management requirements
and hardware.


Chapter 5 from 1
st

reference book (2 lectures)


Parallel Computer Architecture(1 lecture)


Distributed Memory Architecture(1 lecture)


Input
-
Output Organization:

Input
-
Output Interfaces; Data transfer,
Interrupts; Direct Memory Access (DMA); Input
-
output channel.


Chapter 6 from first reference book (1 lecture)



Computer Architecture

10

Sl

Task description

Duration

Date

1

First Meeting for the course no: CSE
-
307

2 hrs

Monday, May 23, 2011

2

Lecture 01

2 hrs

Wednesday, May 25, 2011

3

Lecture 02

2 hrs

Monday, May 30, 2011

4

Lecture 03

2 hrs

Wednesday, June 01, 2011

5

Summer vocation

20 days

Monday, June 06, 2011

6

Exercise: 01 from chapter 1

2 hrs

Monday, July 04, 2011

7

Exercise: 02 from chapter 2

2 hrs

Wednesday, July 06, 2011

8

Lecture
04

2 hrs

Monday, July 11, 2011

9

Lecture 05 with CT
-
01

2 hrs

Wednesday, July 13, 2011

10

Lecture 06

2 hrs

Monday, July 18, 2011

11

Reserved Day

2 hrs

Wednesday, July 20, 2011

12

Exercise: 03 in computer arithmetic

2 hrs

Monday, July 25, 2011

13

Lecture 07

2 hrs

Wednesday, July 27, 2011

14

Lecture
08

2 hrs

Monday, August 01, 2011

15

Lecture 09

2 hrs

Wednesday, August 03, 2011

16

Lecture
10 with CT
-
02

2 hrs

Monday, August 08, 2011

17

Reserved Day

2 hrs

Wednesday, August 10, 2011

18

Exercise: 04 in parallel

processing

2 hrs

Wednesday, August 17, 2011

19

Lecture 11

2 hrs

Monday, August 22, 2011

20

Lecture 12

2 hrs

Wednesday, August 24, 2011

21

Lecture
13 with CT
-
03

2 hrs

Monday, August 29, 2011

22

Lecture 14

2 hrs

Wednesday, August 31, 2011

23

Reserved Day

2 hrs

Monday, September 05, 2011

24

Exercise: 05 in memory and others

2 hrs

Wednesday, September 07, 2011

25

Reserved Day

2 hrs

Monday, September 12, 2011

26

Reserved Day

2 hrs

Wednesday, September 14, 2011

27

Lecture:15
with
CT
-
04

2 hrs

Monday, September 19, 2011

11

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What
is Computer Architecture?

Easy Answer


Computer Architecture =



Instruction Set Architecture +


Machine Organization

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The Instruction Set
: a
Critical Interface

instruction set

software

hardware

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Instruction Set Architecture


A very important abstraction:


interface
between hardware and low
-
level software


standardizes

instructions, machine language bit
patterns, etc.


advantage:
allows

different implementations of the same
architecture


disadvantage:
sometimes prevents adding new
innovations


Modern instruction set architectures:


80x86/Pentium/K6, PowerPC, DEC Alpha, MIPS, SPARC,
HP

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I/O system

Instars. Set Proc.

Compiler

Operating

System

Application

Digital Design

Circuit Design

Instruction Set


Architecture

Firmware

Datapath & Control

Layout

What is Computer Architecture?

Better (More Detailed) Answer

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Classic
Components of a Computer



Input (mouse, keyboard, …)


Output (display, printer, …)


Memory


main (DRAM), cache (SRAM)


secondary (disk,


CD, DVD, …)


Datapath


Control






Input

Processor

Control

Datapath

Output

Memory

1001010010110000

0010100101010001

1111011101100110

1001010010110000

1001010010110000

1001010010110000

Processor

(CPU)

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Computer Architecture

17

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Features and benefits



Intel® Core™2 Duo processor


With an you will get performance
-
rich technologies, including up to 6MB of shared L2 cache, up
to 1333 MHz Front Side Bus, plus these additional Intel® technologies built in:


Intel® multi
-
core processing


Provides greater multitasking performance by combining two independent processor cores in
one physical package¹


Intel® Wide Dynamic Execution



Improves execution time and energy efficiency with more instructions per clock cycle


Intel® Intelligent Power Capability


Enables smarter, more energy
-
efficient performance


Intel® Smart Memory Access


Improves system performance by optimizing the use of the available data bandwidth


Intel® Advanced Smart Cache



Enables higher performance and more efficient cache subsystem by optimizing for multi
-
core
processors


Intel® Advanced Digital Media Boost

accelerates


A broad range of applications including video, speech and image, photo processing, encryption,
financial, engineering, and scientific applications


Computer Architecture

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19

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Computer Architecture