A Passive UHF RFID Tag IC

guineanscarletElectronics - Devices

Nov 27, 2013 (3 years and 9 months ago)

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1

A Passive UHF RFID Tag IC

CLASS REPRESENTATION:
Represented by:
Khalil Monfaredi

Advanced VLSI Course Seminar

2

Outline



Introduction to RFID (Radio
Frequency Identification) Tag LSI
(30%)



Current Mode Rectifier (30%)



Current Mode Demodulator (20%)



FeRAM (10%)



Summary (10%)

3

Block diagram of the UHF RFID tag LSI with 2Kb FeRAM.

[1]

4

RFID: Ubiquitous Sensing Networks



Thing
-
to
-
thing networking

will begin




Sensing tags will
play

an important role




T
he present

Person
-
to
-
person

networking


T
he future

Thing
-
to
-
thing networking

Thermometer

Acceleration

Infrared

Danger

Health care

Security

5

Requirements



Communication distance




䱯湧L摩d瑡湣攠⠱( 洩m



Incorporation of sensor

device




T牡湳浩琠湯琠潮汹 䥄⁢I琠慬獯 獥湳楮朠摡瑡



Necessity of battery




B
慴瑥特 汩晥㨠慳潮 慳⁰潳獩s汥



Low cost

6

Comparison of Tags

Active tag

Semi
-
passive tag

Passive
tag

Communication
distance

Good

Fair


Poor

Incorporation of
sensor


Easy

Possible

Difficult

Necessity of
Battery

Need

Need

No need


Cost

High

Fair

Low



Limited battery life:


Solves by wireless power transmission

7

Required conversion efficiency

Base

station

Tag

Time=1s

Time=3ms

Consume energy

=0.3



Supply energy
=40



Conversion efficiency > 0.75 %

CW

CW

Standby

Downlink

Uplink

Recharge

8


Issues
concerning

rectifier



Cannot be rectified below threshold voltage
V
th
.



V
th
=0V: There is a possibility that off
-
leak will occur.

CMOS rectifier

DCcurrent

Threshold
voltage
V
th

0

V
th

Region that cannot
be rectified


|Z
in
|=700


V
in
=0.2V

Z
in


V
in

V
in
=0.2V

RF
in
=
40

W

[2]

9

Proposed rectifier

0

V
th

V
bth


Apply a bias voltage V
bth



V
th


-

Generating voltage of V
bth

in the same IC chip

Region that cannot
be rectified


RF
in

V
bth

M
2

M
1

(D)

(G)

(S)

V
bth
-
V
th

0

V
bth

DC+

=

0
.
3
V

@RF
in
=
0
.
2
V

RF
in

0
.
2
V

[2]

10

Stacked configuration

DC+

DC
-

Stack

6 units



How will 12 V
bth
voltage sources be realized?


Stack 6 units of rectifiers to obtain over 1.5V DC

>1.5V

0.3V

Output DC voltage

RF
in

V
bth

V
bth

V
bth

V
bth

V
bth

V
bth

[2]

11

RF
in

DC+

DC
-

V
bth

PLS

C
b
1

C
b
3

INV
1

INV
2

C
b
4

C
b
2

V
bth

distributor

Realization of proposed rectifier

6 units
stacked

V
bth

distributor

High

Low

V
bth

generator

VDD

V
bth
=V
th

[2]

12

RF
in

DC+

DC
-

V
bth

PLS

C
b
3

INV
1

INV
2

C
b
4

V
bth

distributor

Realization of proposed rectifier

6 units
stacked

V
bth

distributor

High

Low

V
bth

V
bth

C
b
1

C
b
2

[2]

13

DC+

IN

DC
-

C
P

C
P2

M
n2

V
bth

V
bth

M
n1

C
P3

Conventional NMOS Half
-
wave Rectifier

V
bth

: External

[2]

Parasitic capacitance C
P
: Large

V
th

drop : External cancellation

14

Ferro

cap.

M
p1

IN

C
P

DC+

DC
-

(Internal V
th

cancellation)

C
b

C
b

M
n1

Proposed CMOS Half
-
wave Rectifier


IVC

C
INF

PMOS

Parasitic capacitance C
P
: Small

V
th

drop : Internal cancellation

[1]

15

VDD


IVC

VSS

IN+

IN
-

D
1

D
2

Proposed CMOS Full
-
wave Rectifier Circuit

Over
-
current

protection

(AC GND)

Over

current

C
P


IVC

Good configuration for high efficiency

C
INF


IVC


IVC

[1]

16

Why Current Mode
Demodulator?

17

Far

Near

Incoming Power
P
rec

Operating region

Voltage Detection for Demodulator

Device

breakdown (4V)

Small

Large

Time

V
IN

V
IN

Near

Far

Detection

result

Modulation

index : (15%)

V
IN
,

Tag

IC

I

IN

P
rec

Tag

input

[1]

18

Current Detection for Demodulator

I
IN

Large

V
IN

Incoming Power
P
rec

Time

I
IN

I
IN

Modulation

index : (15%)

V
IN
,

Tag

IC

I

IN

P
rec

Device

breakdown (4V)

Near

Far

Far

Near

Large

Operating region

Detection

result

Tag

input

[1]

19

+

V
ASK

Current

comparator

Reference

Current

Generator

Subtraction

I
ASK

I
PK

I
SIG

I
REF

Current
-
mode Demodulator Block Diagram

Modulated

current

I
REF

= I
PK
x n

I
PK

I
SIG

= (I
PK


I
ASK
)

I
ASK

Current Peak Hold

LPF

(baseband)

[1]

20

[3]

21

[3]

[3]

22

[3]

[3]

23

[3]

[3]

24

FeRAM

Stefano Bonetti, Johan Dahlbäck, Hanna Henricsson and Jutta Müntjes

2B1750 Smart Electonic Materials, KTH

26th of October 2005


Adopted from ISSCC 2006 and also

25

FeRAM
-

Theory


Spontaneous polarization: above the Curie
-
temperature T
C

is
the structure cubic, below a dipole moment occurs
(displacement)


A different charge
Δ
Q can be observed whether the material
is switching or non
-
switching:

Binary state 1

Negative electric field

Negative polarization

Binary state 0

Positive electric field

Positive polarization

Example: PZT

(lead zirconate
-
titanate)

Q
A
cap
P
[4]

26

WL

WL

PL

PL

BL’

BL

Sense AMP

WL

PL

BL

Sense AMP

V
ref

[4]

27

Offset cell

[4]

28

[4]

29


FeRAM
-

Requirements



Small size


High speed


High lifetime


Destructive reading (after every reading operation is a
writing operation required)


Low coercive field


Low power memory devices


Large hysteresis


High remanent polarization

30

EEPROM

FeRAM

Cell

structure

Programming
principle

Charge injection

Polarization change

Read

Speed

25
µ
s

Power

12.5
µ
W

Write

Speed

3ms

25
µ
s

Voltage

16V

3V

Power

35.0
µ
W

15.7
µ
W

FeRAM Characteristics

BL

CG

AG

SG

High speed

Low power

BL

PL

WL

XBL

[1]

31

129tags/s

44tags/s

2.9 times

higher

EEPROM

FeRAM

Advantages of the Tag with FeRAM

Condition : Read/Write operations

66%

reduction

Operating time

Throughput

Read

3.6ms

Read

3.6ms

Write

19.4ms

Write

4.2ms

[1]

32

Tag IC Performance Summary

Operating Frequency
860MHz - 960MHz
Modulation Index (Forward)
15% (Minimum)
Communication Range
Read: 0m - 4.3m
(4W EIRP F40k / R40k)
Write: 0m - 4.3m
Read/Write Throughput
(F40k / R160k)
129tags/s
Tag IC Power
80µW
ESD Protection (HBM)
3,000V
Anti-collision
Binary tree protocol
Technology
0.35-µm CMOS FeRAM
Die Size
1.23mm x 1.50mm
33

Summary

Passive UHF Read/Write Tag IC with FeRAM

4.3m Read/Write communication distance

CMOS only rectifier which has 36.6% efficiency,

2.1 times higher than the conventional

Low
-
voltage current
-
mode demodulator

which has 27dB dynamic range for the incoming power

Fabricated in 0.35
-
µm CMOS/FeRAM technology

Tag throughput with FeRAM

2.9 times higher than tags with EEPROM

for both read and write operations

34

References
:

[
1
]

H
.

Nakamoto

et

al
.
,

“A

Passive

UHF

RFID

Tag

LSI

with

36
.
6
%

Efficiency

CMOS
-
Only

Rectifier

and

Current
-
Mode

Demodulator

in

0
.
35
μm

FeRAM

Technology,”

ISSCC

Dig
.

Tech
.

Papers
,

session

17
,

2006
.

[2] T. Umeda et al., “A 950MHz Rectifier Circuit for Sensor Networks
with 10m
-
Distance,”
ISSCC Dig. Tech. Papers
, pp. 256
-
257, Feb.,
2005.

[3] A. Djemouai And M. Sawan., “New Cmos Current
-
mode Amplitude
Shift Keying Demodulator (Askd) Dedicated For Implantable
Electronic Devices,” IEEE (ISCAS), pp. 441
-
444, 2004.

[4]
S. Bonetti et al.,


FeRAM, MRAM, RRAM ,” [online resource] Oct.,
2005.