COURSE DESCRIPTION Cp Eng 311 Introduction to VLSI Design

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COURSE DESCRIPTION


Cp Eng 311


Introduction to VLSI Design

(Offered each Fall Semester)


Required or Elective Course:
Elective


Catalog Description:


(LEC 3.0) An introduction to the design and implementation of very large scale
integrated systems. Pr
ocedures for designing and implementing digital integrated
systems, structured design methodology, stick diagrams, scaleable design rules, and
use of computer aided design tools. Prerequisite: CpEng 213.



Prerequisites by Topic:

Elementary logic design te
chniques, both combinational and
sequential, and Familiarity with basic electrical circuits and electronics.


Textbooks and other required material:

Rabaey, Chandrakasan and Nikolic,
Digital Integrated Circuits A Design Perspective
,
2
nd

edition (Prentice H
all, 2002).

PowerPoint lecture slides and Tutorials & notes about Mentor Graphics CAD tools


Course learning outcomes/expected performance criteria:

1.

Understand the theory of the field
-
effective transistor (FET), principles of CMOS
technology and family of

CMOS circuits; static, dynamic, pass transistor.

2.

Learn the industrial design flow of VLSI systems using VHDL and synthesis;
behavioral, RTL, and structural models and simulations at different level of
abstractions

3.

Learn CMOS design using CAD tools includi
ng design aids: layout, design rule
checking, SPICE simulation, and optimization techniques of power, delay and
area.

4.

Learn how to design complex CMOS blocks; custom data
-
path circuits,
semiconductor memories, PLAs, shifters and sequential circuits.

5.

Be abl
e to apply the above objectives by designing a chip as the course design
project using Mentor Graphic CAD tools


Topics

covered
:

1.

Intr
o

to CMOS
, FET, fabrication, layout





2

week
s

2.

Implementing combinational Logic in CMOS families


2 week

3.

Dynamic CMOS Logi
c design





1 week

4.

Cell Delay and Power Estimation





1.5 weeks

5.

Sequential

circuits and flop/latch Design; timing analysis


2

week
s

6.

Clock distribution, PLL design and clock skews



1.5 weeks

7.

Design complex CMOS blocks and Testing



3 Weeks

8.

Floorpla
nning, Routing and Placement
, Future Trends


2

week
s

9.

Project Class presentations






1 week


Class/laboratory schedule:

Two 75
-
minute lectures per week. Five laboratory exercises are assigned; Logic
design using VHDL and synthesis, primitive CMOS gates u
sing design architect
(DA), QuickSim and AccuSim, layout and simulation of basic CMOS gates, Design
with Schematic Driven Layout (SDL), and VHDL synthesis with SDL.


Course design project

Semester design project was assigned. A list of design projects wa
s given to students
to choose from. Students were encouraged to bring their own chip design ideas as
well. Based on the design project complexity, students can work individually, or work
in groups of two or more. There is design check in the middle of the

semester, where
oral and written design reviews are conducted. At the end of the semester, a formal
project report and demonstration are required. Designs are fabricated using Mentor
Graphics CAD tools.


Contribution of Course to Meeting the Professiona
l Component
:



Students are exposed to the state
-
of
-
the
-
art of designing integrated circuits in
CMOS technology, culminating in a significant design project.



The course uses state
-
of
-
the
-
art industrial strength CAD tools and is strongly
influenced by indus
try practice.


Relationship of course learning outcomes to ECE program outcomes:


ECE

Outcome

Course Outcomes


Comments

1

2

3

4

5

a

S

S

M

M

S

A balanced approach is taken in introducing the theory of
FET avoiding unnecessary physics theorems

b



S

S

S


c

M


S

S

S


d


S

S

S


Students are introduced to the multidisciplinary applications
of CMOS technology in ICs industry

e

W

M

M

M

S

Students are exposed to life
-
long learning through self
-
guided research and design project ownership.

f





S

Students

implement industry ethics standards through out
the design project

g


M

M

M

S

Students present their lab assignments to the instructor or
course TA and their final design project to class

h





S


i

S

M



S

Students are required to understand the princ
iples of design
in CMOS technology and apply their knowledge and skills
for the design project.

j

S

S

M

M

M


k

M

S

S

S

S

Students are exposed to the state
-
of
-
the
-
art of the industry
standard CAD tools and use them in lab assignments and
design project

l


S

M

M

S


S


strong connection; M


medium connection; W


weak connection


Prepared by:

Waleed K. Al
-
Assadi




Date:
June 17, 2008