An N
th
Order Central Symmetrical Layout Pattern for
Nonlinear Gradients Cancellation
Xin Dai, Chengming He, Hanqing Xing, Degang Chen, Randall Geiger
Department of Electrical and Computer Engineering
Iowa State University
Ames, IA 50011 USA
Abstract—In this paper, systematic mismatch due to parameter
gradients is modeled and analyzed. A new layout strategy with
flexible cell placement is proposed. Theoretical analysis shows
its property of canceling the mismatch between two devices
due to up to n
th
order gradient effects by using 2
n
unit cells for
each device. Simulation results show that the proposed
technique gives better matching characteristics than other
existing layout techniques under nonlinear gradients.
I. I
NTRODUCTION
Mismatch is the random variation between identically
designed devices after fabrication. The matching accuracy, to
some extent, dominates the performance of analog and
mixed signal integrated circuits. For example, the matching
accuracy of the sampling capacitors in the switched
capacitor amplifier directly affects the performance of a
pipeline/cyclic analogtodigital converter. The matching
characteristic of current mirrors also plays a key role in many
applications [1] [2]. Layout techniques for handling the
mismatch become more important for high performance
circuits design since even a small amount of mismatch may
easily hurt the performance of a precision circuit. Over the
years, great efforts have been made in the study of mismatch
and layout strategies [3][6]. Previous studies show that the
causes of mismatch can be categorized as systematic and
random variations. The random variations are usually
modeled as Gaussian distribution and tradeoffs can be made
between area and matching accuracy [4]. The systematic
variations are usually related to the process and show up as
spatial gradients in device parameters. The mismatch due to
systematic variations may be of the same level of that due to
random variations [7]. If the random mismatch can be
controlled by increasing area, systematic mismatch becomes
dominant. Furthermore, increasing area actually makes the
gradient effect more significant. Since the mismatch due to
systematic variations can cause apparent degrading effect on
the performance of a system with low specifications, it
should be carefully handled and minimized. Despite the
widely recognized importance of matching, existing layout
strategies dealing with the systematic mismatch are quite
limited. Putting unit cells closely somehow reduces the
gradient effect, but does not cancel it. The common centroid
pattern, which is most widely used, can only compensate for
linear gradient [8]. A circular symmetry pattern [6] has the
potential to cancel nonlinear gradients, but it is not area
efficient and not practical since the unit cells need to be
placed diagonally or in some particular angle with each
other, which can not be easily realized in most of today’s
processes. This paper studies systematic mismatch
compensation and proposes a practical and area efficient
layout strategy to handle the mismatch due to nonlinear
gradients.
The rest of the paper is organized as follows. In section
II, general mathematical model of gradient effect is given.
Section III describes the layout strategy and shows how it
can cancel nonlinear gradient effect and section IV gives the
simulation results of the proposed and existing layout
strategies.
II. G
RADIENT
M
ODELING
A twodimension polynomial function p(x, y) can be used
to model the device parameter value at the point (x, y). A
parameter that only has linear (1
st
order) gradient can be
modeled as
1 1
(,) (,)
p
x y G x y C= +
(1)
where (x,y) is the location of the point of interest. C is a
constant irrespective to x and y. And
1 1,0 0,1
(,)G x y g x g y= + (2)
is the 1
st
order gradient component of the parameter p. g
1,0
and g
0,1
are the linear gradient coefficients.
Equation (1) can be easily extended to the higher order
cases. Generally, a parameter that has up to n
th
order
gradients can be modeled as
1
(,) (,)
n
n i
i
p
x y G x y C
=
= +
∑
(3)
where
,
0
(,)
i
j
i j
i j i j
j
G x y g x y
−
−
=
=
∑
(4)
is the i
th
order gradient component of p. g
j,ij
is the coefficient
of the j
th
polynomial term x
j
y
ij
in the i
th
order component G
i
.
Now consider a unit cell in a device’s layout, the
parameter of the unit cell should be the averaged parameter
value over the area of the unit cell. Since the area of the unit
cell is usually small, the gradient effect inside the unit cell is
negligible and the parameter of the unit cell can be simply
represented by the parameter at a particular point S of the
unit cell. The location of this point is regarded as the location
of the unit cell. For a device composed of m unit cells
located at (x
1
,y
1
)…(x
m
,y
m
), if up to n
th
order gradients are
taken in to consideration, the device’s parameter can be
expressed as
1
(,)
m
n i i
i
P p x y
=
=
∑
(5)
For two identical devices A and B, ideal matching is
achieved if
A B
P P= (6)
If n>1, by substituting x with (xx
0
+x
0
) and substituting y
with (yy
0
+y
0
), (3) becomes
,0 0 0 0
1 0
(,) ( ) ( )
n i
j i j
n j i j
i j
p
x y g x x x y y y C
−
−
= =
= − + − + +
∑∑
(7)
which can be rewritten as
,0 0 0 0
0
1
,
1 0
(,) ( ) ( )
n
j
n j
n j n j
j
n i
j i j
j i j
i j
p x y g x x x y y y
g x y C
−
−
=
−
−
−
= =
= − + − + +
+
∑
∑∑
(8)
Define T
1
to be the 1
st
term in (8) and expending it gives
( )
( )
1,0 0
0 0
0 0
0
( )
( )
j
n
j k k
j n j
j k
n j
n j l l
l
j
k
n j
l
T g x x x
y y y
−
−
= =
−
− −
=
−
= − ×
−
∑ ∑
∑
(9)
Equation (9) can be rewritten as
1,0 0
0
,,0 0
0 0,0,1
( ) ( )
( ) ( )
n
j n j
j n j
j
n
k l
j n j k l
j k l k l n
T g x x y y
g
x x y yα
−
−
=
−
= ≥ ≥ + ≤ −
= − − +
− −
∑
∑ ∑
(10)
where α
k,l
is the coefficient of (xx
0
)
k
(yy
0
)
l
. Notice that the
order of the 2
nd
term in the right hand side of (8) and the 2
nd
term in the right hand side of (10) are both no greater than
(n1). That means (8) can be expressed in the form
1
,0 0
0 1
(,) ( ) ( ) (,)
n n
j n j
n j n j i
j i
p x y g x x y y G x y C
−
−
−
= =
′ ′
= − − + +
∑ ∑
(11)
where
,
0
(,)
i
j
i j
i j i j
j
G x y g x y
−
−
=
′ ′
=
∑
(12)
has the same form as G
i
(x, y), but with different coefficients.
And C’ is a constant. Equation (11) shows that the center of
n
th
order gradient can be moved from (0, 0) where the n
th
order gradient component G
n
(x, y)
x=0,y=0
=
0 to arbitrarily any
point (x
0
, y
0
) so that G
n
(xx
0
, yy
0
)
0 0
,
 0
x x y y= =
=, and this will
only introduce lower order gradient components.
III.
T
HE
N
TH
O
RDER
C
ENTRAL
S
YMMETRICAL
L
AYOUT
P
ATTERN AND
N
ONLINEAR
G
RADIENTS
C
ANCELLATION
The central symmetrical layout pattern is for 11
matching between two identical devices under gradient
effect. A description of the pattern is as follows:
i)
The 1
st
order form of the pattern is just any common
centroid pattern. Such as shown in Fig. 1(a) and (b).
Common centroid layout pattern ensures the cancellation of
linear (1
st
order) gradient effect.
ii)
The n
th
(n>1) order central symmetrical pattern can be
defined in terms of the (n1)
st
order pattern. The n
th
order
pattern is composed of two (n1)
st
order patterns symmetrical
to a center
C
n
. There are two cases according to n’s parity:
a) If n is odd, the unit cells of each device is central
symmetrical around
C
n
. That means for each unit cell of
device A at point P, there is another unit cell of device A at
point P’ and the middle point of segment PP’ is exactly the
symmetrical center
C
n
.
b) If n is even, the unit cells of the two devices in one of the
(n1)
st
order patterns should be interchanged so that the
position of device A’s unit cells are central symmetrical to
device B’s unit cells around
C
n
. That means for each unit cell
of device A at point P, there is an unit cell of device B at
point P’ and the middle point of segment PP’ is exactly the
symmetrical center
C
n
. Fig. 2 and Fig. 3 show some high
order (n ≥ 2) central symmetrical layout patterns.
The following analysis will show how the central
symmetrical layout pattern can cancel nonlinear gradient
effect.
Suppose both device A and device B has
m
unit cells.
i) If n=1, the parameter only has linear gradient effect.
According to (5), the parameter of device A is
( )
1 1,0 0,1
1 1
(,)
m m
A Ai Ai Ai Ai
i i
P p x y g x g y C
= =
= = + +
∑ ∑
(13)
Similarly, the parameter of device B is
( )
1 1,0 0,1
1 1
(,)
m m
B Bi Bi Bi Bi
i i
P p x y g x g y C
= =
= = + +
∑ ∑
(14)
A
B
B
A
A
B
B
A
(b)
(a)
Figure 1. Examples of 1
st
order central symmetrical pattern
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
(b)
(a)
Figure 2. Examples of 2
nd
order central symmetrical pattern
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
(a)
(b)
Figure 3. Examples of 3
rd
order central symmetrical pattern
The centroid of a device composed of
m
unit cells located
at (
x
i
,
y
i
),
i
=1,2,…,
m
are defined as (
x
c
,
y
c
) where
1
1
m
c i
i
x x
m
=
=
∑
(15)
1
1
m
c i
i
y y
m
=
=
∑
(16)
From (13) ~ (16), it is not difficult to derive that (6) holds
if and only if
x
cA
=
x
cB
and
y
cA
=
y
cB
. This is why common
centroid layout pattern can cancel linear gradient effect.
ii) If n>1, since the higher order pattern are constructed
by duplicating lower order patterns, the number of unit cells
of each device, m, must be an even number. Now consider
the two cases according to n’s parity:
a)
If n is odd
Consider device A, according to the layout pattern, for a
unit cell A
i
at (
x
Ai
,
y
Ai
), there must be another unit cell A
mi
at
(
x
Ami
,
y
Ami
) such that
x
Ai

x
Cn
=
x
Cn

x
Ami
and
y
Ai
y
Cn
=
y
Cn
y
Ami
.
Then for any
0
j
n≤ ≤
( ) ( ) ( ) ( )
j n j j n j
Ai Cn Ai Cn Am i Cn Am i Cn
x x y y x x y y
− −
− −
− − = − − −
(17)
Choosing
x
0
and
y
0
in (11) to be
x
Cn
and
y
Cn
and then
substituting (11) to (5) gives
( )
1
1 1
(,)'
m n
A j Ai Ai
i j
P G x y C
−
= =
′
= +
∑∑
(18)
Since unit cells of device B have the same central
symmetry property,
( )
1
1 1
(,)'
m n
B j Bi Bi
i j
P G x y C
−
= =
′
= +
∑∑
(19)
From (18) and (19), the difference between the parameter
of device A and the parameter of device B is given by
( )
1
1 1
(,) (,)
m n
A B j Ai Ai j Bi Bi
i j
P P G x y G x y
−
= =
′ ′
− = −
∑∑
(20)
which means the mismatch due to the n
th
order gradient
effect has been cancelled.
b)
If n is even
According to the layout pattern, for a device A’s unit cell
A
i
at (
x
Ai
,
y
Ai
), there is a corresponding device B’s unit cell B
i
at (
x
Bi
,
y
Bi
) such that
x
Ai

x
Cn
=
x
Cn

x
Bi
and
y
Ai

y
Cn
=
y
Cn

y
Bi
. Then
for any
0
j
n≤ ≤
( ) ( ) ( ) ( )
j
n j j n j
Ai Cn Ai Cn Bi Cn Bi Cn
x x y y x x y y
− −
− − = − − (21)
Choosing
x
0
and
y
0
in (11) to be
x
Cn
and
y
Cn
and
substituting (11) to (5), the parameters of device A and
device B are given by
1
,
1 0 1
( ) ( ) (,)
m n n
j n j
A j n j Ai Cn Ai Cn j Ai Ai
i j j
P g x x y y G x y C
−
−
−
= = =
′ ′
= − − + +
∑ ∑ ∑
(22)
and
1
,
1 0 1
( ) ( ) (,)
m n n
j n j
B j n j Bi Cn Bi Cn j Bi Bi
i j j
P g x x y y G x y C
−
−
−
= = =
′ ′
= − − + +
∑ ∑ ∑
(23)
Calculating (22) – (23) still results in (20).
Therefore the mismatch due to the n
th
order gradient
effect is cancelled for any n>1.
Since the n
th
order layout pattern is built from the (n1)
st
order layout pattern, which can cancel the (n1)
st
order
gradient effect, the n
th
order pattern should preserve this
property and also be able to cancel the (n1)
st
order gradient.
Following this way, it is not difficult to draw the conclusion
that the n
th
order central symmetrical layout pattern can
cancel from 1
st
up to n
th
order gradient effects.
The above analysis also shows that, for any layout
pattern of two identically designed device, as long as the unit
cells of each device are central symmetrical by themselves,
the layout pattern can cancel odd order gradients; as long as
the unit cells of one device are central symmetrical to those
of the other device, the layout pattern can cancel even order
gradients.
IV.
C
OMPARISON OF
D
IFFERENT
L
AYOUT
P
ATTERNS AND
S
IMULATION
R
ESULTS
To evaluate the performance of the proposed layout
technique, we did simulations on some of the existing layout
patterns and the proposed pattern under different gradient
effects. The layout patterns we chose are 1
st
order (common
centroid) ~ 5
th
order central symmetrical patterns (Fig. 4 (a)
~ (e)), 2
nd
order circular symmetry pattern [6] (Fig. 4(f)) and
hexagonal tessellation [6] (Fig. 4(g)). The same total device
area is assigned for each layout pattern. The gradients with
different highest orders are generated for simulation. The
simulation results are summarized in Table 1.
Simulation results show that for n=1,…,5, the n
th
order
central symmetrical pattern can cancel up to n
th
order
gradient effects, which is consistent with the previous
analysis. However, the hexagonal tessellation, as mentioned
in [6], only cancels up to 2
nd
order gradients. The 2
nd
order
circular symmetry pattern cancels up to the 3
rd
order
gradients, instead of only the 1
st
and 2
nd
order gradients as
mentioned in [6]. This is because in this pattern the
placement of the unit cells of a device is central symmetrical
around the center of the circle. Then according to the
analysis in section II and III, it should also cancel the 3
rd
order gradient. Compared with the existing layout
techniques, the proposed central symmetrical layout is more
area efficient and flexible in cell placement. And it is easy to
be extended to cancel any high order gradient.
V.
C
ONCLUSION
This paper modeled and analyzed the systematic
mismatch due to linear and nonlinear gradient effects. Based
on the analysis, we proposed an area efficient central
symmetrical layout pattern with quite flexible cell placement.
The n
th
order form of the pattern uses 2
n
unit cells for each
device and its property of canceling up to n
th
order gradients
is mathematically proved and verified in simulation. The
proposed layout pattern gives excellent matching between
two identically designed devices and is suitable for practical
applications.
R
EFERENCES
[1] P. Drennan, C. McAndrew, “Understanding MOSFET mismatch for
analog design,” IEEE J. SolidState Circuits, vol. 38, issue. 3, pp.
450456, Mar. 2003.
[2] Z. Wang, W. Guggenbuhl, “A voltagecontrollable linear MOS
transconductor using bias offset technique,” IEEE J. SolidState
Circuits, vol. 25, issue. 1, pp. 315317, Feb. 1990.
[3] S. Lovett, M. Welten, A. Mathewson, B. Mason, “Optimizing MOS
transistor mismatch,” IEEE J. SolidState Circuits, vol. 33, pp. 147
150, Jan. 1998.
[4] M. J. M. Pelgrom, A. C. J. Duinmaijer, A. P. G. Welbers, “Matching
properties of MOS transistors,” IEEE J. SolidState Circuits, vol. SC
24, pp 14331439, 1989.
[5] K. Lakshmikumar, R. Hadaway, and M. Copeland, “Characterization
and modeling of mismatch in MOS transistors for precision analog
design,” IEEE J. SolidState Circuits, vol. SC21, pp. 10571066,
1986.
[6] Chengming He, Kuangming Yap, Degang Chen, R. Geiger, “Nth
order circular symmetry pattern and hexagonal tesselation: two new
layout techniques cancelling nonlinear gradient,” Circuits and
Systems, 2004. ISCAS '04. Proceedings of the 2004 International
Symposium on , vol. 1, pp. 237240, May 2004.
[7] Eric Felt, “Measurement and Modeling of MOS Transistor Current
Mismatch in Analog IC’s,” Proc. of ACM, pp. 272277, 1994.
[8] A. Hastings, The Art of Analog Layout. Prentice Hall, New Jersey,
2000.
(a) (b)
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
B
A
A
B
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
A
B
B
A
(c)
(d) (e)
A
B
B
A
A
B
A
A
A
A
B
B
B
B
(f) (g)
Figure 4. The six layout patterns used in simulation
TABLE I. S
IMULATION RESULTS OF DIFFERENT LAYOUT PATTERNS
Highest Order of Gradient Effect
Mismatch
(%)
1
st
2
nd
3
rd
4
th
5
th
Fig. 4 (a)
0 2.77 5.22 7.43 10.39
Fig. 4 (b) 0 0 0.24 0.87 1.70
Fig. 4 (c) 0 0 0 0.01 0.068
Fig. 4 (d) 0 0 0 0 0.0023
Fig. 4 (e) 0 0 0 0 0
Fig. 4 (f) 0 0 0 0.026 0.18
Fig. 4 (g) 0 0 0.26 0.50 2.24
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