EE 3320 exam1 sample..

dehisceforkElectronics - Devices

Nov 2, 2013 (3 years and 10 months ago)

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EE 3320, Spring Semester,
200
9

Exam #1

(Section 1)


Name: ________________________

Email: ________________________


Problem 1
Find the simplest SOP of

the following
logic
function

(cost is measured by the total
number of inputs of the gates and the number of gates).








Problem
2

Derive a CMOS gate implementation for the logic function

Use
as few transistors as possible.







Problem
3

Derive a CMOS gate implementation for the logic function

assuming

the fan
-
in limit of each gate is 2.

Explain why in the CMOS implementation there is a
limit on the fan
-
in from the circuit performance point of view.








Problem 4 The following circuit uses transmission
gates. a) Derive the correspon
ding Truth table,
and b) E
xplain the advantage and disadvantage of a circuit using tran
smission gates. (The problem
tests

your reading of the text book.)




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