A 65nm CMOS Ultra Low Power and Low Noise 131MΩ Front-End ...

dehisceforkElectronics - Devices

Nov 2, 2013 (3 years and 7 months ago)

94 views

A
65nm CMOS
Ultra Low Power

and Low Noise

131

Front
-
End Transimpedance Amplifier


Jiaping Hu

Department

of Electrical and
Computer Engineering

Northeastern University

Boston,
Massachusetts

jhu@ece.neu.edu

Yong
-
Bin Kim

Department

of Electrical and
Computer Engineering

Northeastern University

Boston,
Massachusetts

ybk@ece.neu.edu

Joseph Ayers

Department

of
Biology and

Marine Science Center

Northeastern University

Nahant
,
Massachusetts

lobster@neu.edu





Abstract


In this paper, the design
, implementation
and
simulation of a high
-
transimpedance
gain,
ultra
low
-
power
dissipation and low
-
noise CMOS front
-
end transimpedance
amplifier (TIA) is presented
.

F
or interfaci
ng with bio
-
sensor

array

and analog neuron circuit
, a
n improved
capacitive
-
feedback TIA topology
is used
with active load to
obtain

a
131


gain,
1.45M
Hz bandwidth,
85
fA/rt(Hz)

input
-
referred

current noise

floor
, near
0
º

phase response

and

520
mV

peak
-
to
-
peak output swing
. The proposed circuit

dissipat
es

less than 30μW with
0
.8V supply

voltage
, and

t
he
circuit is implemented in
65n
m CMOS

Predictive Technology
Model
.

I.

I
NTRODUCTION

Recent advance
s

in biomimetics
,

such
as
model
ing

based
on elements of the stomatogastric ganglion

and its

electronic

implementation, suggested a new approach to build
a
true
autonomous bio
-
robots [1].
Those bio
-
robot systems consist

of
several
functional
components.
Central Pattern Generation
(CPG) is t
he
intrinsic
mechanism

of

animals


natural behavior
,
which
acts inherently as a bio
-
oscillator

to provide

neural
signal throughout the
system
. Th
erefore,
an
electronic
neuron
-
based
CPG module is the core of
the
behavior control
circuit

in
the bio
-
robot
sys
tem
.
At the same time, b
iosensor

array
s

serve

as

the interface

between the external environment

and

CPG
,
wh
ile feedback sensors interface

between synthe
tic

actuators

and bio
-
feedback generator
s
.
Meanwhile, integrated
photodiodes, transimpedance amplifiers and LEDs form the
optical
-
signal path.
Finally, a microzyme
-
based bio
-
chemical
battery provides the 0.8V supply voltage.


Due to the
stringent

power,
supply,
area and robustness
requirements

in s
uch applications,
integrated circuit approach
becomes essential
.

One
of the
potential

method
s

to implement
the

bio
-
robot control system
consists of bio
sensors, ultra
-
low
power A/D converters
,

and digital
-
domain processor [2].

The
main

disadvantage of
th
e

digital IC solution
s

is

its
inherently
discrete
-
time

and
deterministic

control
. On the
contrary
,
without the need for data converters

and FSM
,

analog
electronic implementations

provide the desire
d ability of
continuous
-
time
and adaptive
contro
l
[
3]. Howev
er, the latter
method

also

introduces

design challenges in the form of
trade
-
offs between noise, power dissipation, speed
,

and
process variation
s
.

Figure 1 shows the block diagram of a
bionic robot system

with analog IC implementation
.


Figure 1.

Block diagram of a

bionic robot consists of front
-
end biosensor
array, analog neural circuit with CPG, actuators followed by synthetic
muscle, back
-
end feedback biosensor, and transimpedance amplifier in the
optical
-
signal path

(dash lines)
. A bio
-
chemical
fuel cell

provide
s
supply
voltage

for the system.

In a
b
io
nic

u
nderwater
r
obot 'Cyberplasm' with
an a
nalog
e
lectronic
n
ervous
s
ystem

shown in Fig.
2
,

a novel
optical
-
communication mechanism
is adopted
to propagate
and feedback control si
gnals among blocks.
P
hoto
-
diodes
with
particular

wavelength
are
integrated in
the
front
-
end
biosensors

transmitting

optical

signal

to the
following

stage
.
The amplitude of
the

current signal is constrained to the level
of nanoamps [4]
[10]

due to low
-
power operation, limited
sensing abilit
y,
and
low quantum efficiency of silicon
.
A

low
-
noise, low
-
power
,

low
-
voltage

and high gain TIA is

thus

desirable

in the signal path
.
Moreover,
since the TIA works as
This project
was

s
upported

by
the US
National Science
Foundation

under the Grant CBET
-
0943345.

a

preamplifier of the level
-
sensitive analog neuron circ
uit,
a
high

output swing is also
desired
.

At the same time, the
bio
-
robot neural system also requires
an
in
-
phase operation to
obtain

the
real
-
time autonomous control
lability
. In th
is paper
,

we present
a
novel front
-
end
TIA
design that provides

a
high

gain, low input
-
referred current noise, high ou
tput swing
,

and
proper frequency
/
phase response in
a
65nm

CMOS process

for
low voltage
biosensing application
.


Figure 2.

Sea Lamprey
-
based Underwater Bionic Robot

Cyberplasm

[1]
.
A: Synthetic muscle; B: Electronic n
ervous system; C: Bio
-
sensor array; D:
Fuel cell; E: Hydrogel/Polymer backbone

The paper is organized as follows. Section II introduces
and analyzes the topology used in the design. Simulat ion
results are

presented in Section III

followed

by
Section IV
,
where
the performance of the TIA and a comparison with
prior arts

are summarized
.

II.

C
IRCUIT
I
MPLEMENTATION

A.

Improved Capacitive
-
Feedback T
IA

The TIA topology used in this work is shown in Fig.
3
(c)
.
First demonstrated in [5], it exhibits several advantages
in
our
continuous bio
-
robot control applications

over
commonly used

resistive
in Fig.3(a)
or capacitive
-
feedback TIA

in Fig.3(b)
.


Figure 3.

(a) Resistive feedback TIA; (b) Capacitive feedback TIA;

(c)
The schematic of the proposed TIA design with the i
mproved capacitive
feedback
s
ingle
-
e
nded
topology

First, t
he capacitive
-
feedback current amplifier
in Fig.3
drives

current

to the
high impedance

output
with a
gain
of
(1+C
2
/C
1
). Meanwhile, th
e resulting

large
transimpedance
gain
of
(1+C
2
/C
1
)

R
D
,

in turn
,

reduces the input
-
referred
current noise

with

the load
R
D

by t
he same factor [5][6]

as
shown in formula (
2
).

Besides, comparing with a
resistive
-
feedback TIA, the proposed topology avoids the
noise from large R
F

in Fig.3

(a)
.






























































Second, t
he OTA in the feedback loop

adds an additional
180º

phase shift

to the common

capacitive
-
feedback TIA

in
Fig.3(b)
,

thus avoidi
ng

the non
zero phase
-
response

in it
.
It
also pushes
the
location of the pole
from

large C
2

away
by a
factor of (1+A
0
)

as
shown

in
Equation

(
3
)

[5]
.
The
equation

also implies t
he possibility of

further
bandwidth

improvement
by increasing
the gain
of
the
OTA in the new topology

without reducing R
D

and
the
transimpedance gain. As a result,
comparing with the conventional topologies,
the
adopted

topology
relaxes

the trade
-
offs between gain, noise and
bandwidth

in the

design.































Since the
problem from
feed
-
thr
ough c
apacitance is not
serious in
our

biosensing application
,
a
single
-
ended structure
is used for saving power and transistor/pin count.
Note that at
65nm technology node, the sum of V
THN

and V
THP

is close to
0.8V, resulting in a serious biasing problem
at
such
low
supply voltage.
Moreover, d
ue to the low power requirement
of the system, it is also unrealistic to use folded structure.
Thus, f
or
low
-
voltage
, low
-
power

and reliable
operation
of the
underwater bio
-
robot
, t
ransistors in the proposed TIA
are
all
biased

in
weak inversion
.

The load

of the TIA is impl
emented
with

a
long
-
channel
PMOS
transistor
for

maximizing

the

transimpedance gain.
However, the resulting large drain capacitance at this high
impedance output node will
degrade

the bandwidth
and
s
tability
of the TIA. On the other side, avoiding such BW
problem by using short
-
channel transistor introduc
e
s

serious
flicker noise issue

below 1

K
Hz
.
Finally, the active load is
sized to
12.9
μm/0.
3
μ
m to balance among
the
gain, bandwidth
and noise performa
nce. T
he TIA
is followed by a buffer stage
for driving th
e
analog neuron circuit
s
.

B.

Miller
Two
-
Stage OPAMP

As discussed in the previous sections
, a

Miller
Two
-
Stage
OPAMP with high gain, suitable GBW
,

and low
-
power

is
designed

for the

capacitive feedback loop of the
proposed TIA
.

T
he circuit schematic of the proposed Miller 2
-
stage OPAMP
is shown in Figure 4.

W
eak
-
inversion operation

is adopted for
the transistors of

the OPAMP

because of the low
-
power and
low voltage operation requireme
nts.

In

the input stage,

large
-
sized PMOS transistors
(20
μ
m/1
μ
m)
are used
to
minimize

the input
-
referred flicker
noise

and mismatch
. Meanwhile, large transconductance of
this stage is achieved (40μS) to reduce the noise contribution
of other transistors [7].
Finally, for
ensuring

a 1
.5
MHz
bandwidth
of the TIA with
optimized flat frequency
-
response,
OPAMP with
G
ain
-
B
andwidth

larger than 10
MHz is
preferred.


Figure 4.

Schematic of
the proposed miller two
-
stage
OPAMP


Figure 5.

Schematic of the

constant
-
gm bias

c
ircuit

and input
common
-
mode bias circuit

TABLE I.

S
UMMARY OF THE
S
IMULATED
O
PAMP
P
ERFORMANCE

Parameter

Measured Value

Technology

65nm CMOS

DC Gain

85
dB

Unity GBW

1
1
MHz

w/

2pF load

Phase
Margin

70.8
º

Noise Floor

38.6
nV/rt(Hz)

Power Dissipation

19.6
μ
t

mower pupply

M
K8s


In
the output stage,
the values of
the
m
iller capacitor and
its
series resistor are chosen for
an optimized
stability and
RHP
-
zero cancelling
. Transistors in the current

mirror
throughout the OPAMP are biased with large V
GS

to
minimize
the
mismatch and noise. Non
-
minimal sized transistors are
also used to improve the gain and mismatch. However,
attention needs to be paid to the resulting increased C
GD

and
C
GS

at high impe
dance node (
N
m
).
Moreover, the b
ody and
s
ource terminals of
the
PMOS transistors are connected
together in the circuit, which is achievable in
typical

n
-
well
process to reduce the
potential
hot
-
carrier effect. Table I
summarized the simulated
characteristics of the OPAMP.

Fig
ure
5

shows the schematic of the
constant
-
gm bias

circuit
of the
design [5].
Due to the stringent supply voltage, a
PMOS implementation is used for the input bias because of its
relatively
lower threshold voltage (360mV)

th
an NMOS
(420mV)

in the PTM 65nm model
.
In order to improve the
low
-
frequency
stability
of the
amplifier
, long
-
channel devices
are used
to boost the on
-
resistance of
the
transistors

in the
voltage biasing circuit and to improve mis match in the
constant
-
gm c
urrent biasing circuit
.
Simulation results show
that a flat frequency
-
response is achieved in the
proposed

TIA
by pushing the low
-
frequency pole/zero to <1Hz.

III.

S
IMULATION
R
ESULTS

Simulation results of AC analysis are shown in Fig.6. The
proposed TIA exhibit
s a
131
M
Ω

transimpedance gain, which
not only ensures the
correct
functionality of the level
-
sensitive
analog

neural circuit, but also
relaxes

the noise requirement of
the

system.
Meanwhile
, it keeps a flat frequency
-
response up
to 1.45MHz, which is suitable for
controlling

underwater
bio
-
robot.

Moreover, the TIA shows a phase
-
response within
10
º

from
4Hz

to 1
65
K
Hz, thus the in
-
phase control of the
system is achieved. Input
-
referred current
noise, as shown in
Fig.7, is controlled under
1
15
fA/rt(Hz) in the range of
1
kHz
-
1M
Hz. Thus the desired low
-
noise performance of the
front
-
end TIA is achieved.


Figure 1.

Transimpedance gain, phase

response and noise performance

T
he transient performance
is also measured
at
the
practical

operating
frequency
of
the bio
-
robot control circuit. The TIA
exhibits a
520mV

peak
-
to
-
peak output voltage swing at
50

k
Hz

as shown in Fig.8
. T
he in
-
phase signal amplification of
the circuit
is also observed
from this tran
sient analysis.


Figure 2.

Maximum output voltage swing of the TIA

at 50kHz
. Left Y
-
Axis:
Output voltage; Right Y
-
Axis: Input current

Finally
, the power dissipation of the TIA is measured and
summarized in Table II. The high performance OPAMP in the
feedback loop
introduces new sets of design trade
-
offs among
transimpedance gain, band
width and power, thus
providing

the flexib
ility of further modification.

TABLE II.

P
OWER
D
ISSIPATION OF
THE
TIA

Block

Power

OPAMP

19.6
μ
t

Constant
J


Bias

4K4
μ
t

lutput stage

4
μ


T ot al

O9KS
μ
t


IV.

S
UMMARY

T
he
proposed design

achieves
131
MΩ transimpedance
gain,
1.45M
Hz 3dB
-
B
andwidth

and
less than
10
º

phase shift
between
4Hz
-
1
65
K
Hz
. With
an

additional flexibility in design
trade
-
offs

between gain and BW, the AC performance of the
p
roposed TIA is
suitable for bio
sensing applications.
L
ow
current
consumption

(
37
μ
A) as well as low input
-
referred
current noise (
85
A/rt(Hz)
) are
obtained in the design. Finally,
a
520
mV

peak
-
to
-
peak output voltage swing is measured.
That
allow
s
its

application

in autonomous underwater bio
-
robot

control systems
.

Table
I
II shows a comparison with prior arts.

The topology
of the proposed design was first
demonstrated

in [5]. TIA in
the second
column

w
as

designed
for MEMS applications,
which ha
ve

a
very
similar
set

of
design
specifications as
biosensing ap
plications

in the last two columns
. The proposed
design achieves

the
lowest power consumption
, lowest
operating voltage

with comparable
gain,
bandwidth and noise.

V.

C
ONCLUSION

This paper describes a t
ransimpedance
amplifier for
bio
sens
or
s. It utilizes an improved capacitive
-
feedback
topology to avoid the design issue from large on
-
chip resistors
and
to
increase the design flexibility in gain
-
bandwidth
trade
-
off. The proposed TIA is implemented in
PTM 65nm

technology
.
The design
demonstrates

a

131

transimpedance gain with
1.45M
Hz bandwidth, less than 10
º

phase response between
4Hz
-
165
kHz,

520
mV

Peak
-
to
-
Peak
voltage swing,
85
fA/rt(Hz)

input
-
referred current noise, while
dissipating
30
μ
W power with

0
.8V
power
supply.

TABLE III.

T
ABLE
III
.

C
OMPARISON

WITH
P
RIOR
A
RTS

Parameter

[
5
]

[6]

[9]

[8]

This work

Application

Receiver

MEMS

Biosensor

Bio
sensor

Bio
sensor

Technology

.
6
μ
m

CMOS

.18
μ
m CMOS

.35
μ
m CMOS

.18
μ
m CMOS

65nm CMOS

Supply

3V

1.8V

3.3
V

1.8V

0.8V

DC Gai n

8.7k
Ω

56M
Ω

30
M
Ω

100M
Ω

131
M
Ω

Bandwi dt h

550MHz

1.8 MHz

2

MHz

1 MHz

1
.
45

MHz

Input noi se

4.5pA/rtHz

65fA/rt Hz

3fA/rt Hz

1
34
fA/rt Hz

85
fA/rt Hz

Power

30mW

436
μ
W

2
1
mW

1
32
μ
W

30
μ
W



R
EFERENCES

[1]

Ayers, J. and N. Rulkov (2007). Controlling Biomimet ic Underwat er
Robot s with Electronic
Nervous Syst ems. In: Bio
-
mechanisms of
Animals in Swimming and Flying. N. Kato and S. Kamimura. Tokyo,
Springer
-
Verlag. Pp. 295
-
306.

[2]

Shuenn
-
Yuh Lee ; Chih
-
Jen Cheng ; Ch
eng
-
Pin Wang ; Shyh
-
Chyang
Lee
.


A 1V 8Bit 0.95mW Successive Approximat ion ADC for
Biosignal Acquisit ion Syst ems

,

ISCAS 2009. IEEE
.

[3]

J. Lee, Y. J. Lee, K. Kim,
Y. B. Kim, and J. Ayers (2007) “
Low Power
CMOS Adapt ive Elect ronic Cent ral Pattern Generat o
r Design for a
Biomimet ic Robot”,

Neurocomputing 71: 284
-
296.

[4]

Ambient Light Photodiode S
pec
ification.

[5]

B. Razavi,

A 622Mb/s 4.5pA/

H
z CMOS transimpedance amplifier
”,
ISSCC Tech. Digest, San Francisco, CA, Feb. 7
-
9, 2000, pp. 162
-
163.

[6]

James Salvia, Pedram Lajevardi, Mohammad Hekmat, and Boris
Murmann
,

A 56MΩ CMOS TIA for MEMS Applications

, CICC
2009.

[7]

P.R.Gray,R.G.Meyer,P.J.Hurst,andS.H.Lewis,Analysis and Design of
Analog Integrated Circuits.Hoboken,NJ:Wiley,2001.

[8]

Jiaping Hu and Yong
-
Bin Kim,

A Low Power 100M Ohm CMOS
Front
-
End Transimpedance Amplifi
er for Biosensing Applications

,
2010 Mi
dwest Symposium on Circuits and Systems, Seattle,
WA.(Submitted).


[9]

G. Ferrari, F. Gozzini, M. Sampietro,

“A current
-
sensitive front
-
end

amplifier for

nano
-
biosensors with a 2MHz BW

,

ISSCC Dig. Tech.
Papers, pp. 164
-
165, Feb. 2007.

[10]

Indal Song,

Multi
-
Gbit/s

CMOS Transimpedance Amplifier
with
Integrated Photodetector for Optical Interconnects

, PhD Thesis.