EE of NIU
Chih

Cheng Tseng
1
Chapter 6
Digital Data Communications
Techniques
Chih

Cheng Tseng
tsengcc@niu.edu.tw
EE of NIU
Chih

Cheng Tseng
2
Asynchronous and
Synchronous Transmission
timing problems require a mechanism to
synchronize the transmitter and receiver
receiver samples stream at bit intervals
if clocks not aligned and drifting will sample at
wrong time after sufficient bits are sent
two solutions to synchronizing clocks
asynchronous transmission
synchronous transmission
EE of NIU
Chih

Cheng Tseng
3
Asynchronous Transmission
EE of NIU
Chih

Cheng Tseng
4
Asynchronous

Behavior
simple
cheap
overhead of 2 or 3 bits per char (~20%)
good for data with large gaps (keyboard)
EE of NIU
Chih

Cheng Tseng
5
Synchronous Transmission
block of data is formatted as a frame
clocks must be synchronized
can use separate clock line
or embed clock signal in data
need to indicate start and end of block
use preamble and postamble
more efficient (lower overhead) than async
EE of NIU
Chih

Cheng Tseng
6
Types of Error
single bit errors
only one bit altered
caused by white noise
error burst
A group of bits in which two successive erroneous bits are
always separated by less than a given number
x
of correct bits.
burst errors
A burst error of length
B
is a
contiguous sequence of
B
bits in
which
the
first
and
last
bits
and any number of intermediate bits
are received
in error
caused by impulse noise or by fading in wireless
environment
effect greater at higher data rates
EE of NIU
Chih

Cheng Tseng
7
Error Detection
Error is inevitable
detect using error

detecting code
added by transmitter
recalculated and checked by receiver
still chance of undetected error
parity
parity bit set so character has even (even
parity) or odd (odd parity) number of ones
even number of bit errors goes undetected
EE of NIU
Chih

Cheng Tseng
8
Cyclic Redundancy Check
one of the most common and powerful
checks
for block of
k
bits, transmitter generates an
n
bit frame check sequence (FCS)
transmits
k+n
bits which is exactly divisible
by some number
receiver divides frame by that number
if no remainder, assume no error
EE of NIU
Chih

Cheng Tseng
9
Cyclic Redundancy Check
For a block of
k
bits, transmitter generates
n
bit sequence
Transmit
k+n
bits which is exactly divisible
by some number
Receive divides frame by that number
If no remainder, assume no error
EE of NIU
Chih

Cheng Tseng
10
Modulo 2 Arithmetic
Exclusive

OR operation
Binary addition with no carries
Binary subtraction with no carries
1111
+1010
0101
1111

0101
1010
11001
* 11
11001
110010
101011
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Chih

Cheng Tseng
11
CRC

Example
101000110100000
1101010110
110101
110101
111011
110101
111110
110101
101100
110101
110010
110101
111010
110101
01110
101000110101110
1101010110
110101
110101
111011
110101
111110
110101
101111
110101
110101
110101
111010
110101
00000
Message (
M
)
FCS (
R
)
OK!!
T
=
M
+
R
n
bits
n

1 bits
EE of NIU
Chih

Cheng Tseng
12
Error Control
Contains detection and correction of errors
Types of error
Lost frames
Damaged frames
Error control techniques
Error detection: parity bit, CRC
Positive acknowledgment
•
When received error free frame
Retransmission after timeout
•
Frame not acknowledged after predefine amount of time
Negative acknowledgement and retransmission
•
When received frame in which error is detected
EE of NIU
Chih

Cheng Tseng
13
How Error Correction Works
adds redundancy to transmitted message
can deduce original despite some errors
eg. block error correction code
map
k
bit input onto an
n
bit codeword
each distinctly different
if get error assume codeword sent was
closest to that received
EE of NIU
Chih

Cheng Tseng
14
Line Configuration

Topology
physical arrangement of stations on
medium
point to point

two stations
•
such as between two routers / computers
multi point

multiple stations
•
traditionally mainframe computer and terminals
•
now typically a local area network (LAN)
EE of NIU
Chih

Cheng Tseng
15
Line Configuration

Topology
EE of NIU
Chih

Cheng Tseng
16
Line Configuration

Duplex
classify data exchange as half or full
duplex
half duplex (two

way alternate)
only one station may transmit at a time
requires one data path
full duplex (two

way simultaneous)
simultaneous transmission and reception
between two stations
requires two data paths
EE of NIU
Chih

Cheng Tseng
17
Summary
asynchronous verses synchronous
transmission
error detection and correction
line configuration issues
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