PHYSICAL DESIGN ENGINEER

bewgrosseteteSoftware and s/w Development

Dec 13, 2013 (3 years and 7 months ago)

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PHYSICAL DESIGN ENGINEER

DESCRIPTION
:

A challenging

role in physical design

for all NVIDIA

GPU and Mobile chips, including
full chip
floorplanning, powe
r/clock distribution
, timing optimization, place & route, timing closure,
pow
er/signal integrity
analysis, and

physical verification
.

Participate

in developing methodologies, flow

automation and improvements.
Opportunity to work

with the RTL and Circuit designers to ensure the desig
n is balanced and optimized among
physical, RTL, Circui
t specificatio
ns
.


MINIMUM REQUIREMENTS:

-

BS
in Engineering or Science

-

P
ower user of
EDA

tools from Synopsys (
ICC/DC/PT
/ST
AR
-
RC), Cadence (EDI/EPS) or Mentor

(
Olympus
-
SOC)

-

Experience in
Clock/Power Distribution, P&R,
Timing closure, RC Extraction, and verification

on
65
nm
, 40nm, or 28nm

technology

-

2+
years

of
experience
in above areas


PREFERRED
:

-

MS in Engineering or Science

-

Experience in
physical verification tools from

Synopsys (ICV/Mojave) or Mentor (Calibre)

-

Proficiency in Perl, TCL and Makefile scripts