Abstract—A crucial criterion for the dimensioning of three
phase PWM converters is the cooling of the power
semiconductors and thus determination of power dissipation in
the semiconductors at certain operating points and its
maximum. Methods for the calculation and simulation of
semiconductor losses in the most common voltage source and
current source three phase PWM converters are well known.
Here a complete analytical calculation of the power
semiconductor losses for both converter types is presented,
most parts are already known, some parts are developed here,
as far as the authors know. Conduction losses as well as
switching losses are included in the calculation using a
simplified model, based on power semiconductor data sheet
information. This approach should benefit the prediction and
further investigations of the performance of power
semiconductor losses for both kinds of converters. Results of
the calculation are shown. Dependencies of the semiconductor
power losses on the type of converter, the operating point and
the pulse width modulation are pointed out, showing the
general behaviour of power losses for both converter types.
I.
I
NTRODUCTION
Basis for the design of the cooling system of power
electronic equipment is the determination of the expected
power dissipation in the power semiconductors. There are
mainly two kinds of power semiconductor losses to be
considered, the conduction losses and the switching losses
[1], [2]. The blocking as well as the driving losses usually
can be neglected [1].
For the prediction of losses in power semiconductor
circuits different methods are well known. One way is the
complete numerical simulation of the circuit by special
simulation programs with integrated or parallel running loss
calculation [2][5]. The other possibility is to calculate the
electrical behavior of the circuit analytically, i.e. current and
voltage of the power semiconductors, to determine the
semiconductor power losses [1], [2], [6], [7]. As this attempt
yields extensive and complex mathematical problems
simplified calculations are often used. For quick results and
minimized calculation effort simplified calculations are the
appropriate solution. For more detailed information, the
numerical simulation of losses is useful, as the basic
simulation is often executed to know the electrical behavior.
A complete analytical calculation is more useful for basic
investigations of circuits, to clearly see the dependencies of
the losses on the causal parameters and for education
purposes.
In this article, the subject is the complete analytical
calculation of the power semiconductor losses, occurring in
both, voltage source and current source converters. The aim
is to be able to predict the losses most exactly, to clearly
show the dependency of the losses on circuit parameters and
operating point and besides to have a good basis for the
comparison of both converter systems. This goal was
reached. Moreover some interesting dualities are shown by
formulas as well as by diagrams for both systems. The
analytical calculation of power semiconductor losses in
voltage source converters is well known and published [1],
[2], [6], [7]. But yet comparable analytical means especially
to calculate the switching losses of current source
converters as presented here are generally unknown, as far
as the authors know.
In the following there are two sections where occurring
semiconductor losses will be examined regarding their
nature and variations due to different modulation strategies
for both converter types. Analytical expressions utilizing a
linear approach for the semiconductors are given to
facilitate a quick calculation of the semiconductor losses
based on data sheet information. Section II deals with the
voltage source converter. The current source converter
subsequently is covered by section III. The results of the
calculation methods are illustrated and interpreted in section
IV which is followed by section V with the conclusion.
II.
A
NALYTICAL
C
ALCULATION OF
L
OSSES IN
V
OLTAGE SOURCE
C
ONVERTERS
A.
Basic Circuit and Loss Model
For the following calculations a basically linear loss model
for power semiconductors is assumed. Switching loss
energies E
S
will be linearised according to eq. (1).
Conduction losses P
C
for a single semiconductor will be
calculated by eq. (2). Here E
SR
is the rated switching loss
energy given for reference commutation voltage and current
V
ref
and i
ref
while V
V
and i
V
indicate the actual commutation
current and voltage respectively. V
0
and r constitute the
semiconductors threshold voltage and differential resistance
respectively.
Semiconductor Losses in Voltage Source and Current Source IGBT Converters Based on
Analytical Derivation
M.H. Bierhoff, F.W. Fuchs
ChristianAlbrechtsUniversity of Kiel, Germany
Email: mib@tf.unikiel.de, fwf@tf.unikiel.de
(1)
ref
V
ref
V
SRS
i
i
V
V
EE ⋅⋅=
2
0 VVC
iriVP ⋅+⋅=
(2)
ωt
ωt
In this section Voltage source converters as shown by
figure 1 are only regarded as being switched at a constant
switching frequency for each switching device which in turn
means that they are operated by continuous PWM only.
Besides a constant dc link voltage is assumed. For the VSC
the load current i
L
is one important parameter for the
switching losses. As the load current is considered
sinusoidal for the following calculations, the converter’s
pulse rate is assumed to be appropriately high.
B.
Switching Losses
The equation of the switching losses P
SV
of a VSC with
sinusoidal ac line current and with IGBT switching devices
is given by equation (3) from [1].
Here f
S
is the switching frequency, E
ON,I
and E
OFF,I
are the
turnon and turnoff energies of the IGBT respectively,
E
OFF,D
is the turnoff energy in the power modules’ diode
due to reverse recovery charge current, V
dc
is the dc link
voltage and î
L
is the peak value of the ac line current
assumed to be sinusoidal. The switching energies provided
by data sheets are given for a certain reference voltage V
ref
equal to the blocking state voltage of the IGBT occurring
before the corresponding commutation and a reference
current I
ref
which is the onstate current after this
commutation. Note that eq. (3) only remains valid for
continuous PWM as the switching losses become dependent
on the phase angle when discontinuous PWM is introduced.
C.
Conduction Losses
In contrast to the switching losses the conduction losses
are directly depending on the modulation function that is
used. In [1], [2], [6], [7] formulas for reckoning the
conduction losses depending on the modulation function are
presented. The publications [8] and [9] provide extensive
information on how to define a certain modulation function
by the distribution of the duty cycles for the two different
zero vectors.
In figure 2 the modulation waveform of the common
carrier based sinusoidal PWM M
STM
(ωt) [1], [2], [6] and
suboptimal space vector PWM M
SVM
(ωt) [3], [7][10] with
equal distribution of duty cycles for the two zero vectors
are shown. With the knowledge of the relevant modulation
function the conduction losses P
CV,I
of a single
semiconductor IGBT are expressed by equation (4).
Likewise the conduction losses that appear in one diode
P
CV,D
can be written as in eq. (5). The sum gives the total
conduction losses P
CV
in eq. (6) for all twelve
semiconductors.
In these equations ω is the load current’s angular frequency,
M(t) is the modulation function, V
CE,0
is the IGBT’s
threshold voltage, r
CE
is the IGBT’s differential resistance,
V
F,0
and r
F
are the diode’s threshold voltage and differential
resistance respectively. The modulation function M(t) in
case of carrier based sinusoidal PWM, M
STM
(ωt), is a sine
wave, of course. Whereas in case of SVPWM this function
T1
T2
T3
T4
T5
T6
V
dc
i
L
1
2
3
Fig. 1. Voltage source converter
Fig. 2. Modulation function; top: for sinetriangular PWM; bottom:
suboptimal SVPWM at M = 1
0
π
2
π
1.5
1.0
0.5
0.5
1.0
1.5
0
M
STM
(ωt)
0
0
π
2
π
1.5
1.0
0.5
1.0
1.5
M
SVM
(ωt)
(4)
(5)
+⋅
−
⋅⋅
⋅
⋅
=
∫
tdt
iV
P
LF
DCV
ωω
π
π
2
M(t)1
)sin(
2
ˆ
0
0,
,
(6)
+⋅
+
⋅⋅
⋅
⋅
=
∫
td
2
M(t)1
t)sin(
2
ˆ
V
P
π
0
CE,0
ICV,
ωω
π
L
i
(3)
( )
ref
L
ref
dc
DOFFIOFFIONSSV
i
i
V
V
EEEfP
ˆ
6
,,,
⋅⋅++⋅⋅=
π
td
2
M(t)1
t)(sin
2
ˆ
π
0
2
2
ωω
π
⋅
+
⋅⋅
⋅
⋅
∫
LCE
ir
tdt
ir
LF
ωω
π
π
⋅
−
⋅⋅
⋅
⋅
∫
2
M(t)1
)(sin
2
ˆ
0
2
2
(
)
DCUICUCV
PPP
,,
6
+⋅=
represented by M
SVM
(ωt) which in [10] is defined as a
composition of sine and cosine functions with different peak
values can be expressed as a Fourier sequence [7] given by
equation (7), see also figure 2.
For the chosen PWM methods equations (4) and (5) turn
into expressions (8) and (9).
In these equations M is the modulation index and ϕ is the
displacement angle between the fundamental of the
modulation function and the load current. In case of
SVPWM the value of F
SVM
is given according to equation
(10), in case of sinetriangular PWM the value of F
SVM
equals zero.
By comparing the results of equation (10) which are
considerably low with the amount of total conduction losses
it can be concluded that the term F
SVM
can be neglected as
will be seen later. Thus the conduction losses for SVPWM
may be computed in the same way as for sinetriangular
PWM as a good approximation. From equation (8) and (9) it
becomes also obvious that the displacement angle ϕ is
another influence parameter for the determination of the
conduction losses, except in that case that the rated loss
parameters of IGBTs and diodes are equal.
III.
A
NALYTICAL
C
ALCULATION OF
L
OSSES IN
C
URRENT
S
OURCE CONVERTERS
A.
Basic Circuit and Loss Model
Current source converters as shown by figure 3 have to be
analysed in a different way. Dual to the presumptions for
the voltage source type, here the converter is considered
being operated with constant dc link current and constant
switching frequency where in this case ‘switching
frequency’ as opposed to the VSC only means the frequency
by which the duty cycles of the converters’ space vectors
will be adjusted. Again a linear behavior of the power
semiconductors is assumed according to eq. (1) and (2).
The line voltages are considered to be symmetrically
sinusoidal and to be constant during one switching period
which means that the pulse rate has to be sufficiently high
again. It should be pointed out that figure 3 does not reveal
the typical line side filter as usually applied for the CSC
because the phase displacement angle ϕ as related to by the
equations in this paper always indicates the displacement
angle between the converter’s line current fundamental and
the line voltage fundamental as they appear directly at the
converter’s output on the ac side. Therefore ‘line side’ is a
byword for the converter’s ac output regardless what is
connected to it.
B.
Conduction Losses
In case of the CSC the conduction losses are simple to
derive regardless of the PWM method. The basic rule for
the current source converter is, that there must always be at
least one switch forward biased in each half bridge of the
converter. Hence according to [4] and [5] the conduction
losses P
CI
are as follows in eq. (11).
Here I
dc
is the dc link current of the converter, the other
values have been introduced before. The rated diode values
are referred to the series diodes of the power modules, see
figure 3. The inverse diodes can be ignored as they may
only hold current during commutations.
T1 T3
T5
T4
T6
T2
I
dc
1
2
3
Fig. 3. Current source converter
(7)
( )
+⋅=
)sin(M
SVM
tMt
ω
(8)
+
⋅
⋅
+⋅
⋅
=
)cos(
4
1
2
ˆ
0,
,
ϕ
π
π
M
iV
P
LCE
ICV
(9)
(10)
∑
∞
+−
⋅
−
+−
⋅
⋅
⋅
=
ν
ϕϕ
π lll
l
kkk
k
F
SVM
45
)cos(
45
)cos(
36
3535
for l = 3(4ν+1); k = 3(4ν+3); ν = 0,1,2,...
(11)
( )
( )
[ ]
FCEdcFCEdcCI
rrIUUIP +⋅++⋅⋅=
2
0,0,
2
∑
∞
=
−
++
⋅+⋅
⋅
⋅
0
2
1918
))14(3sin(
8
33
k
k
k
tk ω
π
++
⋅+⋅
102718
))34(3sin(
2
kk
tk
ω
for k= 0,1,2,...
+⋅+⋅
⋅
SVM
LCE
FM
ir
)cos(
3
2
42
ˆ
2
ϕ
π
π
+
⋅
⋅
−⋅
⋅
= )cos(
4
1
2
ˆ
0,
,
ϕ
π
π
M
iV
P
LF
DCV
+⋅−⋅
⋅
SVM
LCE
FM
ir
)cos(
3
2
42
ˆ
2
ϕ
π
π
C.
Switching Losses
To calculate the switching losses, the alternating blocking
state voltages of the switching devices which coincide with
the converter’s output voltages have to be taken into
account. Here four basic types of PWM vector modulation
for a current source converter shall be regarded [5], [11].
Table I depicts the different PWM vector modulation
schemes with the conduction intervals of the different
switches during an exemplary PWM period shown in the
first column. For the prediction of switching losses of
current fed converters the voltages that appear at the two
concerning valves during the commutation process have to
be determined. All of the modulation strategies listed by
table I have a few basic rules in common [11]: During one
commutation process there are always two switches
involved. Their commutation voltage will always be one of
the line voltages. If the voltage at the switch that is to be
turned on is negative before the commutation takes place,
turnoff losses will appear in the corresponding
semiconductor to be turned off. If the voltage at the switch
which is about to be turned on is positive turnon losses are
generated in the same semiconductor.
1)
Switching Patterns 1a – 1c
The upper three PWM strategies in table I are classified in
[5] as HSM (Half Wave Symmetrical Modulation), MHSM
(Modified Half Wave Symmetrical Modulation) and
MHSM2. Here a certain symmetry regarding the appearing
commutation voltages can be found. As it is always two
specific couples of switches with each switch being turned
on and turned off once during a switching period there will
be two different commutation voltages each causing turnon
and turnoff losses in one semiconductor. Hence if linear
dependencies between the commutation voltages and
switching losses are assumed the average power dissipation
caused by switching will be proportional to the average
values of the commutation voltages’ absolute values. The
modulation methods 1a – 1c only differ from each other by
the corresponding line voltages that would affect the
commutation resulting from the different sequence of the
switching devices.
For an example the absolute values of the concerning
commutation voltages of modulation method 1a are shown
by figure 4. The trajectories within the dotted lines are
repeated for each 60°sector of one fundamental period and
are shifted with the phase angle (in this case ϕ = 0). Due to
this 60°symmetry the phase angle is another important
parameter to deal with in calculations.
The functions given by figure 4 can be expressed by
fourier series which can be utilized to represent the mean
value of the sum of the commutation voltages’ absolute
values by a closed expression. As already mentioned four
switching transitions are expected with two of them
generating turnon and the other two generating turnoff
losses. Thus the averaged total switching losses can be
calculated by eq. (12).
0
π
2
π
V
23
 V
12

repeating trajectories
ϕ
ω
t
Fig. 4.Absolute values of line voltages V
12
and V
23
(12)
( )
ref
line
ref
dc
DOFFIOFFIONSSI
V
V
I
I
EEEfP
ˆ
3
,,,1,
⋅⋅++⋅⋅=
π
TABLE I
D
IFFERENT
PWM
STRATEGIES FOR A CURRENT TYPE CONVERTER
Modulation Pattern Commutation
Voltages
δ
V
12
, V
23
π/6
V
12
, V
31
π/6
V
23
, V
31
π/2
V
12
, V
23
, V
31

1a)
T
S
T
1
T
3
T
5
T
2
1b)
T
S
T
1
T
3
T
5
T
2
1c)
T
S
T
1
T
3
T
5
T
2
2)
T
1
T
3
T
5
T
2
T
S
[ ]
( )
⋅
⋅
⋅−
+⋅
⋅−⋅
∑
∞
=
2
2
3
sin
1
)(cos
8
3
4
k
k
kk
k
π
δϕ
π
for even k’s
In this equation δ is a characteristic angle depending on the
PWM scheme, see also table I.
line
V
ˆ
indicates the peak value
of the line voltage and E
OFF,D
is the turnoff energy of the
series diode.
2)
Switching Pattern 2
If one considers the least number of switching operations
which is three in total, each line voltage affects one of the
three commutation processes during one switching period.
This applies for modulation method 2 specified as FSM
(Full Wave Symmetrical Modulation) in [5], see table I. But
even in this case a useful symmetry can be figured out.
Table II lists the blocking state voltages of the switches
before being turned on during one switching sequence
according to table I,2.
From table II it can be concluded that the sum of the
commutation voltages is always zero which implies 
presuming linear dependencies again  that turnon and turn
off losses can be equally weighted for the calculation of the
total switching losses. Thus for this modulation pattern the
average value of the sum of absolute values of the three line
voltages over a period of 60° of the fundamental is
proportional to the average switching losses. For the sum of
the line voltages’ absolute values the mean value will be
constant over such a period of 60° regardless of the phase
shift at the converter’s input (13).
Thus, the switching losses P
SI,2
for this PWM method are
only depending on the dc current I
dc
and the amplitude of
the line voltages. They can be expressed accordingly (14).
This equation is quite similar to eq. (3), that for the VSC.
IV.
R
ESULTS OF
P
OWER SEMICONDUCTOR LOSS
CALCULATION
The analytical calculations were carried out to see the
behavior of semiconductor losses under certain conditions.
To verify the analytical results concerning the losses of CSC
and VSC topologies numerical simulations have been done
compliant to the presumptions for the calculations above
(linear loss model). For the analytical calculation as for
numerical simulations the data sheet on the Semikron
module SKM 100 GAX 173 D was exemplary picked out as
source for the necessary data. This module consists of a
series and an inverse diode besides the IGBT. For the
simulation of the VSC the series diode was neglected.
A.
Voltage Source Converters
For the numerical simulation of the VSC a switching
frequency f
s
= 20 kHz was assumed and the modulation
index was arbitrarily set to M = 0.6. The peak value of the
sinusoidal load current was set to î
L
= 50 A. Figure 5 reveals
the conduction losses P
CV
versus the output phase angle ϕ.
The solid lines are hard to distinguish as they constitute the
results based on equation (8) and (9) with and without the
term F
SVM
which is obsolete for most applications. The dots
on this trajectory are the results of the numerical simulation
carried out for some selected operating points by using
space vector modulation.
Generally a maximum at ϕ = 0° can be seen decreasing
with the phase shift to both sides of the diagram. The reason
is obvious: As the conduction periods for the diodes
increase with a rising phase shift either leading or lagging
the conduction losses decrease.
The switching losses proved to be constant regardless of
the phase angle and were determined to P
SV
= 824 W by
numerical simulation which indicates a deviation from the
values of the analytical calculation of no more than 1%
probably due to minor differences in the current’s trajectory
being compared to an ideal sinusoidal waveform.
B.
Current Source Converters
As for the numerical simulation of the VSC, for the CSC a
switching frequency of f
S
= 20 kHz and an intermediate dc
current of I
dc
= 50 A was assumed. Different to the VSC the
modulation index does not affect the semiconductor losses
of the CSC directly. Figure 6 shows the results for the
switching losses P
SI
of a mains connected CSC (line voltage
V
line
= 400 V rms) versus the phase angle ϕ. In this case the
solid lines illustrate the calculation results again and the dots
TABLE II
C
OMMUTATION
V
OLTAGES FOR
M
ODULATION
M
ETHOD
2
Sector Alternating
Switching Devices
Commutation
Voltages
30° < ωtϕ < 90°
5, 1, 3 V
31
, V
12
, V
23
90° < ωtϕ < 150°
6, 2, 4 V
31
, V
12
, V
23
150° < ωtϕ < 210°
1, 3, 5 V
31
, V
12
, V
23
210° < ωtϕ < 270°
2, 4, 6 V
31
, V
12
, V
23
270° < ωtϕ < 330°
3, 5, 1 V
31
, V
12
, V
23
330° < ωtϕ < 30°
4, 6, 2 V
31
, V
12
, V
23
(13)
( )
linecom
VtdVVVV
ˆ
63
3123122
∫
∑
+
⋅=⋅++⋅=
ϕπ
ϕ
π
ω
π
(14)
( )
ref
line
ref
dc
DOFFIOFFIONSSI
V
V
I
I
EEEfP
ˆ
3
,,,2,
⋅⋅++⋅⋅=
π
150
170
190
210
230
250
270
290
90° 60° 30° 0° 30° 60° 90°
P
CV
/W
ϕ
Fig. 5.Conduction losses of th e VSC versus phase angle
for a semiconductor example; solid lin es due to eq. (8), (9) with and
without F
SVM
,dots indicating results of numerical simulation;
f
s
= 20 kHz, î
L
= 50 A, M = 0.6
mark the outcomes of the numerical simulation at selected
operating points.
From figure 6 the symmetry of modulation methods 1a –
1c becomes obvious. Also the constant switching losses
generated by modulation method 2 can be seen. Although
modulation method 2 consists of one switching operation
less, the other three modulation schemes can reach equally
low switching losses when used at certain phase angles with
minimum losses each. There is a good agreement between
numerical simulation and analytical calculation.
Regarding the conduction losses the numerical simulation
yields matching results compared to the calculations in eq.
(11) of P
CI
= 520 W for any modulation or operating point
at an intermediate dc current of I
dc
= 50 A. By now
dependencies only on the phase angle have been shown.
C.
General Behavior of Both Topologies
The losses of a mains connected voltage and current
source converter are shown in figure 7. Equal
semiconductor ratings as specified above were applied for
both converter types using the corresponding equations
mentioned before. The different kinds of losses are
displayed not only versus phase angle but also versus line
current. A line voltage of V
line
= 400 V rms and a switching
frequency of f
S
= 20 kHz was assumed for both topologies.
The VSC as well as the CSC are operated at maximum
modulation index. PWMstrategy for the VSC is suboptimal
SVPWM again, the CSC is driven by PWM scheme 1c.
Figure 7a reveals the conduction losses of the VSC
topology. The corresponding switching losses for the VSC
are given by figure 7b. Conduction losses of the CSC are
depicted by figure 7c followed by the switching losses in
figure 7d. The most striking difference is that for the VSC
the conduction losses are dependent on the output phase
angle while for the CSC it are the switching losses showing
such behavior. It should be pointed out that the depicted
scope (90°<ϕ<90°) of operation only reveals a power flow
into the grid. It should also be mentioned that variations of
the line current would be realized differently for the two
topologies as the modulation index is determined to a fixed
value. In this case for the CSC it is the intermediate dc
current I
dc
that usually goes proportional with the grid
current. For a VSC, on the other hand, a variation of the grid
impedance and the corresponding line inductors would be
necessary for changing the value of the line current at a
fixed modulation index as it is displayed here.
10
0
20
30
40
50
0
90°
200
400
P
CV
/W
ϕ
I
L
/A
−90°
a)
10
0
20
30
40
50
0
90°
400
800
P
SV
/W
ϕ
I
L
/A
−90°
b)
10
0
20
30
40
50
0
90°
400
800
P
CI
/W
ϕ
I
L
/A
−90°
c)
10
0
20
30
40
50
0
90°
400
800
P
SI
/W
ϕ
I
L
/A
−90°
d)
Fig. 7.Conduction and switching losses for both topologies each
operated with one specific modulation scheme
f
s
= 20 kHz, V
line
= 400 V rms;
a) VSC conduction losses with SVPWM, b) VSC switching losses
with SVPWM, c) CSC conduction losses with Mod. 1c, d) CSC
switching losses with Mod. 1c
0
100
200
300
400
500
600
700
90° 60° 30° 0° 30° 60° 90°
P
SI
/W
ϕ
Mod. 1a Mod. 1bMod. 1c
Mod. 2
Fig. 6.Switching losses of the CSC for all four different modulation
schemes versus phase angle
calculated (solid lines) and numerically simulated (dots);
f
S
= 20 kHz, I
dc
= 50 A, V
line
= 400 V rms
V.
C
ONCLUSION
Methods for the analytical calculation of power
semiconductor losses in voltage source and current source
converters are presented. Most methods are well known
from the literature, for the current source converter the loss
calculation has been extended here. The analytical
calculations have been verified by numerical simulation.
With these formulas mostly exact loss calculations are
possible. The results of these calculations clearly show the
dependencies of the losses on their origin. Hence they can
be well used for basic investigations of power
semiconductor losses of both converter types. In loss
diagrams the behavior of both converter types regarding
power semiconductor losses is presented for exemplary
semiconductor specifications.
R
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