# U U University of S S Southern C C California

Electronics - Devices

Nov 2, 2013 (4 years and 8 months ago)

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U
U
U
niversity of
S
S
S
outhern
C
C
C
alifornia

School Of Engineering

Department Of Electrical Engineering

EE 348:

Homework Assignment #07

Spring
,
2001

(Due 04/10/2001)

Choma

Problem #31:

All transistors in the bipolar differential pair of Fig. (P31) are identical.
Ea
ch transistor has very large forward beta, negligible internal collector resistance, and infinitely
large forward Early resistance. When biased properly, each transistor conducts identical collec
-
tor current densities.

Fig
. (P31)

(a).

In terms of
V
BE

and circuit parameters, find expressions for the quiescent collector currents
flowing in
all

transistors and the quiescent voltages, with respect to ground, at the collec
-
tors of
all

transistors. The signal source,
V
s
, has zer
o static voltage value.

(b).

Under small signal operating conditions, find the Thévenin voltage and the Thévenin resis
-
tance seen looking back to the collector of transistor
Q2
. Do balanced conditions prevail
under these Thévenin computational circumstanc
es?

(c).

Assuming that balanced conditions prevail in the input differential pair, find the common
mode and differential mode input resistances with respect to the base terminals of transis
-
tors
Q1

and
Q2
.

(d).

Using the results of Part (b), determine an e
xpression for the overall voltage gain,
A
v

=
V
os
/V
s
.

Problem #32:

In the differential amplifier of Fig. (P32), all transistors are identical and are
biased to produce identical small signal parameters. Moreover, all transistors have infinitely
large forwa
rd Early resistances.

EE 348

University of Southern California

J.
Choma, Jr.

Homework #07

51

Spring Semester, 2001

(a).

Draw the differential mode and common mode half circuit AC schematic diagrams.

(b).

Give the expressions for the small signal differential mode voltage gain,
A
dm
, the common
mode voltage gain,
A
cm
, and the overall voltage gain,
A
v

= V
os
/V
s
.

(c).

Give expressions for the small signal common mode input resistance,
R
ci
, the differential
mode input resistance,
R
di
, and the net input resistance,
R
in
.

(d).

Give expressions for the small signal common mode output resistance,
R
co
, the dif
ferential
mode output resistance,
R
do
, and the net input resistance,
R
out
.

Fig. (P32)

Problem #33:

The three bipolar junction transistors in the folded cascode transconductor
of Fig. (P33) are biased to operate in their lin
ear regimes. For analytical simplicity, assume that
all transistors have identical small signal parameters and that they have infinitely large forward
Early resistances. Note that transistors
Q1

and
Q3

do not

comprise a balanced differential pair.

(a).

A
ssuming that capacitors
C
1

and
C
2

behave as AC short circuits over the signal frequency
range of interest, develop an expression for the small signal forward transconductance,
G
m

= I
os
/V
s
, of the amplifier.

(b).

If capacitor
C
2

is sufficiently large to emu
late an AC short circuit, give an expression for
the time constant,
τ
, associated with capacitor
C
1
.

EE 348

University of Southern California

J.
Choma, Jr.

Homework #07

52

Spring Semester, 2001

Fig. (P33)

Problem #34:

Consider the differential amplifier given in the Fig. (P34).

(a).

Transistors
Q1a, Q1b, Q2a
, and
Q2b

each have an emitter
-
base junction area of
A
E
. If the
circuit bi
asing ensures that all transistors conduct nominally identical current densities,
what must be the emitter
-
base junction areas, in relationship to
A
E
, of transistors
Q3a, Q3b,
Q4a
, and
Q4b
?

(b).

For the biasing condition described in Part (a), what are the

requisite emitter
-
base junction
areas of transistors
Q7a

and
Q7b
?

(c).

For the biasing condition described in Part (a) and deduced in Part (b), is it necessary for
transistor Q6 to have an emitter
-
base junction area that mirrors that of either transistors

Q7a

or
Q7b
?

(d).

Suppose that the emitter
-
base junction area of a monolithic transistor is scaled upward by a
factor of
K

to accommodate a collector current that is likewise
K
-
times

larger than that
conducted by the collector of the original (smaller) dev
ice. If the original transistor is
characterized by the small signal parameters,
r
b
, r
e
, r
c
, r
o
, r

,

and

ac
, what are the small
signal base resistance, emitter resistance, collector resistance, forward Early resistance,
junction diffusion resistance, and

beta of the larger device? Express your answers in terms
of
K

and the small signal model parameters of the original transistor.

EE 348

University of Southern California

J.
Choma, Jr.

Homework #07

53

Spring Semester, 2001

Problem #35:

For the differential amplifier given of Fig. (P34), use half circuit concepts
to evaluate the net input resistan
ce,
R
in
, the net output resistance,
R
out
, and the differential volt
-
age gain,
A
d

= V
o
/V
s
. For simplicity, assume all transistors have identical small signal model
parameters, inclusive of infinitely large forward Early resistance.

Fig. (P34)

EE 348

University of Southern California

J.
Choma, Jr.

Homework #07

54

Spring Semester, 2001

U
U
U
niversity of
S
S
S
outhern
C
C
C
alifornia

School Of Engineering

Department Of Electrical Engineering

EE 348:

Homework Assignment #07

Spring
,
2001

(SOLUTIONS: Due 04/10/2001)

Choma

Problem #31: