RIT Project METEOR Instrumentation Platform

amountdollElectronics - Devices

Nov 2, 2013 (4 years and 8 months ago)


Matthew Lipschutz

Project METEOR


Rev 2.0

RIT Project METEOR Instrumentation Platform

Video Subsystem


The main video subsystem is made up of five analog NTSC video cameras multiplexed
together to achieve 5 exclusive views. Video multipl
exers, as well as CMOS logic
decoders and bipolar drive transistors are used to switch exclusively between the 5
cameras with little noticeable switching noise. This video signal is then passed through
the on
display (OSD) subsystem, where sensor d
ata gathered by the main
processor is overlaid onto the video signal. From here the video signal is amplified and
sent to the transmitter.

Camera Multiplexing

The camera multiplexing serves two purposes; to enable the viewing of different angles
and resol
utions (color and grayscale) from the platform. The cameras draw a significant
amount of power, and as such a power multiplexing scheme has been adopted in parallel
with the video signal multiplexers to minimize the necessary on
time of each camera
when i
t is not being viewed. Three control signals, A[2:0], are used to control one of 5
possible cameras (increased expansion up to 8 is possible through the use of additional
power transistors and inverters).

The highest bit, A2, is used to control the

signal of the LT1204 video multiplexers. The signal is inverted through the 74LS04 (hex
inverter) where it is fed to the

pin on the second LT1204. This ensures that one
of the video multiplexers is always in high impedance mode, which is necessa
ry as the
inputs are tied together before being output to the OSD.

A 74LS138 (3:8 decoder) is used to distribute the A[2:0] signal in the form of an active
low; this low is inverted through the remaining inputs of the 74LS04 and used to drive
the bases
of 2N222 NPN transistors. This action connects the actively selected camera to
ground, enabling power flow. Individual cameras draw approximately 100mA, well
below the rated 600mA of the 2N222.

The output pin of each camera
is connected in parallel with

a 75 ohm resistor to ground;
this provides the necessary impedance matching to reflections in the circuit.

On the
output of the LT1204 video multiplexers, a voltage divider is formed between the output
pin (15) and the feedback pin (13) with reference to

these values can be modified
to change bandwidth at the expense of
gain. The suggested values were utilized, though
they can be changed if the video signal is weaker than expected.


The search for a suitable microprocessor
solution has lead to the discovery of a
number of possible implementations based around a variety of low power
Significant work was done by William Cooke[1] and further refined by
the Vienna Wireless Society[2]

using a variety of Atmel AV
R processors.

The MSP430
family of microprocessors is preferred due to the familiarity of students with this
processor, as well as an attempt to maintain homogeneity within the METEOR project,
and as such the software and hardware originally designed for
the AT90S2321 and
ATmega8 will be rewritten for use on the MSP430F2011.

display circuitry acts in parallel with the video signal; the actual connector
will be bi
directional, both reading in sync pulses and pulling the video line high (to
dicate while pixels) when necessary.
The hardware connecting the video signal to the
microprocessor is not overly complex;

pin 4 (CA2) is isolated from
the video signal by
D1 and R7, so that the pin does not sink current when not pulling up the line.
de D2
isolates the
generated by D3
, C3 and R10
, allowing the video signal (normally
1Vpp) sync pulse to occur very close to ground (approximately 100mV).

R8 and R11
form a voltage divider to reduce the 600mV from the anode of D3 to 300mV, which is
en take as the negative trigger to the analog comparator.
When the video pulse drops
below 300mV

(the approximate level of black, the lowest signal level)
, a sync pulse is
detected, and an interrupt is generated.


particular processor in t
he MSP430 was chosen for a variety of factors: the faster
16MHz clock frequency, along with the analog comparators, will be
analyzing the incoming video signal. Interrupts generated by the analog comparator will
initiate subroutines to evalua
te the sync pulses,
and further to determine

the appropriate
action on them (See the accompanying flow chart for details on interrupt subroutine


The only significant concern with the current design is the MSP430F2011
hile the specifications on this processor appear
to the task, as
well as comparable to the AT90S2313 used previously,
one of the fallacies of previous
display attempts has been
a microcontroller which was not suited to
the task
In this unlikely even, a fallback to the known Atmel processor could be
possible, though software modification would still be necessary due to
specific project
METEOR requirements.