Chapter 1. The Metal-Oxide Semiconductor Field Effect Transistors

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Nov 2, 2013 (3 years and 10 months ago)

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1
-
1

Chapter 1. The Metal
-
Oxide
Semiconductor Field Effect
Transistors


Section 1.1. An Introduction
of
MOSFET


In this lecture notes, we shall use metal
-
oxide semiconductor field effect transistors
(MOSFET) as our conducting devices. We shall
now

discuss th
e electronics
properties of these transistors. We merely introduce their functions.



There are two types of MOSFET

s: enhancement type and depletion type.
For each type, there are again two types: N
-
type and P
-
type, as shown in Table
1.1
-
1.


Table 1.
1
-
1


Ty p e


C h a n n e l

En h a n c e me n t

De p l e t i o n

N

En h a n c e me n t t y p e N MO S

De p l e t i o n t y p e N MO S

P

En h a n c e me n t t y p e P MO S

De p l e t i o n t y p e P MO S



F o r e a c h t y p e, we u s e t h e
s y mb o l s s h o wn i n F i g. 1.1
-
1.


1
-
2


Fig. 1.1
-
1



As shown in Fig.

1.1
-
1, there are three terminals for each transistor, namely drain
(D), source (S) and gate (G).
The terminal with an arrow sign is the source.
For all
of these transistors, there is no gate current. In other words, there is only current
going through
drain and source as shown in Fig. 1.1
-
2. The reader should note
that
the direction of the current

follows the arrow sign of the sources
. In NMOS
transistors, the current flows from drain to source while in PMOS transistors, it flows
from source to drain.


1
-
3


Fig. 1.1
-
2



There is actually little difference among the
enhancement and depletion
transistors. Throughout of this lecture notes, we shall use enhancement type
transistors.

To start with, we shall use the NMOS transistors
.



As shown in Fig. 1.1
-
3, there are three important p
arameters of an NMOS
transistor

namely

and
. It should be reminded here that in an NMOS
transistor, the current flows from drain to source and there is
no gate current.


Fig. 1.
1
-
3



Suppose we have a fixed
, the

curve is as shown in Fig. 1.1
-
4.


1
-
4


Fig. 1.1
-
4



At the very beginning, as

first increases,

increases linearly. After

reaches a certain point,

stops increasing and almost remains a constant.
Therefore, we say that there are two regions as indicated

in Fig. 1.1
-
4. Region I is
called the triode, or ohmic, region and Region II is called the saturation, or constant
current, region. For Region I, the transistor almost
behaves

as a resistor because
for
a resistor, the current increases linearly with res
pect to the voltage across it. That is
why this region is also called the ohmic region.



For different

s, there are different

curve
s, as shown in Fig.
1.1
-
5
. It can be seen that the higher

is, the higher

is.

F
ig.
1.1
-
5


Section 1.2. The
I
-
V
Curves of NMOS
Transistors


1
-
5


will be independent of

and is only a function of
. Thus, we may
easy than Equation (1.2
-
3) holds if
. Equation (1.2
-
3) is illustrated in
Fig. 1.2
-
2.


There exists a certain threshold for
. This threshold is called
. The
trans
istor is cutoff if
.

is usually quite small. If
, the
transistor is
in the

triode region;
otherwise
, it is in the saturation region, as shown in
Fig.

1.2
-
1.

Fig. 1.2
-
1



In the triode region, obviously,

is a function of both

and

. The
relationship is given by the following formula:





(1.2
-
1
)


where

is a constant and

and

are the widths of the gate respectively.
The parameter

is given by the integrated circuit manufacturing process model.
At the

boundary between the triode and saturation regions, we have





(1.2
-
2)


and

(1.2
-
3)



1
-
6


Although Equation (1.2
-
3) is derived by
assuming
, it is valid for

because once
, the transistor will be in the saturation
region.



Fig. 1.2
-
2
.



Fig. 1.2
-
2 can be quite misleading because it some
how gives the reader the
impression that

grows with respect to

without any limit. In practice, this
is not the case, as explained in the next section.


Section 1.3 The Behavior of
I
DS

with a Load

for NMOS T
ransistors


Consider Fig. 1.3
-
1 where a load is connected to the drain of the NMOS transistor and
a power supply

is connected to the load.


1
-
7


Fig. 1.3
-
1



From the circuit

shown

in Fig. 1.3
-
1, we have the
following equation:




. (1.3
-
1)


In Equation (1.3
-
1), there are two variables, namely

and
. But there is
only one equation. Therefore, we cannot
determine

from this equation only.
But, we may draw a straight line to illustrate Equation (1.3
-
1) as in Fig. 1.3
-
2.




Fig. 1.3
-
2 (A straight line expressing Equation (1.3
-
1))



What is missing in Equa
tion (1.3
-
1) is the voltage
. Note that current

is heavily influenced by
, as illustrated in Fig. 1.1
-
4

and Fig. 1.1
-
5
. Let us
combine Fig. 1.1
-
4 and Fig. 1.3
-
2 into Fig. 1.3
-
3.



1
-
8




Fig. 1.3
-
3 (Combination of Fig. 1.1
-
4 and Fig. 1.3
-
2).



Fig. 1.3
-
3 shows how we can determine the value of

by finding the
intersection of the load line and the
I
-
V

curve of the transistor.

From Fig. 1.3
-
3, we
know that we can not only determine the value of
, but also that of
.
Note
that the
I
-
V

curve is fixed once

is given. But the value of

plays a critical
rol
e now because it
determines

the slope of the load line
.

Different

s will give
different load lines and
thus

different

s

and

s
.



Let us consider the case where

changes. There will be a family of
I
-
V

curves.


Case 1:

is small.


This case is illustrated in Fig. 1.3
-
4.


1
-
9


Fig. 1.3
-
4


In this case, we
should

note two phenomena: (1)

ris
es sharply. (2)

falls
a little
.

We would like to point out here that

is more important than

as it is usually the output of the circuit. We shall discuss this in detail in the next
c
hapter. At present, the reader may simply note that when

is small,

will
not change much as

changes.


Case 2:

is
moderate
.



The case is illustrated in Fig. 1.3
-
5.


1
-
10

Fig. 1.3
-
5



We note that the changes of both

and

are moderate. In other words,
none of them changes sharply.


Case 3:


is
large
.



The case is illust
rated in Fig. 1.3
-
6.


1
-
11

Fig. 1.
3
-
6



In this case, we note that

rises
a little

and

falls sharply. Again, we
shall emphasize here that the rate of change of

i
s rather significant. In general,
we would like

to change drastically.



Fig. 1.3
-
7 summarizes the three cases.


1
-
12


Fig. 1.3
-
7




is called the biasing voltage. Its
significance

will

be explained later.

is called the operating point voltage, or simply operating point. Fig. 1.3
-
8 illustrates
how different operating points are produced. Note that it takes both

and

to produce an operating point.

Fig. 1.3
-
8


1.4

The PMOS Transistors



1
-
13

A typical PMOS transistor is now shown in Fig. 1.4
-
1.


Fig. 1.4
-
1



For a PMOS transistor, the
controlling

(biasing) voltage is
, as opposed to
, in an NMOS transistor. The higher

is, the higher

will become.
Note that in a PMOS transistor, the current flows from source to drain which is
di
fferent from the case in an NMOS transistor.. Fig. 1.4
-
2 illustrates a family of
I
-
V
curves for PMOS transistors.


Fig. 1.4
-
2



In Fig. 1.4
-
3, we show the difference between the NMOS circuits and the PMOS
circuits.


Fig. 1.4
-
3


For the PMOS circuit, we have
the following equation:


1
-
14





(1.4
-
1)



We use the
I
-
V

curves in Fig. 1.4
-
2. First, we plot
-

vs

as in Fig.
1.4
-
4.


Fig. 1.4
-
4



We then plot

as in Fig. 1.4
-
5.


Fig. 1.4
-
5



Finally, we add the load line which is

to Fig. 1.4
-
5 to produce
Fi
g. 1.4
-
6.


1
-
15


Fig. 1.4
-
6



Let us compare the two circuits shown in Fig. 1.4
-
7.


Fig. 1.4
-
7



It can be noted that for an NMOS transistor, the higher the current going through
it, the lower
. The situation is just the opposite for PMOS transistors. The
higher the current, the h
igher
. They are complementary to each other, a very
useful property which will be discussed later.



For NMOS transistors, if

increases, the current increases. Thus for these
transistors, the increase of

will increase the current and decrease the output
voltage
.


For PMOS transistors, if

increases,

decreases and
the
current decreases. However, it can be easily seen that this will in turn decrease the
output
. Thus we conclude that for both NMOS and PMOS transistors, the
increase of

will decrease the output voltage
. Similarly, a decrease of

will increase the output voltage

for both NMOS and PMOS transistors. This is
another important property of
these transistors.


Section 1.5 The Depletion Type MOSFET

1
-
16

Transistors


The depletion type MOSFET transistors are quite similar to the enhancement type
MOSFET transistors. The only difference is the
polarity

of
.

is positive for
enhancement type NMOS transistors, but negative for depletion type NMOS
transistors. It is negative for
enhancement type PMOS transistors, but positive for
depletion type PMOS transistors. Fig. 1.5
-
1 illustrates this.

Fig. 1.5
-
1


Section 1.6 Experiments


In this section, we show several experiments using the SPICE circuit simulation
system. For each circuit and for every experiment, we
shall

give the SPICE program
written for the purpose. We cannot
exp
lain the details of the SPICE program
grammatical rules. The reader may consult any SPICE manual. The VLSI model
for the transistors is mm0355v.1

TT.



Experiment 1.
5
-
1

I
-
V Curves


The purpose of this experiment is to show a family of I
-
V curves.
The p
ower
supply voltage

is set at 3.3V.
Fig. 1.6
-
1 shows the circuit.
Table 1.6
-
1 shows
the SPICE program and Fig. 1.6
-
2

shows the simulation result.


1
-
17


Fig. 1.6
-
1


Table 1.6
-
1

filename

.protect

.lib 'c:
\
mm0
355v.l' TT

.unprotect

.op

.options nomod post


VDD

1

0

3.3v

R1 1 2 100k

V2 2 0 0v


.param

W1=5u

M1

2

3

0

0


+nch L=0.35u

W='W1' m=1


+AD='0.95u*W1' PD='2*(0.95u+W1)'

+AS='0.95u*W1' PS='2*(0.95u+W1)'


VGS

3

0

0v

.DC V2 0
3.3v 0.1v SWEEP VGS 0.1v 3v 0.25v

.PROBE I(R1) I(M1)

.end



1
-
18


Fig. 1.6
-
2


Experiment 1
.5
-
2

A Single I
-
V Curve and the Load Line



In this experiment, we shall show the intersection of a load line and a single I
-
V
curve. The circuit is biased at 0.65V. Th
e load is 100K and the power supply
voltage

is set at 3.3V

as shown in Fig. 1.6
-
3
.

Fig. 1.6
-
4

shows the result.


Fig. 1.6
-
3


Table 1.6
-
2

filename

.protect


1
-
19

.lib 'c:
\
mm0355v.l' TT

.unprotect

.op

.options

nomod post


VDD

1

0

3.3v

R1 1 2 100k

V2 2 0 0v


.param

W1=5u

M1

2

3

0

0


+nch L=0.35u

W='W1' m=1


+AD='0.95u*W1' PD='2*(0.95u+W1)'

+AS='0.95u*W1' PS='2*(0.95u+W1)'


VGS

3

0

0.65v

.DC V2 0 3.3v 0.1v

.PROBE I(R1) I(M1)

.e
nd




1
-
20

Fig. 1.6
-
4


Experiment 1.
5
-
3

The Operating Point with the Same V

GS

and a Smaller R
L
.



In this experiment, we use the same bias voltage

, but a smaller load of
50K, as shown in Fig. 1.6
-
5. The program is in Table 1.6
-
3 and
the simulation result
is shown in Fig. 1.6
-
6. As can be seen, we have a higher
. This may not be so
good as we shall see later in the next chapters.


Fig. 1.6
-
7


Table 1.6
-
3

filename

.protect

.lib 'c:
\
m
m0355v.l' TT

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.op

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VDD

1

0

3.3v

R1 1 2 50k

V2 2 0 0v


.param

W1=5u

M1

2

3

0

0


+nch L=0.35u

W='W1' m=1


+AD='0.95u*W1' PD='2*(0.95u+W1)'


1
-
21

+AS='0.95u*W1' PS='2*(0.95u+W1)'


VGS

3

0

0.65v

.DC V
2 0 3.3v 0.1v

.PROBE I(R1) I(M1)

.end



Fig. 1.6
-
8


Experiment 1.
5
-
4

I
DS
-
V
GS

with Almost No Load



In this experiment, we set the load to be very small so that

can grow
indefinitely with

The circuit, the p
rogram and the experimenting result are
shown below.


1
-
22


Fig. 1.6
-
9


Table 1.6
-
4

filename

.protect

.lib 'c:
\
mm0355v.l' TT

.unprotect

.op

.options nomod post


VDD

1

0

3.3v

R1 1 2 0.01k



.param

W1=5u

M1

2

3

0

0


+n
ch L=0.35u

W='W1' m=1


+AD='0.95u*W1' PD='2*(0.95u+W1)'

+AS='0.95u*W1' PS='2*(0.95u+W1)'


VGS

3

0

0v

.DC VGS 0 3.3v 0.1v

.PROBE I(R1) I(M1)

.end




1
-
23


Fig. 1.6
-
10


Experiment 1
.5
-
5

I
DS

and V
D
S

versus V
GS

with a Relatively Large Load



We use a load of 10
0K. Now,

can not grow indefinitely with

The
circuit, the program and the experimental results are shown as below. As can be
seen, the

quickly becomes a constant because of the load.

Similarly, the
simulation also shows that

quickly drops
to 0. Note that we denote

to be
.



1
-
24

Fig. 1.6
-
11


Table 1.6
-
5

filename

.protect

.lib 'c:
\
mm0355v.l'

TT

.unprotect

.op

.options nomod post


VDD

1

0

3.3v

R1 1 2 100k


.param

W1=5u

M1

2

3

0

0


+nch L=0.35u

W='W1' m=1


+AD='0.95u*W1' PD='2*(0.95u+W1)'

+AS='0.95u*W1' PS='2*(0.95u+W1)'


VGS

3

0

0v

.DC VGS 0 3.3v 0.1v

.PROBE I(M1)

.end



1
-
25


F
ig. 1.6
-
12