B-ISDN Protocol Reference Model - MMLab

volleyballbeginnerΔίκτυα και Επικοινωνίες

27 Οκτ 2013 (πριν από 3 χρόνια και 9 μήνες)

125 εμφανίσεις

PaxComm

Co
.

Ltd
.

라우터

/
스위치

Chipset





팍스콤

PaxComm

Co
.

Ltd
.



영식

2

목차



1. Layer 2, Layer 3 switching

2. Switching Chip architectures

3. Galileo
-
I architecture

4. Galileo
-
II architecture

5. MMCnet architecture

PaxComm

Co
.

Ltd
.



영식

3

Layer 2, Layer 3 Switching (1)



User


요구


Dedicated high speed port


필요


다양한

application


사용
(Video, Audio
등의

multimedia application)





Network


요구

사항


고속

WAN link speed


Adapting to evolving traffic patterns


Support multiple service levels


Broadcast


처리


Security and firewall

PaxComm

Co
.

Ltd
.



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4

Layer 2, Layer 3 Switching (2)



Layer 2 Switching


Efficient and high
-
speed multi
-
port learning bridge


Easy implementation and installation


Large Flat Network


Broadcast, Security problem


Can be solved by VLAN


Intercommunication problem between VLANs



Forwarding Model


cut
-
through


store
-
and
-
forward


adaptive cut
-
through


PaxComm

Co
.

Ltd
.



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5

Layer 2, Layer 3 Switching (3)



Layer 3 Switching


High speed(Wire speed)


Quality of Service


Multicast





Layer 3 switch
구현


Traditional software
-
based routing
-
> hardware


Route once, switch many


Cut
-
through

PaxComm

Co
.

Ltd
.



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6

Switching Chip Architecture (1)


I
-
Cube : Pure Crossbar (16 Port and 16 Port plus 1 Gigabit I
-
Cube Design, simplified)

Four

Ethernet

Ports

Cross

Bar

Four

Ethernet

Ports

Four

Ethernet

Ports

Four

Ethernet

Ports

Four

Ethernet

Ports

Cross

Bar

Four

Ethernet

Ports

Four

Ethernet

Ports

Four

Ethernet

Ports

Single

Gigabit

Port

PaxComm

Co
.

Ltd
.



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7

Switching Chip Architecture (2)


PMC
-
Sierra and Texas Instrument : Ring

Device A

eight Fast

Ethernet

Ports

Device D

eight Fast

Ethernet

Ports

Device C

eight Fast

Ethernet

Ports

Device B

eight Fast

Ethernet

Ports

PaxComm

Co
.

Ltd
.



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8

Switching Bus

Ports

Switch Engine

Memory

Ports

Switch Engine

Memory

Ports

Switch Engine

Memory

Ports

Switch Engine

Memory

Switching Chip Architecture (3)


Galileo
-

I : Distributed Switching Architecture

PaxComm

Co
.

Ltd
.



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9

Switching Chip Architecture (4)


Galileo
-
II : Hybrid Cell Crossbar

Cell Crossbar

8 Fast Ethernet

Ports

8 Fast Ethernet

Ports

8 Fast Ethernet

Ports

8 Fast Ethernet

Ports

Ethernet Packet Traffic

Cell Traffic

PaxComm

Co
.

Ltd
.



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Switch Engine

Shared Memory Port

Ports

Ports

Ports

Ports

Switching Chip Architecture (5)


MMC networks : Share Memory Architecture

PaxComm

Co
.

Ltd
.



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11

Galileo
-
I Architecture (1)


Direct support for packet buffering


High
-
performance Distributed switching engine


VLAN support


Quality
-
of
-
Service Queuing


Address Resolution


Distributed Address Table management



5


17
개의

GalNet Protocol message


이용한

Packet forwarding


NEW_ADDRESS


BUFFER_REQUEST


START_OF_PACKET


PACKET_TRANSFER


END_OF_PACKET


PaxComm

Co
.

Ltd
.



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12

Galileo
-
I Architecture (2)

PROCESSOR

MEMORY

PCI

BRIDGE

Galileo

10/00 device

DRAM

Galileo

10/00 device

DRAM

OTHER WAN

INTERFACE

PCI BUS


Implementation example

PaxComm

Co
.

Ltd
.



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13

Galileo
-
II Architecture (1)

Switch Controller

GT
-
48310

8 ports Fast

Ethernet

Switch Controller

GT
-
48310

8 ports Fast

Ethernet

Switch Controller

GT
-
48320

1 ports Gigabit

Ethernet

Switch Controller

(Future)

WAN

4 Port G.Link Crossbar

GT
-
48300

(12Gbps)

PCI used for CPU interface and for

connection to other switching devices

(66M PCI)

G.Link Interconnects

(2.4 Gbps each)


Galileo
-
II Switch Using G.Link Crossbar

PaxComm

Co
.

Ltd
.



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14

Galileo
-
II Architecture (2)

Switch Controller

Switch Controller

Switch Controller

4 Port G.Link Crossbar

Switch Controller

Switch Controller

Switch Controller

4 Port G.Link Crossbar


Peer
-
to
-
peer Galileo
-
II Configuration

PaxComm

Co
.

Ltd
.



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15

Galileo
-
II Architecture (3)

Switch

Controller

Switch

Controller

Switch

Controller

4 Port G.Link Crossbar

Switch

Controller

Switch

Controller

Switch

Controller

4 Port G.Link Crossbar

Switch

Controller

Switch

Controller

Switch

Controller

4 Port G.Link Crossbar

Switch

Controller

Switch

Controller

Switch

Controller

4 Port G.Link Crossbar

4 Port G.Link Crossbar


Hierarchical G.Link Configuration

PaxComm

Co
.

Ltd
.



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16


Current Approaches to Networking Equipment Design

Flexibility

Time to

Market

Performance

Cost

Low

Low

High

Slow

High

Low

High

Fast

General Purpose

Processor

Network Processor

Custom ASICs

MMCnet Architecture (1)

PaxComm

Co
.

Ltd
.



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17


Basic Switch Architecture

MMCnet Architecture (2)

nP5400

BitStream

Processor

BitStream

Processor

Link

Memory

Data

Memory

Packets

Packets

Headers

Cells

Headers

Cells

ViX Interconnect

PaxComm

Co
.

Ltd
.



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18

MMCnet Architecture (3)


Switch Component Requirements


AF5400 switch Configuration(5.5Gbps)

nP5400 packet Switching Module

CPU

Data

Memory

Link

Memory

ViX Interconnect

EPIF

EPIF

EPIF

EPIF

Fast Ethernet

Fast Ethernet

Fast Ethernet

Fast Ethernet

PaxComm

Co
.

Ltd
.



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19

MMCnet Architecture (4)

nP5400 packet Switching Module

CPU

Data

Memory

Link

Memory

ViX Interconnect

EPIF

EPIF

EPIF

EPIF

Fast Ethernet

Fast Ethernet

Fast Ethernet

Fast Ethernet

EPIF

EPIF

EPIF

EPIF

Fast Ethernet

Fast Ethernet

Fast Ethernet

Fast Ethernet

nP5400 packet Switching Module

CPU

Data

Memory

Link

Memory


11.0
-
Gbps switch Configuration

PaxComm

Co
.

Ltd
.



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MMCnet Architecture (5)

nP5400 packet Switching Module

CPU

Data

Memory

Link

Memory

EPIF

EPIF

EPIF

EPIF

Fast

Ethernet

Fast


Ethernet

Fast

Ethernet

Fast

Ethernet


22.0
-
Gbps switch Configuration

nP5400 packet Switching Module

CPU

EPIF

EPIF

EPIF

EPIF

Fast

Ethernet

Fast


Ethernet

Fast

Ethernet

Fast

Ethernet

nP5400 packet Switching Module

CPU

EPIF

EPIF

EPIF

EPIF

Fast

Ethernet

Fast


Ethernet

Fast

Ethernet

Fast

Ethernet

nP5400 packet Switching Module

CPU

EPIF

EPIF

EPIF

EPIF

Fast

Ethernet

Fast


Ethernet

Fast

Ethernet

Fast

Ethernet

ViX Interconnect

Data

Memory

Link

Memory

Data

Memory

Link

Memory

Data

Memory

Link

Memory

PaxComm

Co
.

Ltd
.



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21

MMCnet Architecture (6)


5400 Architecture

Ingress Processing

Switching

Queuing

Scheduling

Egress Processing

Bit Stream Processor

5400 Switch Fabric

Bit Stream Processor

PaxComm

Co
.

Ltd
.



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22

MMCnet Architecture (7)

Search

Machine

Micro

Controller

Statistics

Routing

Table

Memory

Slicer

MAC

CHANNEL

CHANNEL

CHANNEL

CHANNEL

0

1

2

3

Up to 64K entries

per channel

Wire speed search

using any key

Packet to Cell

Conversion

ViX Switch Interface

Wire speed parsing

and manipulation

of ingress and

egress packets

RMON Group 1, 2, 3, and 4

10/100 Ethernet MACs

MII Interface


EPIF Architecture

PaxComm

Co
.

Ltd
.



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23

MMCnet Architecture (8)


System Architecture

Bit Stream Processor

Switching Fabric

System CPU

Driver

Microcode

(L2 learning and

Aging, IP,

IPX Routing

RTOS

nP Independent API

Routing software