Transistor and Amplier Formulas

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2 Νοε 2013 (πριν από 3 χρόνια και 9 μήνες)

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Transistor and Amplier Formulas
The following formulas are meant as a reminder of the fundamentals given in most
standard electronics text books.Notation for the formulas have the traditional meanings.
Depletion capacitances are all given with a negative sign in the denominator as in C =
C
0
=(1  V=)

.Consequently,when the junction is reverse biased,the minus sign turns
into a positive sign.Figure F.1 presents the basic FET features and symbols.
Bipolar Transistor Parameters (BJT)
FormulaDescription
I
C
= I
S
exp

qV
BE
kT

Collector current
g
m
=
qI
C
kT
Transconductance
r

=

0
g
m
Input resistance
r
o
=
V
A
I
C
Output resistance
C
D
= 
F
g
m
Base charging capacitance
C
je
= A
E

qN
B
V
j

1=3
Emitter base junction
C

= C
D
+C
je
Input capacitance
C

=
C
o

1 
V
BC

oc

1=3
Collector base
C
cs
=
C
cso

1 
V
sc

os

1=2
Collector substrate
f
T
=
1
2
g
m
(C

+C

)
Transition frequency
V
T
=
kT
q
= 0:259VThermal voltage
1
Junction Field Eect Transistor Parameters (JFET)
FormulaDescription
I
D
= I
DSS

1 
V
GS
V
P

2

1 
V
DS
V
A

Saturated drain current
V
DS
 V
GS
V
P
I
D
= G
o

V
DS
+
3
2
(
0
+V
GS
V
DS
)
3=2
(
0
+V
GS
)
3=2
(
0
+V
P
)
1=2

Ohmic region drain current
V
DS
< V
GS
V
P
G
0
=
2aW
L

c
I
D
 K

2(V
GS
V
P
)V
DS
V
2
DS

g
m
=
2I
DSS
V
P

1 
V
GS
V
P

Transconductance
r
o
=
V
A
I
D
Output resistance
C
gs
=
C
gs0

1 
V
GS

0

1=3
Gate source capacitance
C
gd
=
C
gd0

1 
V
GD

0

1=3
Gate drain capacitance
C
gss
=
C
gss0

1 
V
GSS

0

1=2
Gate substrate capacitance
V
P
< 0N Channel JFET
V
P
> 0P Channel JFET
2
Metal Oxide Semiconductor Field Eect Transistor Parameters (MOSFET)
FormulaDescription
I
D
=
C
ox
W
2L
(V
GS
V
t
)
2

1 
V
DS
V
A

Saturation region drain current
V
DS
 V
GS
V
t
I
D
=
C
ox
W
2L

2(V
GS
V
t
)V
DS
V
2
DS


1 
V
DS
V
A

Ohmic region drain current
V
DS
< V
GS
V
t
C
ox
=

ox
t
ox
Oxide capacitance
g
m
= C
ox
W
L
(V
GS
V
t
)Transconductance
r
o
=
jV
A
j
I
D0
Output resistance
C
in
= C
GS
+C
GD
= C
ox
LWInput capacitance
f
c
=
g
m
2C
in
=

s
(V
GS
V
t
)
2L
2
Transition frequency

s
= 200 cm
2
=(V sec)Surface mobility Holes

s
= 450 cm
2
=(V sec)Surface mobility Electrons
P Channel JFETN Channel JFET
I
DSS
< 0I
DSS
> 0
V
P
> 0V
P
< 0
g
mo
=
2I
DSS
V
P
g
mo
=
2I
DSS
V
P
K

=
I
DSS
V
2
P
< 0K

=
I
DSS
V
2
P
> 0
V
GS
< V
P
for jI
DS
j > 0V
P
< V
GS
for jI
DS
j > 0
PMOS EnhancementNMOS Enhancement
V
t
< 0V
t
> 0
V
GS
< V
t
V
GS
> V
t
K

=

p
C
ox
W
2L
< 0K

=

n
C
ox
W
2L
> 0
PMOS DepletionNMOS Depletion
V
t
> 0V
t
< 0
V
GS
< V
t
for jI
DS
jV
GS
> V
t
< 0 for jI
DS
j > 0
K

=

p
C
ox
W
2L
< 0K

=

n
C
ox
W
2L
> 0
3