3-Input AND from Transistors

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2 Νοε 2013 (πριν από 3 χρόνια και 11 μήνες)

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CSIS

CSIS 4381

3
-
Input AND from Transistors


Illustrates basic use of IDL
-
800


Illustrates construction of gates


Illustrates the “transistor bleed
-
through” problem
that affects the AND circuit.


CSIS

CSIS 4381

Transistors in Series

A

B

Out

C

V+


Construction of 3
-
Input (A,B,C)
AND from transistors.


Note the resistor and output are at the
“bottom”.


Three inputs (from switches)

CSIS

CSIS 4381

Connection to Power

Next slide shows the connection to power.

+ 5 volt power supply.

Connects to top transistor

A

B

Out

C

V+

CSIS

CSIS 4381

Connection to Ground

A

B

Out

C

V+

After output.

Through the current
-
limiting
resistor.

CSIS

CSIS 4381

Connection to Logic Switches

A

B

Out

C

V+

Switches connect to each
transitor.

Switches are either:

0
-
off, no voltage,

or 1
-
On, +5 volts

CSIS

CSIS 4381

Measuring Output with the Meter

A

B

Out

C

V+

2.13


Digital Volt Meter connects
to output, and to the ground.


It measures the voltage
differential between those
two points.

CSIS

CSIS 4381

Measuring Output with a LED

The output can be connected to a Light Emitting Diode
(LED) rather than to the DVM.

A voltage of around 2.5 and greater will cause the LED to
light.

The LED is already wired on one end to the ground.

A current limiting resistor ensure that the LED does not
receive too great a voltage and current.

CSIS

CSIS 4381

Voltage


1 input on

A

B

Out

C

V+

2.13

Illustrates the “transistor
bleed
-
through” effect.

CSIS

CSIS 4381

Voltage


2 inputs on

A

B

Out

C

V+

2.84

Illustrates the “transistor
bleed
-
through” effect.

Two transistors, larger
voltage detected.

This voltage is large
enough to be detected as a
“1” by the LED.

CSIS

CSIS 4381

Voltage 3 inputs on

A

B

Out

C

V+

4.07

CSIS

CSIS 4381

“Bleed
-
Through” voltage can light an LED,
and be detected as a “1”

A

B

Out

C

V+

2.83

Illustrates the “transistor
bleed
-
through” effect.

Two transistors, larger
voltage detected.

This voltage is large
enough to be detected as a
“1” by the LED.

CSIS

CSIS 4381

Use NANDs or NORs


Need to support AND, OR and NOT as Boolean
operations


Manufacturing cost:


Single silicon layering


don’t need to support two places (layers) to
connect resistors, or measure output


AND/OR different layer from NOT


Complete set of operations


NAND or NOR can be
wired for any logic


Fabricate a chip with one type of gate


Avoids AND “transistor bleed
-
through” problem


Actual modern logic implementations will vary as
technologies evolve