EE 520 TOPICS IN BIOMEDICAL ENGINEERING

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ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



1



EE 520


TOPICS IN BIOMEDICAL ENGINEERING


Credit:


1



Area:



Biomedical Engineering (BE)


PIC:



Geddes


Prerequisite
:

Admission by consent of instructor. (May be repeated for
credit.)


Description:


This course is designed to present a broad spectrum o
f examples illustrating how
electrical engineering is used in the basic life and medical sciences. Each week, life
-
science research and medical
-
practice problems are presented by a speaker who is an
authority in his/her field. The speakers are drawn from
engineering, veterinary medicine,
biology, and industry. This is an interdisciplinary course of value to the undergraduates
and graduates. Three reports are required on topics selected from those presented by
the speakers.



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



2



EE 522


PROBLEMS IN THE MEASURE
MENT OF
PHYSIOLOGICAL EVENTS (BIOL 563, VPH 522)


Credit:


4


Area:



Biomedical Engineering (BE)


PIC:



Biomedical Engineering Staff


Prerequisite:

Consent of instructor must be obtained at least one year prior
to registering for the course.



Descripti
on:



Lectures devoted to the methods used to measure physiological events with
demonstrations and laboratory exercises to emphasize the practical aspects of
quantitative measurements on living subjects. The systems covered are cardiovascular,
respiratory
, central and peripheral nervous, gastrointestinal and renal.




Text:


L.A. Geddes and L.E. Baker,
Principles of Applied Biomedical Instrumentation,

John
Wiley, 3rd Edition, 1989. (0
-
471
-
60899
-
8)



Outline:















Weeks


1.

Events of th
e Cardiac Cycle








1.0


2.

Mechanical Aspects of Respiration







1.0


3.

Indirect Blood Pressure










4.

The Strength
-
Duration Curve of Excitable Tissue





1.0


5.

Record Analysis and Examination








1.0


6.

Nerve Propagation Vel
ocity








1.0


7.

Pulse Wave Velocity









1.0


8.

Electrocardiographic Trainer








1.0


9.

The Electrocardiogram of the Turtle







1.0

10.

Anesthesia and Blood Pressure in Dog







1.0

11.

Heart Sounds in the Experimental Animal






1.0

12.

Record Analysis and Examination








1.0

13.

Cardiac Output










1.0

14.

Cardiac Monitoring and Myocardial Infarction






1.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



3



EE 532

COMPUTATIONAL METHODS FOR POWER
SYSTEM ANALYSIS



Credit:


3


Area:



Energy Sources and Syst
ems (ES)


PIC:



Ong



Prerequisite:

EE 432


Prerequisite by Topic:

Familiarity with three
-
phase circuit calculations, matrix manipulations, and Fortran, C, or
MATLAB programming


Description:



System modeling and matrix analysis of three
-
phase power ne
tworks. Applications of
numerical methods and computers to the solution of a variety of problems related to the
planning, design and operation of electric power systems.



Objective:



An introduction to modern power system analysis and computer methods us
ed in
planning and operating electric power systems.


Course Outcomes:



A student who successfully completes this course will be able to:

1.

use network matrices in power system analysis (4, k),

2.

perform short circuit studies on a small network (4,b),

3.

perform

load flow calculations on a small network (4,b),

4.

understand automatic generation control of a power system (4, e, j,)and

5.

understand economic dispatch of a power system (4, e, j,)


Text:


Modern Power Systems Control and Operations,

Atif S. Debs, Decision

Systems
International





Continued next page



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



4



EE 532

COMPUTATIONAL METHODS FOR POWER
SYSTEM ANALYSIS


Outline:


Weeks

1.

Introduction: Network models and matrices






1.0

2.

Symmetrical components, sequence networks






2.0

3.

Symmetrical an
d unsymmetrical fault studies






2.5

4.

Low flow formulations, solution techniques, programming





3.0

aspects, transformer and phase shifter representation,

tie
-
line control.

5.

Load Flow Studies










2.0

6.

Economic dispatch










1.5

7.

Automatic generation control








3.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



5



EE 538


DIGITAL SIGNAL PROCESSING I



Credit:


3


Area:



Communications and Signal Processing (CS)


PIC:



Prerequisite
:

EE 301 and EE 302 or equivalent



Description:



Theory and algorithms f
or processing of deterministic and stochastic signals. Topics
include discrete signals, systems, and transforms, linear filtering, fast Fourier transform,
nonlinear filtering, spectrum estimation, linear prediction, adaptive filtering, and array
signal pr
ocessing.



Objective:



Provide the student with a broad, yet strong background in the traditional topics
associated with processing of deterministic digital signals, e.g., discrete
-
time
transforms, and linear filtering. Provide student with a strong bac
kground in traditional
topics associated with processing of stochastic signals, e.g., spectrum estimation and
linear prediction. Introduce the student to some of the more recent developments that
promise to have a broad impact on digital signal processing
, e.g., nonlinear filtering and
adaptive filtering.



Text:


J. G. Proakis and D.G. Manolakis,
Introduction to Digital Signal Processing,
3rd edition
MacMillan, NY, 1992.



Continued next page



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



6



EE 538


DIGITAL SIGNAL PROCESSING I



Outline:

Lectures

1.

Discrete signals, systems, and transforms






7.0

A.

Discrete linear system

B.

Discrete
-
time Fourier transform (DTFT)

C.

2
-
sided Z transfor

D.

Discrete Fourier transform (DFT)

2.

Linear filtering










5.0

A. Finite impulse response filters


1. Windowed
designs (Kaiser)


2. Equiripple designs

B. Infinite impulse response filters


1. Bilinear Z transform


2. Computer
-
aided techniques

3.

Fast Fourier transform (FFT) algorithms







3.0

A. Decimation in time

B. Decimation in frequency

C.

Chirp Z
-
Transform

D. Sectioned convolution

4.

Nonparametric methods of power spectrum estimation




3.0

A. Estimation of the autocorrelation sequence for random signals

B. Smoothing the periodogram: the Blackman
-
Turkey method


5.

Model
-
based power spe
ctrum estimation






6.0

A. Autoregressive (AR) spectral estimation

B. Lattice filter: Burg's method

C. Signal subspace methods

D. Applications


6.

Adaptive signal processing









9.0

A. Applications

B. Least mean square (LMS) adaptive algor
ithm

C. Recursive least squares (RLS) lattice filters

D. Adaptive beamforming


7.

Nonlinear filtering










9.0

A. Rank Order filters

B. Deterministic and statistical analysis of median filters

C. Threshold decomposition
--

stock filters

D. Ap
plications

8.

Exams











3.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



7



EE 544


DIGITAL COMMUNICATIONS


Credit:


3


Area:



Communications and Signal Processing (CS)


PIC:



Communications and Signal Processing Staff



Prerequisite:

EE 440 or graduate standing



Description:



Introduction
to digital communication systems and spread spectrum communications.
Topics include analog message digitization, signal space representation of digital
signals, binary and M
-
ary signalling methods, detection of binary and M
-
ary signals,
comparison of digi
tal communication systems in terms of signal energy and signal
bandwidth requirements. The principal types of spread spectrum systems are analyzed
and compared. Application of spread spectrum to multiple access systems and to
secure communication systems

is discussed.




Text:


Proakis, J.G.,
Digital Communications,

3rd edition, McGraw
-
Hill, 1995. ISBN
(0070517266)



Outline:

Lectures

1.

Fundamentals



A.

Channel Models









1.0



B.

Narrowband Gaussian Noise Repr.






1.0



C.

Matched Filter
s and Correlators







2.0



D.

Message Digitization








2.0



E.

Digital Modulation Methods







1.0

2.

Detection of Binary Signals

A.

Baseband Signal Detection







1.0

B.

Detection on Nonwhite Noise







1.0

C.

Effects of Timing Errors








1.0

D.

Intersymbol Interference








1.0

E.

Phase
-
Shift Keying (PSK)








1.0

F.

Differential PSK









1.0

G.

Frequency
-
Shift Keying (FSK)







1.0




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



8



EE 544


DIGITAL COMMUNICATIONS



Outline:

Lectures

3.

M
-
ary Signal Detect
ion



A.

Signal Space Representation







2.0


B.

Coherent Detection of M
-
ary Signals






1.0



C.

Union Bound for Orthogonal Signals






1.0



D.

Detection of Nonorthogonal Signals






3.0



E.

Biorthogonal



F.

Simplex



G.

Po
lyphase



H.

Quadriphase (QPSK)



I.

Offset QPSK



J.

Differential QPSK



K.

Noncoherent Detection of M
-
ary Signals






1.0



L.

Amplitude Shift Keying (ASK)



M.

Amplitude and Phase Shift Keying (APSK)

4.

Comparison of Digital Com
munication Systems



A.

Theoretical Limits of Performance







1.0



B.

Bandwidth Expansion Factor







1.0



C.

Energy and Bandwidth Comparison






1.0

5.

Fundamentals of Spread Spectrum



A.

General Concepts









1.0



B.

Direct Sequ
ence Spread Spectrum






1.0



C.

Frequency Hopping Spread Spectrum






1.0



D.

Hybrid Spreading Methods








1.0

6.

Analysis of Direct Sequence Systems



A.

Properties of PN Sequences







1.0



B.

Partial Correlation









1.0



C
.

Direct Sequence Performance







1.0



D.

Interference Rejection and Antijam






1.0



E.

Interception










1.0

7.

Analysis of Frequency Hop Systems



A.

Frequency Hopping Patterns







1.0



B.

Frequency Hopping Performance







1.0



C.

Interference Rejection and Antijam






1.0

8.

Applications of Spread Spectrum



A.

Multiple Access









1.0



B.

Jam Resistance









1.0



C.

Low Probability of Intercept







3.0

9.

Exams











3.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



9



EE 546

DIGITAL COMPUTATIONA
L TECHNIQUES FOR
ELECTRONIC CIRCUITS



Credit:


3


Area:



VLSI and Circuit Design (VC)


PIC:



Ogborn



Prerequisite:

EE 255 and 301 or graduate standing.



Description:



Digital computer methods for dc, ac, and transient analyses of electronic circuits
.
Linear, nonlinear and piecewise linear dynamic circuits are considered. Actual usage of
programs ECAP, SPICE, CORNAP, SNAP and MECA in coursework. Algorithms used
in these programs are studied.




Text:


Vlach and Singhal,
Computer Methods for Circuit

Analysis and Design
; Van Nostrand
Reinhold, 1994. 0
-
442
-
01194
-
6



Outline:

Lectures


1.

Overview of circuit simulation programs.







1.0


2.

DC and AC analysis of linear networks. Explicit form of nodal

Equations Gaussian elimination and LU factori
zation.





5.0



3.

DC analysis of nonliner resistive networks. Newton
-

Raphson

algorithm, companion model.








2.0


4.

Transient analysis of nonlinear resistive networks.

Implicit integration, discretized circuit models for capacitors

and induct
ors.











5.0


5.

Exam #1












1.0


6.

Circuit models for semiconductor devices (diodes, BJT, FET).

Piecewise
-
linear models and solution techniques.

Macromodel for op amps.









8.0


7.

Computer formulation of Kirchoff's Laws.

Comp
uter generation of fundamental loop and cutset matrices.




8.

Exam #2











1.0


9.

Tableau equations and modified nodal equations. The element stamps.



5.0

10.

Sparse matrix techniques. Fill
-
ins and ordering algorithms. Packed

vector implem
entation.









5.0

11.

Exam #3











1.0

12.

The stability region of numerical integration algorithms.





2.0

13.

Backward differentiation formulas. Predictor formulas.





3.0

14.

Transient analysis by BDF with variable step size and variable ord
er.



2.0

15.

Final Exams




ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



10



EE 547‡

INTRODUCTION TO COMPUTER
COMMUNICATION NETWORKS



Credit:


3


Area:



Communications and Signal Processing (CS)

Computer Engineering (CE)



PIC:



Shroff



Prerequisite
:

EE 302 or equivalent



Description:



A qual
itative and quantitative study of the issues in design, analysis and operation of
computer communication and telecommunication networks as they evolve towards the
integrated networks of the future employing both packet and circuit switching
technology. Th
e course covers packet and circuit switching, the OSI standards
architecture and protocols, elementary queueing theory for performance evaluation,
random access techniques, local area networks, reliability and error recovery, and
integrated networks.



Obj
ective:

To introduce students to the design, analysis and performance evaluation of computer
communication and telecommunication networks through an understanding of their
architectures and protocols.



Text:


M Schwartz,
Telecommunication Networks: Proto
cols, Modeling and Analysis,

Addison
Wesley, 1987.(0
-
201
-
16423
-
X)




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



11



EE 547‡


INTRODUCTION TO COMPUTER

COMMUNICATION NETWORKS



Outline:

Lectures

1.

Introduction










1.0



A.

Circuit and Packet Switching



B.

Layered Com
munication Architectures

2.

Layered Architectures in Data Networks






3.0



A.

OSI Standards Architecture and Protocols



B.

X.25 Protocol



C.

Systems Network Architecture (SNA)

3.

Elementary Queueing Theory







6.0

4.

Data Link Layer:

Examples and Performance Analysis




3.0



A.

Stop
-
and
-
Wait Protocol



B.

Go
-
Back
-
N Protocol



C.

High
-
level data Link Control (HDLC)

5.

Network Layer: Flow Control and Congestion Control




5.0



A.

Window
-
Flow Control



B.

SNA Path C
ontrol



C.

Input
-
buffer Limiting3



D.

Centralized Routing Algorithms



E.

Virtual Circuit and Datagram Networks



F.

Distributed Routing Algorithms

7.

Transport Layer









3.0



A.

OSI Transport Protocol



B.

Transmission
Control Protocol (TCP)

8.

Polling and Random Access in Data Networks





6.0



A.

Polling?



B.

Pure Aloha, slotted Aloha, CSMA/CD

9.

Local Area Networks and Design Issues






6.0



A.

CSMA/CD



B.

Token Ring



C.

Network Control



D.

Reliability, Availability, and Survivability

10.

Introduction to Circuit Switching







4.0



A.

Circuit and Packet Switching Compared



B.

Digital Switching Networks3



C.

Integrated Services Digital Networks (ISDN)



D.

Bro
adband ISDN

11.

Exams










2.0



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



12



EE 551


APPLIED MAGNETICS



Credit:


3


Area:



Fields and Optics (FO)


PIC:



Friedlaender/Nyenhuis


Prerequisite:

EE 311.





Description:



The elements of magnetics are reviewed and applied to a variety of technolo
gically
important devices. Traditional applications covered include permanent magnets,
transformers, and saturable reactors. Time is spent on the elements of magnetic
information technology
--

mostly digital and analog recording; and also on other memory
t
echnologies such as magnetic bubbles and magneto
-
optic recording. A discussion of
high frequency magnetic devices is included.



Objective:



To introduce the students to the concepts required to solve engineering problems
involving the use of magnetic ma
terials from dc to the megahertz range. Examples will
be introduced ranging from power applications of magnetics (transformers, motors) to
information technology such as magnetic recording or signal processing employing
magnetic materials. Great emphasis
will be placed on developing the students' problem
-
solving skills.




Outline:

Weeks

1.

Magnetic circuit and magnetic field concepts with applications

to soft and hard magnetic materials (partly review though for

many students this will be the first intr
oduction).

(Ampere's Circuital Law concepts)








2.5

2.

Magnetic circuits with "windings". Faraday's Law concepts



Equivalent circuit representation and philosophy (modeling)





2.5

3.

Applications to magnetic design and analysis. Typical ex
amples:



transformers, saturable reactors, permanent magnet devices.



Discussions of B
-
H properties, simple dynamic concepts, hysteresis



and coercive force (losses) introduced through the problems.


3.0

4.

Magnetic Information
Technology. Digital and analog magnetic



recording, mostly. Other memory devices such as bubble memories.


5.0

5.

Some high frequency applications of magnetics (e.g.,magneto
-
optics).


2.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



13



EE 552‡


INTRODUCTION TO LASERS



Credit:


3


Area:



Soli
d State Devices and Materials (SS)





Fields and Optics (FO)



PIC:



Elliott


Prerequisite:

EE 311



Description:



An introduction to lasers and laser applications which does not require a knowledge of
quantum mechanics as a prerequisite. Topics inclu
de: the theory of laser operation,
some specific laser systems, non
-
linear optics, optical detection, and applications to
optical communications, holography, laser
-
driven fusion, and integrated optics.


Text:




J. Verdeyen,
Laser Electronics,

Prentice
-
H
all, 1995.(0
-
13
-
706666
-
X)



Outline:

Weeks

1.

Introduction: Review of Some Aspects of Classical Optics Elementary

Optical Cavity Analysis. Gaussian Beams. Laser Cavity Modes



3.0

2.

Interactions of Radiation with Matter. Absorption, Emission, Scat
tering,

Line Broadening. Laser Media.








2.0

3.

Introduction to Laser Theory. Rate Theory. Gain Saturation.



Homogeneous and Inhomogeneous Broadening. Gain Narrowing.


Output Coupling. Optimization. Hole Burning. Threshold Behavior.

Pulse
Generation.










4.0

4.

Specfific Laser Systems: Solid State lasers. Tunable Lasers. Gas Lasers.



Semiconductior Lasers.









5.

Special Topics (Detectors, Coherence, etc.....)






1.0

6.

Exams











1.0



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



14



EE 554‡

ELECTRONIC INS
TRUMENTATION AND
CONTROL CIRCUITS



Credit:


3


Area:



Energy Sources and Systems (ES)





VLSI and Circuit Design (VC)


PIC:



Ogborn


Prerequisite:

EE 255, EE 301



Description:



Analysis and design of special amplifiers, pulse circuits, operational
circuits, DC
amplifiers and transducers used in instrumentation, control and computation.



Objective:



To provide a general background in electronic circuit analysis and design for senior and
beginning graduate students. To develop an understanding of th
e limitations of present
solid state devices that are used in electronic circuit design. To aid students in
experimental research, develop the specialized electronic circuits required for the
acquisition and processing of experimental data.



Text:




Cla
ss notes.



Outline:


Weeks

1.

Review of models for unipolar and bipolar transistors,



machine aids for analysis, ECAP.








1.0

2.

High frequency limitations, compensation, practical



design techniques.










3.0

3.

Power g
ain limitations maximum frequency of oscillation,



optimum terminations, narrow band high frequency amplifiers,



computer aided design techniques.








3.0

4.

Driving point impedance limitations, the return difference



algorithm, appli
cations to feedback pairs, negative imitance



circuits, electrometers.










2.0

5.

Noise limitations, noise figure, four terminal network noise



models, noise measurements.









1.0

6.

Low frequency limitations, the sag algorithm, DC

amplifiers,



thermal limitations, the analog switch, applications to



regulators and power amplifiers.








2.0

7.

Switching limitations, the charge control model, digital



examples, the power switch.









1.0

8.

Selected circu
it examples (e.g. operational amplifiers,



multiplier, logarithmic amplifiers, INIC's gyrator,



DC/AC converter, etc.)










2.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



15



EE 556



FUNDAMENTALS OF MICROELECTRONICS




PROCESSING (VLSI) (CHE 556)


Credit:


3


Area:



Solid State Dev
ices and Materials (SS)



PIC:



Neudeck


Prerequisite:

EE 305 or equivalent, or consent of instructor, or graduate
standing.



Text:

Campbell, Stephen A.,
The Science and Engineering of Microelectronic Fabrication,
Oxford Press, 1996. ISBN: 0
-
19
-
510508
-
7
.


Description:


The study of basic principles and practical aspects of the most advanced state of
electronics processing. Emphasis is placed on crystal growth, epitaxy, lithography, and
dry etching. Process
-
property relations are also presented.


Contin
ued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



16



EE 556



FUNDAMENTALS OF MICROELECTRONICS




PROCESSING (VLSI) (CHE 556)


Outline:

Hours

0.

Introduction



A.

Overview of Microelectronics







2.0



B.

Semiconductor Devices








3.0

1.

Crystal Growth and Epitaxy


A.

Crystal Growth









3.0


B.

Chemical Vapor Deposition
-

Vapor Phase Epitaxy





-

Molecular Beam Epitaxy








6.0



C.

Silicon in Insulators









3.0



D.

Doping Profiles in Epi
-
layers







3.0

2.

Dielectric and Polysilic
on Film Deposition



A.

Deposition Processes and Reactor Design





2.0



B.

Polysilicon and Silicon Dioxide







2.0

3.

Ion Implantation



A.

Ion Implant System
-

Dose Control






1.0



B.

Impurity Profiles of Implanted Ions






1.0



C.

Process Considerations









4.

Lithography



A.

Pattern Generation
-

Mask Making






2.0



B.

Printing and Engraving








2.0



C.

Resists










3.0

5.

Dry Etching



A.

Selectivity
-

Feature Size
Control







2.0



B.

Fundamentals of Dry Etching







2.0



C.

Process Considerations








2.0

6.

Other Processes
-

Device and Circuit Fabrication



A.

Oxidation
-

Diffusion


Metallization






3.0



B.

Fabrication Conside
rations








1.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



17



EE 557

INTEGRATED CIRCUIT FABRICATION
LABORATORY



Credit:


3


Area:



Solid State Devices and Materials (SS)


PIC:



Janes


Prerequisite:

EE 305 or graduate standing (limited registration).

Consent of instructor required.



Descri
ption:

Laboratory exercises in the fabrication and testing of silicon integrated circuits. Both
bipolarand MOS integrated circuit test chips are fabricated and tested. Laboratory
technique, the technology of integrated circuit fabrication, and electrical
characterization
are emphasized.



Design Project:


A process design project, utilizing the SUPREM
-
3 process simulator, will be completed.
Simulation of all major unit processes will be included.



Text:




S. A. Campbell,
The Science and Engineering o
f Microelectronic Fabrication,

Oxford
Univ. Press, 1996, ISBN 0
-
19
-
510508
-
7.



Outline:

LECTURES:


1.

Course/Lab Intro & Organization, Chemical Safety


2.

Overview, Unit Processes


3.

Diffusion


4.

Thermal Oxidation


5.

Ion Implantation


6.

Optical
Lithography & Resists


7.

SUPREM Process Simulation & Design Project


8.

Vacuum Science & Etching


9.

Physical & Chemical Deposition

10.

Crystal Growth & Epitaxy

12.

Process Technologies: MOS/CMOS

13.

Process Technologies: Bipolar

14.

Manufacturing & Y
ield

15.

Review

16.

Exam


Laboratory Exercises:



1.

3
-
mask Diode Test Chip


2.

6
-
mask Bipolar/CMOS/BiCMOS device and circuit chip


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



18




EE 558‡


INTEGRATED
-
CIRCUIT LAYOUT AND DESIGN



Credit:


3


Area:



Solid States Devices and Materials (SS)




VSLI and
Circuit Design (VC)


PIC:


Prerequisite:

EE 305 or EE 455 or graduate standing.



Description:



A project course to design, layout on a graphics terminal, and evaluate MSI and LSI
circuits. Bipolar layout design rules are studied and linear and digital
circuits are layed
out; I2L gates and logic functions. A bipolar linear I
-
C is designed and fabricated using
the masterslice approach, typically of the op
-
amp complexity. NMOS layout rules are
presented and logic gates and functions are layed out and des
igned into the graphics
system library. Using the "library" a MSI NMOS circuit is designed and simulated, and a
layout completed. CMOS circuits and layout design rules are applied to several layouts.



Objective:



The principle objective is to have the
student design with real I
-
C layout rules and
integrate circuit design with layout design and the fabrication process. The use of
computer graphics allows the student to make complex design drawings with a
minimum of effort, while Spice2 simulations are u
sed to prove the circuit design
information.



Text:




W. Maly,
Atlas of IC Technologies: An Introduction to VLSI Processes,

Addison
-
Wesley,
1987. (0
-
805
-
36850
-
7)



Outline:

Weeks


1.

Learn the graphics package MASK, bipolar processing, review




1.0


2.

Bipolar layout design rules and simulations








2
-
3


3.

Design layouts for bipolar linear and digital circuits







4.0


4.

N
-
MOS design rules and fabrication process for silicon gate



depletion load MOSFETS










5.0


5.

N
-
MOS l
ayout examples and pad protection.






6.0


6.

N
-
MOS gates and logic function layout







7.0


7.

NMOS models and Spice2 simulation; NMOS circuit design for speed



8.0


8.

CMOS circuit design, layout rules








9
-
10


9.

CMOS Examples of La
youts









11
-
12

10.

CMOS layout and design of logic functions






13
-
14

11.

Exams












15.0







ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



19



EE 559‡


MOS VLSI DESIGN


Credit:


3


Area:



VLSI and Circuit Design (VC)




Computer Engineering (CE)


PIC:



Roy


Pr
erequisite:


EE 365



Description:


An introduction to most aspects of large
-
scale MOS integrated circuit design including:
device fabrication and modeling; useful circuit building blocks; system considerations;
and algorithms to accomplish common tasks
. Most circuits discussed are treated in
detail with particular attention given those circuits, whose regular and/or expandable
structures, are primary candidates for integration. All circuits will be digital and will be
considered in the context of the
Silicon
-
gate MOS enhancement
-
depletion technology.
Homework will require the use of existing IC mask layout software and term projects will
be assigned.




Text:



Weste,
Principles of CMOS VLSI Design,

Addison
-
Wesley, 2nd edition, 1993. (0
-
201
-
53376
-
6).




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



20



EE 559



MOS⁖䱓I⁄ SIGN


Outline:

Lectures


1.

Device Fabrication and Modeling: Si
-
MOS enhancement and



depletion devices, fabrication, interconnection levels,

interconnection resistivites, sheet capacitance, design rules,

device models.










2.5


2.

Inverters: Logic voltage levels, logic threshold levels, transfer



characteristics, power dissipation, transient response, layout,



the all
-
enhancement inverter.








2.0


3.

Buffers and Gates: NAND and N
OR gates, buffers multistage



capacitor drivers.










3.0


4.

Transmission Gating: Transient response vs. number of stages,



level restoring, poly/active area cross
-
unders.






1.0


5.

Registers: Dynamic registers with two
-
phase clo
cking,

static registers, sampling of intermediate voltage levels,

LIFO stacks, FIFO queues.








2.0


6.

Optimum cross
-
under widths.








0.5


7.

Combinational Logic: PLA's, PLA folding, finite state machines



1.5


8.

Power Distribution










1.0


9.

Clock Generation and Distribution








0.5

10.

Pad Receivers and Drivers









1.0

11.

Procedures for orderly layout of I.C.'s







3.0

12.

Ram Design











2.5

13.

Design of Masterslices: Cell types and interconnection p
rovisions.



1.0

14.

Data Path Chip: ALU's, bus
-
precharging, shifters, general logic

cell, two
-
port register, microcoding.







4.0

15.

Switching: Crosspoint switches and circuit switching networks.



0.5

16.

Other Digital Circuits: Serial
-
in
-
parall
el
-
out registers, a string

compacitor, parity circuits, multipliers, counters, power
-
up

resetting, Buss Arbitrators, REQ/ACK ?Arbiters





6.0

17.

Calculator Algorithms: The GORDIC technique for ?multiplication,

division, and trigonometric functio
n evaluation.






3.5

18.

Structures for sorting.









1.5

19.

Array Processing Structures: Inner products, matrix
-
vector



multiplication, matrix multiplication







2.0

20.

Term Project Discussions









6.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



21



EE 562


INTRODUCTION TO DATA M
ANAGEMENT


Credit:


3


Area:



Computer Engineering (CE)


PIC:



Ghafoor


Prerequisite:

Graduate standing or consent of instructor



Description:


Emphasis is on the design of systems that can manipulate and retrieve data from large
databases using high

level formal languages. Topics covered are: data models and
data independence, normalization in relational databases, development of high level
query languages for relational and hierarchical models, visual query languages, object
oriented systems and o
bject oriented databases. The course includes a project that
accounts for about twenty percent of the grade for the course.



Objective:




To acquaint graduate students with up
-
to
-
date knowledge of the theory of relational and
object oriented data bases

and the development of database systems for applications.



Text:




C.J. Date,
An Introduction to Data Base Systems,

Volume I, 5th edition, Addison
Wesley. (0
-
201
-
54329
-
X)


Outline:

Weeks


1.

Knowledge and data and information








0.5


2.

Repre
sentation of knowledge in conventional date base system






1.0


3.

Semantic modelling: entity relationship








0.5


4.

Overview of data base management








0.5


5.

Relational data structure









1.0


6.

Relational integrity rul
es










0.5


7.

Relational algebra










1.0


8.

First order predicate calculus









1.0


9.

Relational calculus










1.0

10.

QBE












1.0

11.

Data manipulation by SQL on Oracle DBMS







1.0

12.

Nor
mal forms (paper by Salzburg) and formal design theory of data bases



1.0

13.

Knowledge intensive data models in engineering:



Object oriented framework








1.0




Visual query language for graphical interaction






1.0

14.

Associ
ation algebra: a mathematical foundation for object

oriented databases










0.5

15.

Object oriented intelligent computer integrated design,

process planning and inspection.








0.5

16.

Intelligent computer integrated manufacturing







0.5

17.

Computer supported cooperative work








0.5



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



22



EE 563


PROGRAMMING PARALLEL MACHINES


Credit:


3


Area:



Computer Engineering (CE)


PIC:



Eigenmann


Prerequisite
:

EE 264 and EE 463



Description:


Examines how to program parallel processing

systems. Various parallel algorithms are
presented to demonstrate different techniques for mapping tasks onto parallel
machines. Parallel architectures to be considered are: SIMD (synchronous), MIMD
(asynchronous), and mixed
-
mode (SIMD/MIMD hybrid). M
achines that represent these
classes to be used in the course are: the MasPar MP
-
1 (SIMD); nCUBE 2 (MIMD); and
PASM (mixed
-
mode). There will be three programming projects, one on each machine.
The similarities and differences among the machines and thei
r languages will be
discussed.



Objective:



To give students the background needed to be able to map computational tasks onto a
variety of parallel processing systems in an effective manner.



Text:




Reprints of research papers describing paralle
l machines and their use, as well as
appropriate programming manuals and related documentation, will be distributed or
made available for purchase.




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



23



EE 563


PROGRAMMING PARALLEL MACHINES


Outline:

Lectures


1.

Introduction models
of parallelism, networks






1
-
2


2.

Parallel algorithm case studies








3
-
7


3.

MasPar architecture










8.0


4.

Programming model for MasPar








9
-
11


5.

MasPar project description








12.0


6.

MasPar SIMD algorithms









13
-
14


7
.

Advanced programming concepts for MasPar






15
-
17


8.

Exam #1











18.0


9.

nCUBE 2 architecture









19.0

10.

Programming model for nCUBE 2








20
-
22

11.

nCUBE 2 project description








23.0

12.

nCUBE 2 MIMD algorithms








24
-
25

13.

Discussion of MasPar project








26.0

14.

Advanced programming concepts for nCUBE 2






27
-
29

15.

Exam #2











30.0

16.

PASM architecture










31.0

17.

Programming model for PASM








32
-
34

18.

PASM project description









35.0

19.

PASM

mixed
-
mode SIMD/MIMD algorithms






36
-
37

20.

Discussion of nCUBE 2 project








38.0

21.

Advanced programming concepts for PASM






39
-
41

22.

Comparisons of languages and machines






42
-
43

23.

Discussion of PASM project








44.0

24.

Exam #3












45.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



24



EE 565


COMPUTER ARCHITECTURE


Credit:


3


Area:



Computer Engineering (CE)


PIC:



Fortes


Prerequisite:


EE 365 or graduate standing



Description:


An introduction to the problems involved in designing and analyzing current machine
arc
hitectures. Major topics include performance and cost analysis, pipeline processing,
vector machines and numerical applications, hierarchical memory design, and
multiprocessor architectures. A quantitative approach allowing a computer system
designer to

determine the extent to which a design meets design goals is emphasized.



Text:




Patterson and J. Hennessy,
Computer Architecture
-

A Quantitative Approach,

second
edition, Morgan Kaufmann (1
-
55860
-
329
-
8).



Outline:

Weeks

1.

Introduction












0.5

2.

Performance and Cost









1.0

3.

Pipelining











3.0


A.

Implementation


B.

Hazards


C.

Performance Evaluation

D.

Advanced Techniques

4.

Vector Processors










2.0



A.

Fundamentals



B.

Case Study

5.

Memory Hierarchy










3.0



A.

Program Characteristics



B.

Cache Design



C.

Main Memory



D.

Virtual Memory

6.

Input/Output











2.0



A.

Performance Prediction



B.

I/O Devices

7.

Multiprocessors










2.5



A.

Models



B.

Interconnecti
on Techniques

8.

Exams











1.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



25



EE 566



CISC MICROPROCESSOR SYSTEM DESIGN



Credit:



3


Area:




Computer Engineering (CE)


PIC:




Meyer


Prerequisite:

EE 365 or equivalent



Description:


An overview of advanced architecture CICS microproces
sors and their associated
support components, with emphasis on incorporating these devices into both general
purpose and embedded board level designs for multi
-
microprocessor systems utilizing
open architecture system buses. Topics include a survey of 32
-
bit CISC
microprocessors, memory management, floating point support, advanced peripherals,
PLD
-
based "glue logic" design, performance evaluation, IEEE standard open
architecture system buses, and various pertinent interface and networking standards.
Desig
n experience will be gained through a comprehensive, semester
-
long project.



Objective:



To introduce students to the design of computer systems using advanced architecture
CISC microprocessors along with their related support chips as building blocks.

Also, to
provide students experience with state machine design, analysis of signal timing,
analysis of gate electrical characteristics, and use of modern programmable logic
devices to implement interface logic.



Text:




D. Tabak,
Advanced Microprocess
ors,

2nd edition, McGraw
-
Hill, 1995 (0
-
07
-
062
-
843
-
2)




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



26



EE 566



CISC MICROPROCESSOR SYSTEM DESIGN


Outline:


Weeks

1.

Review of microprocessor system design fundamentals, introduction to salient
characteristics of complex instruction

set (CISC) "advanced architecture"
microprocessors.

2.

Representative advanced peripherals: serial communication controllers,
counter/timers, parallel I/O, dual
-
port RAMs, DMA controllers.

3.

Memory management: segmentation, paging, memory protection, Progr
ess



Progress Report #1 due (serial interface module).

4.

Multiprogramming and multitasking, motivation for "multi
-
microprocessor" open
architecture bus systems.

5.

Intel "86" family survey.

6.

Intel "86" family survey, floating point support.



Progress Report #
2 due (counter/timer, parallel I/O module).

7.

Motorola "68000" family survey.

8.

Motorola "68000" family survey, floating point support.

9.

National "32x32" family survey, floating point support.


Midterm Exam

10.

Analysis of timing and electrical interfacing consider
ations, synthesis of desired
timing relationships, use of programmable logic devices to implement interface
logic.

11.

Benchmarking and performance evaluation, comparison criteria for choosing a
microprocessor for a specific application (embedded vs. general p
urpose).

12.

IEEE standard open architecture system buses: Multibus I, VME; Progress



Progress Report #3 due (CPU/RAM/ROM module)

13.

Open architecture system buses: VME, Multibus II

14.

Open architecture system buses: summary comparison.

15.

Interface and networking sta
ndards (GPIB, SDLC/HDLC, SCSI Ethernet);



Progress Report #4 due (bus interface module)

16.

Videotaped Project Summary Presentations, Final Project Report due.


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



27



EE 568

RISC & DSP MICROPROCESSOR SYSTEM
DESIGN


Credit:


3


Area:



Computer Engineering (CE)


PI
C:



Meyer


Prerequisite:


EE 365 or equivalent



Description:


This course provides an overview of reduced instruction set (RISC) microprocessors
and digital signal processing (DSP) microprocessors, with emphasis on incorporating
these devices in general

purpose and embedded system designs, respectively. The
first half of the course emphasizes design considerations for RISC microprocessor
based computer systems; a half
-
semester design project focuses on principles that
could be utilized in a general
-
purp
ose computer system (e.g., an engineering
workstation). The second half of the course emphasizes design considerations for DSP
microprocessor based computer systems: a half
-
semester design project focuses on
analog I/O interfacing techniques and use of th
ese devices for embedded applications
(e.g., spectrum analyzer, digital audio equalizer).



Objective:



To introduce students to the unique system design considerations associated with RISC
and DSP microprocessors. Also, to provide students experience
with designing support
circuitry for board level systems incorporating these devices.



Text:




Tabak, E.
Advanced Microprocessors,

Second Edition, McGraw
-
Hill, 1995.

(0
-
07
-
062843
-
2); various technical reference and data books.



Continued next page



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



28



EE 568

RISC & DSP MICROPROCESSOR SYSTEM
DESIGN


Outline:

Weeks


1.

Introduction to salient characteristics of reduced instruction set



microprocessors; overview of Design Project I; early



generation RISCs: Berkely RISC I & II, MIPS






1.0


2
.

Intel i860, Motorola M88000 family







2.0


3.

AMD 29000, Sun SPARC









3.0


4.

MIPS Rx000, HP PA
-
RISC









4.0


5.

PowerPC (IBM RS/6000), DEC Alpha







5.0


6.

Bus timing analysis and high
-
speed system design considerations



6.
0


7.

Memory system design considerations







7.0


8.

RISC performance evaluation and processor selection criteria



8.0




Midterm Exam


9.

The CISC vs. RISC debate,

Design Project I due

(core processor/memory/cache design for

a general
-
purpose

RISC computer system)






9.0

10.

Introduction to salient characteristics of digital signal processing



microprocessors, overview of typical embedded applications,



overview of Design Project II








10.0

11.

TMS 320 family overview









11.0

12.

Motorola 56000/96000 family overview







12.0

13.

Analog interfacing techniques, overview of both conventional






and oversampling A/D and D/A converters, survey of practical



oversampling converters suitable for high
-
performance signal



proce
ssing applications









13.0

14.

Embedded DSP system design case study






14.0

15.

DSP performance evaluation and processor selection criteria,



Design Project II due

(DSP system with analog I/O targeted for



a specific embedded application)








15.0

16.

Videotaped Project Summary Presentations






16.0



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



29



EE 569


INTRODUCTION TO ROBOTIC SYSTEMS
(CS569)


Credit:


3


Area:



Automatic Control (AC)


PIC:



Koivo


Prerequisite:


EE 382 and basic knowledge of vector
-
matrix manipulations,
or

EE 483, or consent of instructor



Description:

The topics to be covered include: basic components of robotic systems; selection of
coordinate frames; homogeneous transformations; solutions to kinematic equations;
velocity and force/torque relations; m
anipulator dynamics in Lagrange's formulation;
digital simulation of manipulator motion; motion planning; obstacle avoidance; controller
design using the computed torque method; and classical controllers for manipulators.



Text:



A.J. Koivo,
Fundamenta
ls for Control of Robotic Manipulators,

J. Wiley & Sons, Inc
(1989). (0
-
471
-
85714
-
9)



Outline:













Weeks

1.

Introduction to Robotic Systems



A.

Uses of robotic manipulators









0.5



B.

Components of robotic systems








0.5

2.

Kinematics of Manipulators



A.

Selection of coordinate frames








0.5



B.

Transformation matrices









1.5



C.

Calculation of inverse solutions








1.0

3.

Velocities, Forces, Torques in Joint and Ba
se Coordinates



A.

Differential motion









1.0



B.

Velocity relations









0.5


C.

Determination of forces, torques in a manipulator





0.5

4.

Dynamic Modelling



A.

Lagrange's energy expressions for a manipu
lator





1.0



B.

Lagrange's equation of motion








1.0



C.

Digital simulation of manipulator model

5.

Trajectory Planning



A.

Joint trajectory










1.0



B.

Cartesian path










1.0

6.

Path Control of Ma
nipulator



A.

Classical system design








0.5



B.

PID
-
controller design









0.5



C.

Force
-
torque control









1.0

7.

Special Topics











2.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



30



8.

Exams



EE 570



ARTIFICIAL INTELLIGENCE


Credit:


3


Area:



Computer Engineering (CE)


PIC:



Brodley


Prerequisite
:

Data Structures (EE 368), Probabilistic Methods (EE 302)


Prerequisite by description:


Basic understanding of data structures including the proper use of arrays, lists, trees
and queues. Understa
nding of searching and sorting concepts. Basic understanding of
probability and statistics, including Bayes rule, statistical tests of significance, and the
normal distribution.



Description:


Introduction to the basic concepts and various approaches of

artificial intelligence. The
first part of the course deals with heuristic search and shows how problems involving
search can be solved more efficiently by the use of heuristics and how in some cases it
is possible to discover heuristics automatically.
The next part of the course presents
ways to represent knowledge about the world and how to reason logically with that
knowledge. The third part of the course introduces the student to advanced topics of AI
drawn from machine learning, natural language un
derstanding, computer vision, and
reasoning under uncertainty. The emphasis of this part is to illustrate that
representation and search are fundamentals issues in all aspects of artificial
intelligence.



Objective:



To provide students with a compreh
ensive overview of the principles of artificial
intelligence.



Text:




Russell, S & Norvig, P.,
Artificial Intelligence: A Modern Approach,

Prentice Hall, 1995,
ISBN: (0
-
13
-
103805
-
2)




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



31



EE 570



ARTIFICIAL INTELLIGENCE


Outline:



Weeks

1.

What is AI?; Blind search








1.0

2.

Heuristic search









2
-
4

3.

Game Playing









5
-
6

4.

Knowledge and reasoning








7.0

5.

First
-
order logic and theorem proving






8
-
9

6.

Logical Reasoning Systems







10.0

7.

Planning










11.0

8.

Advanced topics chosen from:








Learning, Computer Vision, Natural Language


Understanding, and reasoning Under Uncertainty




12
-
15


Computer Usage:


Throughout the course homework assignments will require the use of

computer skills
developed in previous courses. Knowledge of algorithms and data structures will be
used to develop programs capable of solving artificial intelligence problems in areas
such as general search, game theory, deduction, and planning. Studen
ts will be
encouraged to use the programming languages LISP and Prolog for their projects.



ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



32



EE 573

COMPILERS & TRANSLATOR WRITING
SYSTEMS


Credit:


3


Area:



Computer Engineering (CE)


PIC:



Eigenmann


Prerequisite:

Proficiency in C language and basic

understanding of
compilers.



Description:


This course presents the concepts needed to efficiently design and implement
translators. Basic compiler/translation theory and technology are briefly reviewed, after
which the course focuses on software tool
s for the automatic construction of translators,
as well as more complex concepts involving the construction of compiler symbol tables,
etc. Using C on ECN UNIX, each student will construct a simple lexical
-
recognizer
generator, parser generator, and code
-
generator generator.



Objective:



To give students a better understanding of translation systems, stressing tools for
compiler construction.



Text:




Fischer and LeBlanc,
Crafting a Compiler with C, Benjamin/Cummings,

1991; course
notes and researc
h papers will be used. (0
-
8053
-
2166
-
7)




Continued next page


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



33




EE 573


COMPILERS & TRANSLATOR WRITING




SYSTEMS


Outline:

Weeks


1.

Translation/Compilation Goals: Compilers; Assemblers;



Interpreters; Natural Language








1.0


2.

Organi
zation of a Translator








0.5


3.

Grammars: Chomsky Hierarchy; Ambiguities; Determinism;






BNF and Syntax Diagrams









1.0


4.

Syntax Analysis (Parsing): Recursive Descent,



Precedence, and Shift/Reduce Parsing; Parser
-
Generators
;



Error Detection & Recovery








2.0


5.

Lexical Analysis: Separation from Syntax; String



Comparison, Scanning, NFA, DFA, and Atomic






2.0



Techniques; Lexical Recognizer Generators


6.

Symbol Tables: Linear, Tree, and Hashed
Tables;



Simple and Complex Data Types; Type Coercion/Casting;



Data Allocation











2.0


7.

Intermediate Parse Representations: Pseudo
-
code Models;




Tuples; Parse/Expression Trees; Interpreters






1.0


8.

Code Generation:

Techniques; Template
-
Driven Generators



2.0


9.

Introduction To Code Optimization (Improvement)





0.5

10.

Project discussions (dispersed throughout term)





2.0

11.

Exams











1.0


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



34



EE 574


SOFTWARE ENGINEERING METHODOLOGY


Credit:


3



Area:



Computer Engineering (CE)


PIC:



Mowle


Prerequisite:

EE 461 or graduate standing with a good working knowledge
of C programming, UNIX tools and data structures.



Description:


Topics include: Life cycle models, software planning, softw
are analysis, software
design including data flow and data structure design, software testing methods, and
software documentation. A software design project is a part of the course requirements.



Objective:



To introduce students to current software p
rocess and life cycle models. To introduce
students to software management methods for controlling and managing software
projects. Topics include: Life cycle models, requirements gathering, software planning,
software quality, risk management, software
inspections, software metrics, software
management concepts. Team project work is part of the course requirements.
Students are expected to use their programming skills and knowledge of data structures
to design and test software generated during their t
eam project activities.



Text:




1.

Robert S. Pressman,
Software Engineering: A Practitioner's Approach,

4th
edition, McGraw
-
Hill, Inc., 1992. (0
-
07
-
052183
-
2)

2.

M. Shaw and D. Garlan,
Software Architecture, Perspectives on an Emerging
Discipline,

Pre
ntice Hall. (0
-
13
-
182957
-
2)



Outline:

Lectures

1.

Life Cycle Models










6.0

2.

Requirements










5.0

3.

Software Risk Management








5.0

4.

Software Quality Management








4.0

5.

Software Inspections









3.0

6.

Software System Testing









7.0

7.

Software Metrics










3.0

8.

Software Management









5
-
6*

9.

Projects Work










4.0

10.

Exams











2.0


*5 if M,W,F; 6 if T,Th


ELECTRICAL AND COMPUTER ENGINEERING


500 & 600 LEVEL COURSES



35



EE 576


IMAGE SYNTHESIS


Credit:


3


Area:



Computer Engineering (CE)


PIC:



Maciejewski


P
rerequisite:


EE 301 or graduate standing



Description:

The purpose of this course is to introduce techniques for producing synthetic photo
-
realistic images by simulating the interaction of light with 3D geometric models. The
emphasis will be on compu
tationally expensive techniques centered around ray tracing
and radiosity as opposed to approximate algorithms amenable to real
-
time display.




Text:




A. Watt and M. Watt,
Advanced Animation and Rendering Techniques,

Addison
-
Wesley, 1992.



Outline:

W
eeks


1.

Introduction (Ch.1 of text)









1.0


2.

Local Illumination Models (Ch.2)








2.0


3.

Basic Ray Tracing (Ch.8)









1.0


4.

Accelerated Ray Tracing (Ch.9)








1.0


5.

Aliasing (Ch.4)










2.0


6.

Texture Mapping (C
h.6)









1.0


7.

Distributed Ray Tracing (Ch.10)








2.0


8.

Shadows (Ch.5)










1.0


9.

Radiosity (Ch.11)










2.0

10.

Global Illumination Models (Ch.12)