ECE 565---VLSI Design Automation -- Lecture Notes

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27 Νοε 2013 (πριν από 3 χρόνια και 6 μήνες)

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ECE 565
---
VLSI Design Automation
--

Lecture Notes

Instructor: Prof. Shantanu Dutt

1.

Intro. Lecture Notes # 1
ps

2.

Intro. Lecture Notes # 2
--

VLSI Design Flow (h
ardcopy)

3.

Lecture Notes # 3
--

High Level Synthesis (hardcopy)

4.

Lecture Notes # 3b
--

High Level Synthesis (courtesy of and copyrighted by
Prof. Kia Bazargan)
ps

5.

Lec
ture Notes # 4
--

Chip Layout Styles (hardcopy)

6.

Lecture Notes # 5
--

VLSI Circuit Issues (no notes, actually :
-
(. But was done
in class).

7.

Lecture Notes # 6
--

Partitioning (probability based)
ps

8.

PROP Papers:

Conference version: S. Dutt and W. Deng,
``A probability
-
based approach to
VLSI circuit partitioning'',

Proc. Design Automation Conference,

June 1996,
p
p. 100
-
105.


Journal version: S. Dutt and W. Deng, ``Probabilistic Approaches to VLSI
Circuit Partitioning'',
IEEE Trans. CAD,

Vol. 19, No. 5, May 2000, pp. 534
-
549.
ps(gzipped)
, or
pdf

9.

Floorplanning intro, simulated annealing and mixed integer programming
formulation (from Prof. Hai Zhou's web site at NWU)
pdf

10.

Yet another (good) FP slide set
pdf

11.

Sequence
-
pair based floorplanning technique: (courtesy of Karthik
Chandramouli)
pdf

12.

Intro to placement and basic PDP approach and rationale (hard copy)

13.

Classical placement algorithms (min
-
cut, simulated annealing)
pdf

14.

Simultaneous level partitioning based PDP:
ppt