Course Syllabus ECE546 Very Large Scale Integrated Circuit DesignDepartment of Electrical & Computer Engineering

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Course Syllabus

ECE546


Very Large Scale Integrated Circuit Design

Department of Electrical & Computer Engineering



1. Course Number and Name:

ECE546


Very Large Scale Integrated Circuit
Design

2. Credit Units/Contact Hours:



3/3

3. Course Coordinat
or:




Somnath Chattopadhyay

4. Text, References & Software

Recommended Text:

R. Jacob Baker, “CMOS circuit design, layout and simulation”, Wiley
-
Interscience, ISBN:
978
-
0
-
470
-
22941
-
5


Additional References:

Lecture Notes provided by Dr. Somnath Chattopadh
yay


Software:

MATLAB: Finding the minority carrier distribution in the channel, weak inversion and strong
inversion.

Synopsys: CMOS layout design


Internet Resources:

http://www.hpme12.edu/matlab/html
/http

http://www.synopsys.com

5. Specific Course Information

a. Course Description

Survey of VLSI technology and very large scale integrated systems. Problems which occur
when ordinary circuits are replicated to involve millions of devices. CMOS technolo
gy, design
styles up to the point of submission for fabrication. Computerized methods with high density
circuits with optimized speed and power consumption. Students perform simple layouts and
simulations suitable for extension to a very large scale.


b.
Prerequisite by Topic

The students should complete the ECE 442 or equivalent course elsewhere. The students taking
this course should have complete comprehensive knowledge of design simulate simple CMOS
logic for use in standards cell. The students should
gain conceptual understanding of MOS
theory: long channel MOSFET model, short channel MOSFET model and capacitance model.
The students should understand the CMOS and embedded NMOS and PMOS devices, MOS
gate design, gate characterization for noise margins,
propagation delays and power
dissipations.


c. Elective Course


6. Specific Goals for the Course

a. Specific Outcomes of Instructions



After completing this course the students should be able to:

1.
Concept of

well in CMOS and metal layers
.

2.
Understand
ing

the active and poly layers
.

3. C
oncept of CMOS fabrication

4.
Understanding of VLSI layout

5.
Concept of
modeling of CMOS for analog and digital applications

6.
Understanding
of
the inverter, static and dynamic logic
, memory circuits


b. Relationship t
o Student Outcomes

This supports the achievement of the following student outcomes:

a.

An ability to apply knowledge of math, science, and engineerin
g to the analysis of electrical

engineering problems.

b.

An ability to analyze and interpret experimental

data, demonstrated by the use of



appropriate mathematics, graphics, and/or numerical methods.

e.

An ability to identify, formulate, and solve electrical engineering problems.

i.

A recognition of the need for and an ability to engage in life
-
long

learning.

k.


An ability to use modern engineering techniques for analysis and design.

l.

Knowledge of probability and statistics.

n.

Knowledge of math including differential equations, linear algebra, complex vari
ables and
discrete math.


7. Topics
Co
vered/Course Outline

1.

Survey of VLSI Technology and very large scale integrated system based on

CMOS device
.

2.

Physics of PMOS and NMOS as well as CMOS

3.

Physics based simulation for CMOS design
.

4.

fabrication technology of CMOS for well, metal layers, active and

ploy layers, etc

5.

Simulation methods to optimize the device spe
e
d and power consumption of high density
device circuits.

6.

VLSI layout
for

very large scale integration.

7.

CMOS for analog and digital applications.






Prepared by:

Somnath Chattopadhyay, Profe
ssor of Electrical and Computer Engineering, November 2011

Ali Amini, Professor of Electrical and Computer Engineering, March 2013