IL 2222 - MOSFET

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IL 2222
-

MOSFET

Professor Ahmed Hemani

Dept. Of ES, School of ICT, KTH Kista

Email:
hemani@kth.se

Website: www.it.kth.se/~hemani

MOS Capacitor, MOSFET

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

MOS: M
etal
-
O
xide
-
S
emiconductor


SiO
2



metal

gate





Si body



V
g

gate


P
-
body




N
+

MOS capacitor

MOS transistor

V
g

SiO
2


N
+

~1.5nm thick

Few oxide molecules

Usually made of Poly Silicon

Energy Diagram at V
g
= 0

Flat
-
band Condition and Flat
-
band Voltage

Surface Accumulation

Make
V
g

<
V
fb



s

: surface potential, band bending

V
ox
: voltage across the oxide

F
s

is neglible in
accumulation




Surface Depletion ( v
g

>
v
fb

)

Surface Depletion

Slide 5
-
7

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Threshold Condition and Threshold Voltage

Threshold (of inversion):

n
s

= N
a

, or


(
E
c

E
f
)
surface
=
(
E
f



E
v
)
bulk
,
or




A = B,
and

C = D

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Threshold Voltage

At threshold,

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Threshold Voltage

+ for P
-
body,



for N
-
body

Strong Inversion

Beyond Threshold

V
g

>
V
t

Inversion Layer Charge,
Q
inv

(C/cm
2
)

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Choice of
V
t

and Gate Doping Type



V
t

is generally set at a small
positive
value


So
that, at V
g

= 0,


the
transistor does not have an
inversion layer and current does
not flow between the two N
+

regions. Enhancement type
device



P
-
body is normally paired with N
+
-
gate to achieve a small positive threshold
voltage.



N
-
body is normally paired with P
+
-
gate to achieve a small negative threshold
voltage.

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Review : Basic MOS Capacitor Theory

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Review : Basic MOS Capacitor Theory

total substrate charge,
Q
s

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

MOS CV Characteristics

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

MOS CV Characteristics

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

The quasi
-
static CV is obtained by the application of a slow linear
-
ramp voltage (< 0.1V/s) to the gate, while measuring
I
g

with a very
sensitive DC ammeter.
C

is calculated from
I
g

=
C

dV
g
/
dt
. This allows
sufficient time for
Q
inv

to respond to the slow
-
changing
V
g

.

(a)

(b)

(c)

(d)

General case for
both depletion and
inversion regions.

In the depletion
regions

V
g



V
t

Strong inversion

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Equivalent circuit in the depletion and the
inversion regimes

MOSFET

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

The MOSFET (MOS Field
-
Effect Transistor) is the building
block of
Gb

memory chips, GHz microprocessors, analog,
and RF circuits.


MOSFET the following characteristics
:



small size



high speed



low power



high gain


Introduction to the MOSFET

Basic MOSFET structure and IV characteristics

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Introduction to the MOSFET

Two ways of representing a MOSFET:

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Complementary MOSFETs Technology

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

CMOS (Complementary MOS) Inverter

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

MOSFET
V
t

and the Body Effect



Redefine

V
t

as

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Two
capacitors => two
charge components

MOSFET
V
t

and the Body Effect

Body effect slows down circuits? How can it be reduced?



Body effect
:

V
t

is a function
of

V
sb
.
When the source
-
body
junction is reverse
-
biased,
V
t

increases.




Body effect coefficient
:





=
C
dep
/
C
oxe



= 3T
oxe

/
W
dep


Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Retrograde Body Doping Profiles



W
dep

does not vary with

V
sb

.



Retrograde doping is popular because it reduces off
-
state


leakage and allows higher surface mobility.


W
dmax

for uniform doping

W
dmax

for retrograde doping

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Uniform Body Doping

When the source/body junction is reverse
-
biased, there are
two quasi
-
Fermi levels (
E
fn

and
E
fp
) which are separated by
qV
sb
. An NMOSFET reaches threshold of inversion when
E
c

is
close to
E
fn

, not
E
fp

. This requires the band
-
bending to be
2

B

+
V
sb

, not 2

B
.




is the
body
-
effect parameter
.

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Q
inv

in MOSFET

Channel
voltage
V
cs

(x)

x = 0:

V
cs

= V
s


x

=
L:
V
cs

=
V
d




Q
inv

=


C
oxe
(
V
gs



V
cs



V
t0



(
V
sb
+V
cs
)


=


C
oxe
(
V
gs



V
cs



(V
t0
+

V
sb
)



V
cs
)



=


C
oxe
(
V
gs



mV
cs



V
t
)





m


1 +

= 1 + 3T
oxe
/
W
dmax




m
is called the
bulk
-
charge factor


Typically m is 1.2 but can be simplified to 1

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

How to Measure the
V
t

of a MOSFET ?


Method A
.
V
t

is measured by extrapolating the
I
ds

versus
V
gs

curve
to
I
ds

= 0.


Method B
.
The Vg at which

Ids =0.1
m
A W/L

A

B

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Basic MOSFET IV Model

I
ds
=
WQ
inv
v
=
WQ
inv
m
n
E


=
WC
ox
(
V
gs


mV
cs



V
t
)
m
n
dV
cs
/
dx

I
ds
L

=
WC
ox
m
n
(
V
gs



V
t



mV
ds
/2)
V
ds

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Process

Transconductance

Gain factor

m is typically 1.2 but can be simplified to 1

V
dsat

: Drain Saturation Voltage

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Saturation Current and
Transconductance



T
ransconductance
:

g
m
=
dI
ds
/
dV
gs

Drain current in
saturation
region

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Saturation


Pinch Off

Channel Length Modulation


Increasing the V
ds

has the effect of the reducing the channel
length as the depletion region on the drain side increases.


Channel length reduction


lower resistance


Increase in Drain
Current


More pronounced for short channels


One of the five short channel effects

Velocity Saturation

sat

n

v

E

E

E





1

m



Velocity saturation
has large
and deleterious
effect
on the
I
on

of

MOSFETS

E

<<

E
sat

:

v =
m


E

n

E

>>

E
sat

:

v =
m
E
sat

n

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

x


(V/µm)

x

c



= 1.5

u

n



(

m

/

s

)

u

sat



= 10

5

Constant mobility (slope = µ)

Constant velocity

MOSFET IV Model with Velocity Saturation

inv

ds

v

WQ

I



sat

ds

ds

ds

ds

t

gs

ns

oxe

ds

E

V

I

V

V

m

V

V

WC

L

I

/

)

2

(









m

cs

sat

L

V

ds

t

cs

gs

ns

oxe

ds

dV

E

I

V

mV

V

WC

dx

I

ds

]

/

)

(

[

0

0













m

sat

cs

cs

ns

t

cs

gs

oxe

ds

E

dx

dV

dx

dV

V

mV

V

WC

I

/

1

/

)

(









m

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

V
cs

/L


the average electric field
is replaced by

MOSFET IV Model with Velocity Saturation

L

E

V

V

V

m

V

V

C

L

W

I

sat

ds

ds

ds

t

gs

ns

oxe

ds









1

)

2

(

m

L

E

V

I

channel

-

long

I

sat

ds

ds

ds

/

1





Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

MOSFET IV Model with Velocity Saturation

L

m
E

V

V

m

V

V

V

sat

t

gs

t

gs

dsat

/

)

(

2

1

1

/

)

(

2











dV

dI

ds

ds

,

0

Solving



L

E

V

V

m

V

sat

t

gs

dsat

1

1







ns

dsat

sat

v

E

m

2



A simpler and more accurate

V
dsat

is:

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

EXAMPLE: Drain Saturation Voltage


Question:
At
V
gs

= 1.8 V,
what is the
V
dsat

of an NFET with

T
oxe

= 3 nm,
V
t

= 0.25 V, and
W
dmax

= 45 nm
for (a) L =10
m
m,
(b) L = 1 um, (c) L = 0.1
m
m, and (d) L = 0.05
m
m
?

Solution:

From
V
gs

,
V
t

, and
T
oxe

,
m
ns

is 200 cm
2
V
-
1
s
-
1
.




E
sat
= 2v
sat
/
m
ns

=
8

10
4

V/cm


m =
1 +

3
T
oxe
/
W
dmax

=
1.2

1

1



|


|



















L

E

V

V

m

V

sat

t

gs

dsat

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

(a) L = 10
m
m,
V
dsat
=
(1/1.3V + 1/80V)
-
1

= 1.3 V


(b) L = 1
m
m,
V
dsat
=
(1/1.3V + 1/8V)
-
1

= 1.1 V


(c) L = 0.1
m
m,
V
dsat
=
(1/1.3V + 1/.8V)
-
1

= 0.5 V


(d) L = 0.05
m
m,
V
dsat
=
(1/1.3V + 1/.4V)
-
1
= 0.3 V

EXAMPLE: Drain Saturation Voltage

1















L

E

V

V

m

V

sat

t

gs

dsat

1



|


|





Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

I
dsat

with Velocity Saturation

Substituting
V
dsat

for
V
ds

in I
ds

equation gives:

L

m
E

V

V

I

channel

-

long

L

m
E

V

V

V

V

C

mL

W

I

sat

t

gs

dsat

sat

t

gs

t

gs

s

ox

dsat















1

1

)

(

2

2

m

Very short channel case:


t

gs

sat

V

V

L

E



<<

)

(

V

V

C

Wv

I

t

gs

ox

sat

dsat





I
dsat

is proportional to

V
gs

V
t

rather than

(
V
gs



V
t
)
2
,
not as
sensitive to
L


)

(

L

m
E

V

V

C

W
v

I

sat

t

gs

ox

sat

dsat







Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Current
-
Voltage Relations

A good
ol
’ transistor

Quadratic

Relationship

0

0.5

1

1.5

2

2.5

0

1

2

3

4

5

6

x 10

-
4

V

DS


(V)

I

D


(A)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Resistive

Saturation

V
DS

= V
GS

-

V
T

Velocity Saturation

Long
-
channel device

Short
-
channel device

I

D

V

DS

V

DSAT

V

GS


-

V

T

V

GS

= V

DD

The Short Channel Device enters saturation before V
DS

> V
GS

-

V
T

The I
DSAT
in short Channel Device has linear dependence on V
GS

as opposed to square dependence thus significantly reducing
the drain current delivered for a given voltage and thus slows
down the device

Velocity Saturation

What is the main difference between the
V
g

dependence
of the long
-

and short
-
channel length IV curves?

Modern Semiconductor Devices for Integrated Circuits (C.
Hu
)

Sub
-
Threshold Conduction

0

0.5

1

1.5

2

2.5

10

-
12

10

-
10

10

-
8

10

-
6

10

-
4

10

-
2

V

GS


(V)

I

D


(A)

V
T

Linear

Exponential

Quadratic

Typical values for S:

60 .. 100 mV/decade

The Slope Factor

S

is
D
V
GS

for
I
D
2
/
I
D
1

=10

A Unified Model

0

0.5

1

1.5

2

2.5

0

0.5

1

1.5

2

2.5

x 10

-
4

V

DS


(V)

I

D


(A)

Velocity

Saturated

Linear

Saturated

V
DSAT
=V
GT

V
DS
=V
DSAT

V
DS
=V
GT

S

D

G

B

Transistor Model
for
Manual Analysis

The Transistor as a Switch

The Transistor as a Switch

Dynamic Behavior of MOS Transistor

The Gate Capacitance

t

ox

n

+

n

+

Cross section

L

Gate oxide

x

d

x

d

L

d

Polysilicon

gate

Top view

Gate
-
bulk

overlap

Source

n

+

Drain

n

+

W

Gate Capacitance

Cut
-
off

Resistive

Saturation

Most important regions in digital design: saturation and cut
-
off

Gate Capacitance

Capacitance as a function of VGS

(with VDS = 0)

Capacitance as a function of the

degree of saturation

Diffusion Capacitance

Bottom

Side wall

Side wall

Channel

Source

N

D

Channel
-
stop implant


N

A

1

Substrate

N

A

W

x

j

L

S

Capacitances in 0.25
m
m⁃OS灲潣敳e

MOSFET


Some Secondary Effects

V

T

L

Long
-
channel threshold

Low

V

DS



threshold

Threshold as a function of

the length (for low

V

DS

)

Drain
-
induced barrier lowering

(for low

L

)

V
DS

V

T

Parasitic Resistances

W

L

D

Drain

Drain

contact

Polysilicon gate

R

G

D

S

D

V
GS,eff

R
S

R
D

R
S,D

= R


L
S,D
/W + R
C


Three Levels


Level 1


Long Channel, Channel Length Modulation


Level 2


Geometry based that includes detailed device physics


Velocity saturation, mobility degradation, DIBL


Analytical physics based model makes it complex and
inaccurate


Level 3


Semi
-
empirical model


Measured data to calibrate and decide the main parameters


Accurate and efficient. Widely used.


SPICE Models for the MOS Transistor

BSIM3
-
V3

Parameter Category

Description

Control

Selection of level and models for

mobility, capacitance and
noise

DC

Parameters for threshold and current and calculations

AC & Capacitance

Parameters for capacitance computations

dW and dL

Derivation of effective channel length and width

Process

Process parameters such as oxide

thickness and doping
concentrations TOX, XJ, GAMMA1, NCH, NSUB

Temperature

Nominal temperature

and temperature coefficients for various
device parameters TNOM

Bin

Bounds device dimensions for which the model is valid

LMIN, LMAX, WMIN, WMAX

Flicker Noise

Noise model parameters

SPICE Transistor Parameters

Parameter Name

Symbol

SPICE

Name

Units

Default

Value

Drawn Length

L

L

m

-

Effective Width

W

W

m

-

Source Area

AREA

AS

m
2

0

Drain Area

AREA

AD

m
2

0

Source Perimeter

PERIM

PS

m

0

Drain Perimeter

PERIM

PD

m

0

Squares of Source Diffusion

NRS

-

1

Squares of Drain Diffusion

NRD

-

1