quantisation - kpadhnan

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EE 551/451, Fall, 2006


Communication Systems


Zhu Han


Department of Electrical and Computer Engineering


Class 12


Sep. 28
th
, 2006









EE 541/451 Fall 2006

Quantization


Scalar Quantizer Block Diagram







Mid
-
tread


Mid
-
rise








EE 541/451 Fall 2006

Equations




function.

staircase
a

is

which
stic,
characteri
quantizer

the
called

is
(3.22)



)
g(

mapping

The
size.

step

the
is


,

levels

tion
reconstruc
or

tion
representa

the
are

L
,
1,2,

,

where

is
output
quantizer

the
then

)
(

If
3.9

Fig
in

shown

as

)
(
amplitude

discrete
a

into

)
(

amplitude

sample

the
ing
transform
of

process

The
:
on
quantizati

Amplitude
.
threshold
decision

or the

level

decision

the
is


Where
(3.21)


,
,
2
,
1

,

:
cell

partition

Define
1


1
m
m
m
t
m
nT
nT
m
m
L
k
m
m
m
k
k
s
s
k
k
k













k
ν
ν
J
J
k
k
k
k




EE 541/451 Fall 2006

Quantization Noise





EE 541/451 Fall 2006

Quantization Noise Level

(3.28)





12



1
)
(
]
[


(3.26)



otherwise
2



2

,
0
,
1
)
(

levels

of
number

total
:

,



(3.25)




2

is

size
-
step

the
type
midrise

the
of
quantizer

uniform
a

Assuming
(3.24)



)
0
]
[
(

,


(3.23)








value
sample

of


variable

random

by the

denoted

be
error

on
quantizati

Let the
2
2
2
2
2
2
2
2
2
max

max
max




































dq
q
dq
q
f
q
Q
E
q
q
f
L
m
m
m
L
m
M
E
V
M
Q
m
q
q
Q
Q
Q
Q






EE 541/451 Fall 2006

Quantization SNR

).
(bandwidth


increasing

lly with
exponentia

increases

(SNR)
(3.33)

)2
3
(




)
(




)
(

of
power

average

the
denote

Let
(3.32)

2
3
1



(3.31)


2
2



(3.30)


log



sample
per

bits

of
number

the
is


where
(3.29)


2




form,
binary

in

expressed

is

sample

quatized

the
When
o
2
2
max
2
o
2
2
max
2
2
max
R
m
P
P
SNR
t
m
P
m
m
L
R
R
L
R
Q
R
Q
R
R











, 6dB per bit





EE 541/451 Fall 2006

Example


SNR for varying number of representation levels for sinusoidal
modulation 1.8+6 X dB


Number of
representation level L

Number of Bits
per Sample, R

SNR (dB)

32

5

31.8

64

6

37.8

128

7

43.8

256

8

49.8





EE 541/451 Fall 2006

Conditions for Optimality of Scalar Quantizers

Let
m
(
t
) be a message signal drawn from a stationary process
M
(
t
)


-
A


m


A










m
1
=
-
A


m
L+1
=A


m
k



m
k+1

for
k
=1,2,…., L

The
k
th partition cell is defined as


J
k
:
m
k
<

m


m
k+1

for
k
=1,2,…., L

d
(
m
,
v
k
): distortion measure for using
v
k

to represent values inside
J
k
.





EE 541/451 Fall 2006

Condition for Optimal Quantizer





k
k
k
k
M
M
L
k
m
k
L
k
k
L
k
k
m
m
d
m
f
dm
m
f
m
d
D
k





by

zed
characteri
decoder
a
and
by

zed
characteri
encoder

an
:

components

two
of

consists
quantizer
owever the
solution.H

form

closed

have
not
may
which
problem
nonlinear
a

is

on
optimizati

The
(3.38)



)
(

)
,
(
commonly

used

is

distortion

square
-
mean

The
pdf

the
is

)
(

where
(3.37)

)
(
)
,
(
distortion

average

the

minimize
that
,


and


sets

two
the
Find


,
2
1
1
1
J
J
J













EE 541/451 Fall 2006

Condition One






)
(
2
1


0
)
(
)
(
)
(
)
(



,
)
(
)
(

distortion

square
-
mean
For





,
,
1,2

,
)
g(



mapping
nonlinear

by the

defined
encoder

the
find

to
is
That

.

D

minimizes
that
set

the
find

,

set

Given the

decoder
given

a
for
encoder

the
of

Optimality

.

1
Condition
,
,
1
opt

,
2
2
1
1
k
2
1
1
(3.40)
opt
k
opt
k
k
k
M
k
k
k
M
k
k
k
M
L
m
k
k
L
k
k
L
k
k
f
f
D
dm
m
f
m
D
L
k
m
k




























J
J
J
J
J
J
J
J





EE 541/451 Fall 2006

Condition Two








minimum

a

reaches

D

until
iteration,

Using









)
(
)
(



0
)
(
)
(
2



)
(
)
(

distortion

square
-
mean
For


.


minimized
that
set

the
find

,
set

Given the

encoder
given

a
for
decoder

the
of
y
.Optimalit

2
Condition
(3.47)
1

opt

,
1
k
2
1
k
2
1
1



























k
k
m
M
M
m
k
M
L
m
k
k
M
L
m
k
L
k
k
L
k
k
m
m
m
M
E
dm
m
f
dm
m
f
m
dm
m
f
m
D
dm
m
f
m
D
D
k
k
k
k
J
J
J
J
J









EE 541/451 Fall 2006

Vector Quantization





EE 541/451 Fall 2006

Vector Quantization

image and voice compression,

voice recognition

statistical pattern recognition

volume rendering





EE 541/451 Fall 2006

Rate Distortion Curve


Rate: How many codewords
(bits) are used?


Example: 16
-
bit audio vs. 8
-
bit PCM speech


Distortion: How much
distortion is introduced?


Example: mean absolute
difference(L
1
), mean square
error (L
2
)


Vector Quantizer often
performs better than Scalar
Quantizer with the cost of
complexity

Rate (bps)

Distortion

SQ

VQ





EE 541/451 Fall 2006

Non
-
uniform Quantization


Motivation


Speech signals have the
characteristic that
small
-
amplitude samples occur more
frequently than large
-
amplitude
ones


Human auditory system
exhibits a logarithmic
sensitivity


More sensitive at small
-
amplitude range (e.g., 0
might sound different from
0.1)


Less sensitive at large
-
amplitude range (e.g., 0.7
might not sound different
much from 0.8)



histogram of typical

speech signals





EE 541/451 Fall 2006

Non
-
uniform Quantizer

x

Q

x

^

F

F
-
1

Example


F: y=log(x)

F
-
1
: x=exp(x)

y

y

^

F: nonlinear compressing function

F
-
1
: nonlinear expanding function

F and F
-
1
: nonlinear compander

We will study nonuniform quantization by PCM example next

A law and


law





EE 541/451 Fall 2006



Law/A Law


The

-
law algorithm


-
law) is a
companding

algorithm,
primarily used in the
digital

telecommunication

systems of
North America

and
Japan
. Its purpose is to reduce the
dynamic
range

of an audio
signal
. In the analog domain, this can increase
the signal to noise ratio achieved during transmission, and in the
digital domain, it can reduce the quantization error (hence
increasing signal to quantization noise ratio).


A
-
law algorithm

used in the rest of worlds.


A
-
law algorithm provides a slightly larger dynamic range than
the
mu
-
law

at the cost of worse proportional distortion for small
signals. By convention, A
-
law is used for an international
connection if at least one country uses it.





EE 541/451 Fall 2006



Law





EE 541/451 Fall 2006

A Law





EE 541/451 Fall 2006



Law/A Law





EE 541/451 Fall 2006

Analog to Digital Converter


Main characteristics


Resolution and Dynamic range : how many bits


Conversion time and Bandwidth: sampling rate


Linearity


Integral


Differential


Different types


Successive approximation


Slope integration


Flash ADC


Sigma Delta





EE 541/451 Fall 2006

Successive approximation


Compare the signal with an n
-
bit
DAC output


Change the code until


DAC output = ADC input


An n
-
bit conversion requires n steps


Requires a Start and an End signals


Typical conversion time


1 to 50

s


Typical resolution


8 to 12 bits


Cost


15 to 600 CHF





EE 541/451 Fall 2006

Single slope integration


Start to charge a capacitor at
constant current


Count clock ticks during this time


Stop when the capacitor voltage
reaches the input


Cannot reach high resolution


capacitor


comparator

-

+

IN

C

R

S

Enable

N
-
bit Output

Q

Oscillator

Clk

Counter

Start

Conversion

Start

Conversion

0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
12
14
16
Time
Voltage accross the capacitor
Vin

Counting time





EE 541/451 Fall 2006

Flash ADC


Direct measurement with 2n
-
1
comparators


Typical performance:


4 to 10
-
12 bits


15 to 300 MHz


High power


Half
-
Flash ADC


2
-
step technique


1st flash conversion with 1/2 the precision


Subtracted with a DAC


New flash conversion


Waveform digitizing applications





EE 541/451 Fall 2006

Sigma
-
Delta ADC





EE 541/451 Fall 2006

Over
-
sampling ADC







Hence it is possible to increase the resolution by increasing
the sampling frequency and filtering


Reason is the noise level reduce by over sampling.


Example :


an 8
-
bit ADC becomes a 9
-
bit ADC with an over
-
sampling factor of 4


But the 8
-
bit ADC must meet the linearity requirement of a 9
-
bit


bits
of
number
effective
the
being
n
n
SNR
dB
f
f
n
f
f
A
A
x
SNR
s
s
n
'
6
8
.
1
log
10
6
8
.
1
2
12
8
log
10
log
10
0
0
2
2
2
2
2











































EE 541/451 Fall 2006

Resolution/Throughput Rate


<10kHz

10

100 kHz

0.1

1 MHz

1

10 MHz

10

100 MHz

> 100 MHz

>17 bits








14

16 bits












12

13 bits












10

11 bits












8

9 bits











<8 bits













EE 541/451 Fall 2006

Digital to Analog Converter


Pulse Width Modulator

DAC


Delta
-
Sigma DAC



Binary Weighted DAC



R
-
2R Ladder

DAC



Thermometer coded DAC



Segmented DAC



Hybrid DAC






EE 541/451 Fall 2006

Homework


Project descriptions on line


Term project, on line, 80% technical. 20% others


6.1.2


6.1.4


6.1.6


6.1.7(graduate)


Due 10/10/06





EE 541/451 Fall 2006

Questions?