Chapter 1: Introduction to PIC18

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The PIC18 Microcontroller
Chapter 1: Introduction to PIC18
The PIC18 Microcontroller
Han-Way Huang
MinnesotaStateUniversityMankato
Minnesota

State

University
,
Mankato
H. Huang Transparency No.1-1
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
What is a computer?
Software
Hardware
Hardware
Computer Hardware Organization
Processor
Control Unit
Common Bus (address, data, & control)
Datapath
Arithmetic
Logic Unit
Memory
Registers
Program
Storage
Data
Storage
Output
Units
Input
Units
H. Huang Transparency No.1-2
Copyright @ 2005 Thomson Delmar Learning
Figure 1.1 Computer Organization
The PIC18 Microcontroller
Th
Th
e processor
Registers --storage locations in the processor
Arithmeticlogicunit
Arithmetic

logic

unit
Control unit
p
ro
g
ram counte
r
contains the address of the next instruction to be execute
d
pg
status registerflags the instruction execution result
Themicroprocessor
A processor implemented on a very large scale integration (VLSI) chip
Peripheral chips are needed to construct a product
The Microcontroller
The processor and peripheral functions implemented on one VLSI chip
H. Huang Transparency No.1-3
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
FeaturesofthePIC18microcontroller
Features

of

the

PIC18

microcontroller
-8-bit CPU
-2 MB program memory space
-256 bytes to 1KB of data EEPROM
-Up to 3968 bytes of on-chip SRAM
-4 KB to 128KB flash program memory
-Sophisticated timer functions that include: input capture, output compare,
PWM, real-time interrupt, and watchdog timer
-
Serialcommunicationinterfaces:SCISPII2CandCAN
Serial

communication

interfaces:

SCI
,
SPI
,
I2C
,
and

CAN
-Background debug mode (BDM)
-10-bit A/D converter
Mttibilit
-
M
emory pro
t
ec
ti
on capa
bilit
y
-Instruction pipelining
-Operates at up to 40 MHz crystal oscillator
H. Huang Transparency No.1-4
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
EmbeddedSystems
Embedded

Systems
-A product that uses one or more microcontrollers as controller (s).
-End users are only interested in the functionality of the product but not on
the microcontroller itself.
-Cell phones, home security system, automobiles, and many other products
are examples of embedded products.
H. Huang Transparency No.1-5
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Semiconductor memor
y
y
•Random-access memory(RAM): same amount of time is required to access
any location on the same chip
Rd
l
(ROM)lbdbttitttbth

R
ea
d
-on
l
y memory
(ROM)
: can on
l
y
b
e rea
d

b
u
t
no
t
wr
itt
en
t
o
b
y
th
e
processor
Random-access memory
•Dynamic random-access memory(DRAM): need periodic refresh
•Static random-access memory(SRAM): no periodic refresh is required
Read-only memory

Mask
-
programmedread
-
onlymemory
(MROM):programmedwhenbeing
Mask
programmed

read
only

memory
(MROM):

programmed

when

being

manufactured
•Programmable read-only memory(PROM): can be programmed by the end
user
H. Huang Transparency No.1-6
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
ErasableprogrammableROM(EPROM)
Erasable

programmable

ROM

(EPROM)

1. electrically programmable many times
2. erased by ultraviolet light (through a window)
3
bliblk(hlhiiti)
3
. erasa
bl
e
i
n
b
u
lk

(
w
h
o
l
e c
hi
p
i
n one erasure opera
ti
on
)
Electrically erasable programmable ROM (EEPROM)
1. electrically programmable many times
2. electrically erasable many times
3. can be erased one location, one row, or whole chip in one operation
Flash memory
1. electrically programmable many times
2. electrically erasable many times
3. can only be erased in bulk (either a block or the whole chip)
H. Huang Transparency No.1-7
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Computer software
-Computer programs are known as software
-A program is a sequence of instructions
Machine instruction
-A sequence of binary digits which can be executed by the processor
dddddbfhbi
-Har
d
to un
d
erstan
d
, program, an
d

d
e
b
ug
f
or
h
uman
b
e
i
ng
Assembly language
-Defined by assembly instructions
-An assembly instruction is a mnemonic representation of a machine
instruction
Abltbtltdbfitbtd
-
A
ssem
bl
y programs mus
t

b
e
t
rans
l
a
t
e
d

b
e
f
ore
it
can
b
e execu
t
e
d
--
translated by an assembler
-Programmers need to work on the program logic at a very low level and can’t
achieve hi
g
h
p
roductivit
y
.
H. Huang Transparency No.1-8
Copyright @ 2005 Thomson Delmar Learning
gpy
The PIC18 Microcontroller
High
-
levellanguage
High
-
level

language
-Syntax of a high-level language is similar to English
-A translator is required to translate the program written in a
high-level language --done by a compiler
-Allows the user to work on the program logic at higher level.
Sourcecode
Source

code
-A program written in assembly or high-level language
Object code -The output of an assembler or compiler
H. Huang Transparency No.1-9
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Source code and object code examples
address ob
j
ect code line no.Source code
j
----------------------------------------------------------------------------------------------
00001E 0E06 00010 movlw 0x06
000020 6E11 00011 movwf 0x11
,
A
,
000022 0E07 00012 movlw 0x07
000024 6E12 00013 movwf 0x12,A
0000
2
6

0
E
08

000
14 m
ov
l
w

0
x
08
00006
008
000ovw
008
000028 6E13 00015 movwf 0x13,A
00002A 0E05 00016 movlw 0x05
00002C
5E10
00017subwf
0x10,F,A
00002C

5E10

00017

subwf

0x10,F,A
00002E 5E11 00018 subwf x11,F,A
H. Huang Transparency No.1-10
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Radix S
p
ecification
p
-Hexadecimal (or hex) number is specified by adding the prefix 0xor by
enclosing the number with single quotes and preceding it by an H.
0x02
0x1234
H
`
2040’
arehexnumbers
-
0x02
,
0x1234
,
H2040’
are

hex

numbers
-Decimal numbers are enclosed by single quotes and preceded by letter D.
-D`10’and D`123’are decimal numbers
-Octal and binary numbers are similarly specified.
-O`234’is an octal number; B’01011100’is a binary number.
H. Huang Transparency No.1-11
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Memory Addressing
-Memory consists of a sequence of directly addressable locations.
Aliifd
ifii
-
A

l
ocat
i
on
i
s re
f
erre
d
to as an
i
n
f
ormat
i
on un
i
t.
-A memory location can be used to store data, instruction, and the statusof
peripheral devices.
-A memor
y
location has two com
p
onents: an addressand its contents.
yp
Address
Contents
Figure 1.2 The components of a memory location
H. Huang Transparency No.1-12
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
The PIC18 Memory Organization
-
DataMemoryandProgramMemoryareseparated
Data

Memory

and

Program

Memory

are

separated
-Separation of data memory and program memory makes possible the
simultaneous access of data and instruction.
-Data memory are used as general-purpose registers or special function registers
-On-chi
p
Data EEPROM are
p
rovided in some PIC18 MCUs
pp
H. Huang Transparency No.1-13
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Separation of Data Memory and Program Memory
Inside the c chip
Program
Memory
Space
Data
Memory
21-bit progam address
12-bit register address
Space
(a portion
of this
space is on
th
PIC18
CPU
Space
(Special
function
registers and
l
th
e 
c
chip)
genera
l
purpose
RAM)
16-bit instruction bus
8-bit data bus
Figure 1.3 The PIC18 memory spaces
H. Huang Transparency No.1-14
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
PIC18 Data Memory
-
Implemented in SRAM and consists of general-purpose registersand
special-function registers. Both are referred to as data registers.
-A PI
C
1
8
M
CU
m
ay
h
ave

up

to
4
096

bytes

o
f
data
m
e
m
o
r
y.
C8CUayaveupto096bytesodataeoy.
-Data memory is divided into banks. Each bank has 256 bytes.
-General-purpose registers are used to hold dynamic data.
-Special-function registers are used to control the operation of peripheral
functions.
-
Only one bank is active at any time. The active bank is specified by the BSR
register
register
.
-Bank switching is an overhead and can be error-prone
-PIC18 implements the access bankto reduce the problem caused by bank
switching.
-Access bankconsists of the lowest 96 bytes and the highest 160 bytes of the
data memory space.
H. Huang Transparency No.1-15
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Access RAM
000h
05Fh
BSR<3:0>
=
0000
GPRs
05Fh
060h
0FFh
100h
1FFh
GPRs
Bank 0
Bank 1

0000
= 0001
200h
2FFh
300h
GPRs
GPRs
ARAMl
000h
Access Bank
Bank 2
Bank 3
= 0010
= 0011
3FFh
400h
GPRs
A
ccess
RAM

l
ow
Access RAM high
SFRs
000h
05Fh
060h
0FFh
Bank 4
to
Bk13
GPRs
DFFh
E00h
EFFh
B
an
k

13
Bank 14
= 1110
Note. 1. BSR is the 4-bit bank select register.
Unused
SFRs
EFFh
F00h
F5Fh
F60h
FFFh
Bank 15
= 1111
H. Huang Transparency No.1-16
Copyright @ 2005 Thomson Delmar Learning
Figure 1.4 Data memory map for PIC18 devices (redraw with permission of Microchip)
The PIC18 Microcontroller
ProgramMemoryOrganization
Program

Memory

Organization
-The program counter (PC) is 21-bit long, which enables the user program to
access up to 2 MB of program memory.
-The PIC18 has a 31-entry return address stack to hold the return address for
subroutine call.
-After power-on, the PIC18 starts to execute instructions from address 0.
-The location at address 0x08 is reserved for high-priority interrupt service
routine.
-
Thelocationataddress0x18isreservedforlow
-
priorityinterruptservice
The

location

at

address

0x18

is

reserved

for

low
priority

interrupt

service

routine.
-Up to 128KB (at present time) of program memory is inside the MCU chip.
PtfthiltdtidfthMCUhi
-
P
ar
t
o
f

th
e program memory
i
s
l
oca
t
e
d
ou
t
s
id
e o
f

th
e
MCU
c
hi
p.
H. Huang Transparency No.1-17
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
PC<20:0>
21
stack level 1
stacklevel31
.
.
.
stack

level

31
000000
h
000008h
Reset Vector
High Priority Interrupt Vector
000018h
Low Priority Interrupt Vector
y
Space
On-chip and external
yxxxxxh
User Memor
y
program memory
1FFFFFh
Unimplemented
program memory
Read '0'
H. Huang Transparency No.1-18
Copyright @ 2005 Thomson Delmar Learning
1FFFFFh
Figure 1.5 PIC18 Program memory Organization (redraw with permission of
Microchip)
Note. y can be 0 or 1 whereas x can be 0-F
The PIC18 Microcontroller
ThePIC18CPURegister
The

PIC18

CPU

Register
-The group of registers from 0xFD8 to 0xFFF are dedicated to the general
control of MCU operation.
hilidibl
-T
h
e CPU reg
i
sters are
li
ste
d

i
n Ta
bl
e 1.2.
-The WREG register is involved in the execution of many instructions.
-
TheSTATUSregisterholdsthestatusflagsfortheinstructionexecutionandis
The

STATUS

register

holds

the

status

flags

for

the

instruction

execution

and

is

shown in Figure 1.6.
H. Huang Transparency No.1-19
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
n
e
r latch
latch
b
yte
y
te
e
t
er
t
er 2
t
er 3
o
inter 0
0 (to GPRs)
r
0 (to GPRs)
0
(to GPRs)
gh byte
w
byte
o
inter 1
1 (to GPRs)
r
1 (to GPRs)
1
(to GPRs)
gh byte
w
byte
o
inter 2
2 (to GPRs)
r
2 (to GPRs)
2
(to GPRs)
gh byte
w
byte
Descriptio
n
a
ck (upper)
a
ck (high)
a
ck (low)
nter
r
ogram count
e
gram counter

counter low
b
i
nter upper b
y
i
nter high byt
e
i
nter low byte
c
h
duct register
d
uct register
control regis
t
control regis
t
control regis
t
ile register p
o
e
ment pointer
ement pointe
r
m
ent pointer
0
E
G to FSR0
t
register 0 hi
t
register 0 lo
w

register
ile register p
o
e
ment pointer
ement pointe
r
m
ent pointer
1
E
G to FSR1
t
register 1 hi
t
register 1 lo
w
e
ct register
ile register p
o
e
ment pointer
ement pointe
r
m
ent pointer
2
E
G to FSR2
t
register 2 hi
t
register 2 lo
w
g
oster
isters
1
)
1)
)
1
)
1)
)
1
)
(
1)
)
Top of st
a
Top of st
a
Top of st
a
Stack poi
Upper p
r
High pro
Program

Table po
i
Table po
i
Table po
i
Table lat
c
High pro
Low pro
d
Interrupt
Interrupt
Interrupt
Indirect f
Post incr
e
Post decr
Preincre
m
Add WR
E
File selec
t
File selec
t
Working

Indirect f
Post incr
e
Post decr
Preincre
m
Add WR
E
File selec
t
File selec
t
Bank sel
e
Indirect f
Post incr
e
Post decr
Preincre
m
Add WR
E
File selec
t
File selec
t
Status re
g
s
ical regiser
C
18 CPU reg
Name
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
(1)
POSTINC0
(
1
POSTDEC0
(
PREINC0
(1
)
PLUSW0
(1)
FSR0H
FSR0L
WREG
INDF1
(1)
POSTINC1
(
1
POSTDEC1
(
PREINC1
(1
)
PLUSW1
(1)
FSR1H
FSR1L
BSR
INDF2
(1)
POSTINC2
(
1
POSRDEC2
(
PREINC2
(1
)
PLUSW2
(1)
FSR2H
FSR2L
STATUS

is not a phy
s
T
able 1.2 PI
C
address
0xFFF
0xFFE
0xFFD
0xFFC
0xFFB
0xFFA
0xFF9
0xFF8
0xFF7
0xFF6
0xFF5
0xFF4
0xFF3
0xFF2
0xFF1
0xFF0
0xFEF
0xFEE
0xFED
0xFEC
0xFEB
0xFEA
0xFE9
0xFE8
0xFE7
0xFE6
0xFE5
0xFE4
0xFE3
0xFE2
0xFE1
0xFE0
0xFDF
0xFDE
0xFDD
0xFDC
0xFDB
0xFDA
0xFD9
0xFD8
N
ote 1. This

H. Huang Transparency No.1-20
Copyright @ 2005 Thomson Delmar Learning
T
N
The PIC18 Microcontroller
i
p)
C
.
z
ero.
.
o
ccurred.
occurred.
L
F)
3 of the
.
l
t occurred.
u
lt has
L
F)
w
order bit
0
s
sion of Microch
i
ZDC
m
etic
o
peration is zero
o
peration is not
z
B
WF instructions
.
bit of the result
o
r
bit of the result
r rotate (RRF, R
L
e
r the bit 4 or bit
B
WF instructions
.
n
t bit of the resu
l
ant bit of the res
u
r rotate (RRF, R
L
e
r the high or lo
w
21
d
raw with permi
s
NOV
negative
positive
d
for signed arith
m
r
re
d
i
thmetic or logic
o
i
thmetic or logic
o
i
t
W
, SUBLW, SU
B
h
e 4th low-order
the 4th low-orde
r
t
y is reversed. Fo
loaded with eith
e
W
, SUBLW, SU
B
h
e most significa
n
the most signific
t
y is reversed. Fo
loaded with eith
e
43
ster (0xFD8) (re
d
----
t
ive bit
i
thmetic result is
i
thmetic result is
e
rflow bit
v
erflow occurre
d
o
overflow occu
r
f
lag
h
e result of an ar
i
h
e result of an ar
i
i
t carry/borrow b
i
D
DWF, ADDL
W
carry-out from t
h
o
carry-out from
o
rrow, the polari
t
c
tions, this bit is
e
register.
/
borrow bit
D
DWF, ADDL
W
carry-out from t
h
o
carry-out from
c
curred.
o
rrow, the polari
t
c
tions, this bit is
source register.
65
h
e STATUS regi
--
N: Nega
t
1 = ar
i
0 = ar
i
OV: Ov
e
1 = O
v
0 = N
o
Z: Zero
f
1 = T
h
0 = T
h
DC: Dig
i
For A
D
1 = A
0 = N
o
For b
o
instru
c
sourc
e
C: Carry
/
For A
D
1 = A
0 = N
o
o
c
For b
o
instru
c
of the
7
Figure 1.6 T
h
H. Huang Transparency No.1-21
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
The PIC18 Pi
p
elinin
g
pg
-The PIC18 Divide most of the instruction execution into two stages: instruction
fetch and instruction execution.
UptotwoinstructionsareoverlappedintheirexecutionOneinstructionisin
-
Up

to

two

instructions

are

overlapped

in

their

execution
.
One

instruction

is

in

fetch stage while the second instruction is in execution stage.
-Because of pipelining, each instruction appears to take one instruction cycle to
complete
complete
.
MOVLW 55h
fetch 1execute 1
TCY0TCY1
TCY2TCY3TCY4
TCY5
MOVWF PORTB
BRA sub_1
BSF PORTA,BIT3
fetch 2execute 2
fetch 3execute 3
fetch 4flush
Instruction @address sub_1
fetch sub_1execute
sub_1
Note: All instructions are single cycle, except for any program branches.
H. Huang Transparency No.1-22
Copyright @ 2005 Thomson Delmar Learning
Figure 1.7 An example of instruction pipeline flow
The PIC18 Microcontroller
InstructionFormat
Instruction

Format
-Format for byte orientedinstructions
0
7
8
9
10
15
opcodeda
f
0
7
8
9
10
15
d = 0 for result destination to be WREG register.
d = 1 for result destination to be file register (f)
a = 0 to force Access Bank
a = 1 for BSR to select bank
f = 8-bit file register address
Figure 1.8 Byte-oriented file register operations (redraw with permission of
Microchip)
H. Huang Transparency No.1-23
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Byte-to-byte Operations
opcode
f (source file register)
0
1215
11
0
12
15
11
1111
f (destination file register)
0
12
15
11
f = 12-bit file register address
Figure 1.9 Byte to byte move operations (2 words) (redraw with permission of Microchip)
Bit-oriented file register operations
opcodeba
f
07
8
11
15
12
9
b
= 3-bit position of bit in the file register (f).
a = 0 to force Access Bank
a = 1 for BSR to select bank
f = 8-bit file register address
Figure110Bitorientedfileregisteroperations(redrawwithpermissionof
H. Huang Transparency No.1-24
Copyright @ 2005 Thomson Delmar Learning
Figure

1
.
10

Bit
-
oriented

file

register

operations

(redraw

with

permission

of
Microchip)
The PIC18 Microcontroller
Literaloperations
Literal

operations
-A literal is a number to be operated on directly by the CPU
0
7
8
15
opcode
k
0
7
8
15
k = 8-bit immediate value
Figure 1.11 Literal operations (redraw with permission of Microchip)
Control operations
-These instructions are used to change the program execution sequence and
making subroutine calls.
H. Huang Transparency No.1-25
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
opcode
n<7:0> (literal)
07
815
07
815
GOTO label
1111
n<19:8> (literal)
n = 20-bit immediate value
opcode
n<7:0>(literal)
07
815
S
opcode
n<7:0>

(literal)
1111
n<19:8> (literal)
07
815
S = fast bit
S
CALL funct_name
opcode
n<10:0> (literal)
01011
15
07
815
BRA label
Figure 1.12 Control operations (redraw with permission of Microchip)
opcode
n<7:0> (literal)
BC label
H. Huang Transparency No.1-26
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
AccessBank
Access

Bank
-In Figures 1.8 to 1.12, PIC18 uses 8 bits to specify a data register (ffield).
-Eight bits can specify only 256 registers.
-This limitation forces the PIC18 to divide data registers (up to 4096 bytes) into
banks.
-Onl
y
one bank is active at a time.
y
-When operating on a data register in a different bank, bank switching is
needed.
Bankswitchingincursoverheadandmaycauseprogramerrors
-
Bank

switching

incurs

overhead

and

may

cause

program

errors
.
-Access bank is created to minimize the problems of bank switching.
-Access bank consists of the lowest 96 bytes in general-purpose registers and the
highest 160 bytes of special function registers.
-When operands are in the access bank, no bank switching is needed.
H. Huang Transparency No.1-27
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
Examples of the Use of Access Bank
1. addwf0x20,F,A ; add the data register at 0x20 in access bank with WREG
; register and store the sum in 0x20.
2subwf
0x30FBANKED;subtractthevalueofWREGfromthedataregister
2
.
subwf

0x30
,
F
,
BANKED

;

subtract

the

value

of

WREG

from

the

data

register

; 0x30 in the bank specified by the current contents
; of the BSR register. The difference is stored in
; data register 0x30.
3ddf
040WAddhWREGiihdi040i
3
. a
dd
w
f
0
x
40
,
W
,
A
; a
dd
t
h
e
WREG
reg
i
ster w
i
t
h

d
ata reg
i
ster at
0
x
40

i
n
; access bank and leaves the sum in WREG.
H. Huang Transparency No.1-28
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
PIC18 Addressing Modes
-Register direct: Use an 8-bit value to specify a data register.
movwf 0x20,A; the value 0x20 is register direct mode
-
Immediate Mode
: A value in the instruction to be used as an operand
addlw 0x10; add hex value 0x10 to WREG
movlw 0x30; load 0x30 into WREG
-Inherent Mode: an implied operan
d
andlw 0x3C; the operand WREG is implied
daw; the operand WREG is implied
H. Huang Transparency No.1-29
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
-Indirect Mode: A special function register (FSRx) is used as a pointer to
the actual data register.
FormatExample
INDFx
x
=
012
movwf
INDF0
INDFx
x

0
,
1
,
2
movwf
INDF0
POSTINCxmovffPOSTINC0,PRODL
POSTDECxmovfPOSTDEC0,W
PREINCxaddwfPREINC1,F
PLUSWxmovffPLUSW2,PRODL
H. Huang Transparency No.1-30
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
PIC18 Instruction Exam
p
les
p
Data Movement Instruction
lfsr FSR1,0xB00; place the value 0xB00 in FSR1
movf PRODL,W; copy PRODL into WREG
movff0x100,0x300; copy data register 0x100 to data register 0x300
movwfPRODL,A; copy WREG to PRODL
swapfPRODL,F; swap the upper and lower 4 bits of PRODL
movb
3
;load3intoBSR
movb
3
;

load

3

into

BSR
movlw0x10; WREG 0x10
H. Huang Transparency No.1-31
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
AddInstructions
Add

Instructions
addwf0x20,F,A; add data register and WREG and place sum in WREG
ddf
PRODLWA
ddWREGPRODLddl
a
dd
w
f
c
PRODL
,
W
,
A
; a
dd

WREG
,
PRODL
, an
d
carry an
d

l
eave sum
; in WREG
addlw0x5
;
increment WREG b
y
5
;y
Subtract Instructions
subfwb
PRODLF
;PRODL

[WREG]
[PRODL]
borrowflag
subfwb
PRODL
,
F
;

PRODL


字剅䝝

–
子剏䑌[

–
扯牲潷

晬慧
獵扷s剏䑈ⱗ;⁗剅䜠[PRODH] –[WREG]
subwfb0x10,F,A; 0x10

嬰砱そₖ[坒䕇崠W扯牲潷⁦污b
獵扬sへ㄰㬠坒䕇;0x10 –[WREG]
H. Huang Transparency No.1-32
Copyright @ 2005 Thomson Delmar Learning
The PIC18 Microcontroller
RISC
CISC
RISC

Simple instruction set
Rldfidittift
Complex instruction set
Irregularinstructionformat
R
egu
l
ar an
d

fi
xe
d

i
ns
t
ruc
ti
on
f
orma
t
Simple address modes
Irregular

instruction

format
Complex address modes
Pipelined instruction execution
Separated data and program memory
May also pipeline instruction execution
Combined data and program memory
Most operations are register to register
Take shorter time to design and debug
Most operations can be register to memory
Take longer time to design and debug
Provide large number of CPU registers
Provide smaller number of CPU registers
H. Huang Transparency No.1-33
Copyright @ 2005 Thomson Delmar Learning