Chapter 3
-
Webster
Amplifiers and Signal Processing
The three major operations done on biological signals using Op
-
Amp:
1)
Amplifications and Attenuations
2)
DC offsetting: add or subtract a DC
3)
Filtering:
Shape signal’s frequency content
Applications of Operational Amplifier
In Biological Signals and Systems
Ideal Op
-
Amp
Figure 3.1 Op
-
amp equivalent circuit.
The two inputs are
1
and
2
. A differential voltage between them
causes current flow through the differential resistance
R
d
. The
differential voltage is multiplied by A, the gain of the op amp, to
generate the output
-
voltage source. Any current flowing to the output
terminal
v
o
must pass through the output resistance
R
o
.
Most bioelectric signals are small and require amplifications
20 transistors
11 resistors
1 capacitor
Inside the Op
-
Amp (IC
-
chip)
Ideal Characteristics
1
-
A
=
(gain is infinity)
2
-
V
o
= 0, when
v
1
=
v
2
(no offset voltage)
3
-
R
d
=
(input impedance is infinity)
4
-
R
o
= 0 (output impedance is zero)
5
-
Bandwidth =
(no frequency response limitations) and no phase shift
Two Basic Rules
Rule 1
When the op
-
amp output is in its linear range, the two input terminals
are at the same voltage.
Rule 2
No current flows into or out of either input terminal of the op amp.
Inverting Amplifier
Figure 3.3 (a) An inverting amplified. Current flowing through the
input resistor
R
i
also flows through the feedback resistor
R
f
. (b) The
input
-
output plot shows a slope of
-
R
f
/
R
i
in the central portion, but the
output saturates at about
±
13 V.
R
i
i
o
i
R
f
i
+
-
(a)
10 V
10 V
(b)
i
o
Slope =
-
R
f
/
R
i
-
10 V
-
10 V
i
f
i
o
i
i
f
o
R
R
v
v
G
v
R
R
v
-
-
Summing Amplifier
-
2
2
1
1
R
v
R
v
R
v
f
o
1
o
-
+
R
2
R
1
R
f
2
Example 3.1
i
v
b
i
o
o
-
+
+15V
+10
0
Time
i
+
b
/2
-
10
(a)
(b)
5 k
W
-
15 V
R
b
20 k
W
R
i
10 k
W
R
f
100 k
W
Voltage, V
The output of a biopotential preamplifier that measures the electro
-
oculogram is an undesired dc voltage of
±
5 V due to electrode half
-
cell potentials, with a desired signal of
±
1 V
superimposed. Design a
circuit that will balance the dc voltage to zero and provide a gain of
-
10 for the desired signal without saturating the op amp.
Follower ( buffer)
Used as a buffer, to prevent a high source resistance from being
loaded down by a low
-
resistance load. In another word it prevents
drawing current from the source.
o
i
+
-
1
G
v
v
i
o
Noninverting Amplifier
o
10 V
10 V
i
Slope = (
R
f
+
R
i
)/
R
i
-
10 V
-
10 V
R
f
o
i
i
+
-
i
R
i
i
f
i
i
f
i
i
i
f
o
R
R
R
R
R
G
v
R
R
R
v
1
Differential Amplifiers
)
(
3
4
3
4
v
v
R
R
v
o
-
3
4
3
4
R
R
v
v
v
G
o
d
-
R
4
R
4
R
3
R
3
v
3
v
4
v
o
Differential Gain
G
d
Common
-
mode rejection ratio
CMMR
c
d
G
G
CMRR
Common Mode Gain
G
c
For ideal op amp if the inputs are equal then the
output = 0, and the
G
c
=0. No differential
amplifier perfectly rejects the common
-
mode
voltage.
Typical values range from 100 to 10,000
Disadvantage of one
-
op
-
amp differential amplifier is its low input resistance
Instrumentation Amplifiers
Advantages: High input impedance, High CMRR, Variable gain
Differential Mode Gain
1
2
3
4
1
1
2
2
v
v
R
R
R
R
R
v
o
-
1
1
2
2
1
4
3
1
2
1
2
1
2
4
3
2
)
(
R
R
R
v
v
v
v
G
iR
v
v
R
R
R
i
v
v
d
-
-
-
-
Comparator
–
No Hysteresis
o
i
ref
10 V
-
10 V
-
10 V
v
2
+15
-
15
i
o
-
+
R
1
R
1
R
2
ref
If (
v
i
+
v
ref
) > 0 then
v
o
=
-
13 V
else
v
o
= +13 V
R
1
will prevent overdriving the op
-
amp
v
1
>
v
2
,
v
o
=
-
13 V
v
1
<
v
2
,
v
o
= +13 V
Comparator
–
With Hysteresis
i
o
-
+
R
1
R
1
R
2
R
3
ref
o
i
-
ref
10 V
-
10 V
With hysteresis
-
10 V
10 V
Width of the Hysteresis = 4V
R3
Reduces multiple transitions due to mV noise levels by moving the
threshold value after each transition.
Rectifier
10 V
(b)
-
10 V
o
i
-
10 V
10 V
-
+
(a)
D
3
R
R
o
=
i
-
+
D
2
D
1
D
4
xR
(1
-
x
)
R
i
x
Full
-
wave precision rectifier:
a)
For
i
> 0,
D
2
and D
3
conduct, whereas D
1
and D
4
are
reverse
-
biased.
Noninverting amplifier at the top is active
(a)
D
2
v
o
i
-
+
xR
(1
-
x)R
Rectifier
10 V
(b)
-
10 V
o
i
-
10 V
10 V
-
+
(a)
D
3
R
R
o
=
i
-
+
D
2
D
1
D
4
xR
(1
-
x
)
R
i
x
Full
-
wave precision rectifier:
b)
For
i
< 0,
D
1
and D
4
conduct, whereas D
2
and D
3
are reverse
-
biased.
Inverting amplifier at the bottom is active
(b)
D
4
v
o
i
-
+
xR
i
R
One
-
Op
-
Amp Full Wave Rectifier
For
i
< 0, the circuit behaves like the inverting amplifier rectifier with
a gain of +0.5. For
i
> 0, the op amp disconnects and the passive
resistor chain yields a gain of +0.5.
(c)
D
v
o
i
-
+
R
i
= 2 k
W
R
f
= 1 k
W
R
L
= 3 k
W
Figure 3.8
(a) A logarithmic amplifier makes use of the fact that a
transistor's
V
BE
is related to the logarithm of its collector current.
For range of I
c
equal 10
-
7
to 10
-
2
and the range of
v
o
is
-
.36 to
-
0.66 V.
(a)
R
f
I
c
R
f
/9
o
R
i
i
-
+
Logarithmic Amplifiers
-
13
10
log
06
.
0
i
i
o
R
v
v
S
C
BE
I
I
V
log
06
.
0
V
BE
Uses of Log Amplifier
1.
Multiply and divide variables
2.
Raise variable to a power
3.
Compress large dynamic range into small ones
4.
Linearize the output of devices
Figure 3.8
(a) With the switch thrown in the alternate position, the
circuit gain is increased by 10. (b) Input
-
output characteristics show
that the logarithmic relation is obtained for only one polarity;
1 and
10 gains are indicated.
(a)
R
f
I
c
R
f
/9
o
R
i
i
-
+
(b)
10 V
-
10 V
v
o
i
-
10 V
1
10
10 V
Logarithmic Amplifiers
V
BE
V
BE
9V
BE
Integrators
C
R
j
R
R
j
V
j
V
C
R
R
j
R
R
j
V
j
V
i
f
i
i
o
i
f
i
f
i
o
-
-
1
f
f
c
i
f
i
o
C
R
f
R
R
v
v
2
1
-
for
f
<
f
c
i
f
i
o
t
ic
i
f
i
o
Z
Z
j
V
j
V
v
dt
v
C
R
v
-
-
)
(
)
(
1
1
0
A large resistor R
f
is used to prevent saturation
Integrators
Figure 3.9 A three
-
mode integrator
With S
1
open and S
2
closed, the
dc circuit behaves as an inverting amplifier. Thus
o
=
ic
and
o
can
be set to any desired initial conduction. With S
1
closed and S
2
open,
the circuit integrates. With both switches open, the circuit holds
o
constant, making possible a leisurely readout.
R
+
FET
Piezo
-
electric
sensor
-
o
C
i
s
i
s
R
i
s
C
dq
s
/
dt
=
i
s
=
K dx/dt
Long cables may be used without changing sensor sensitivity or time
constant.
Example 3.2
The output of the piezoelectric sensor may be fed directly into the
negative input of the integrator as shown below. Analyze the circuit
of this charge amplifier and discuss its advantages.
i
sC
=
i
sR
= 0
v
o
=
-
v
c
C
Kx
dt
dt
Kdx
C
v
t
o
-
-
1
0
1
Differentiators
Figure 3.11 A differentiator
The dashed lines indicate that a small
capacitor must usually be added across the feedback resistor to
prevent oscillation.
RC
j
Z
Z
j
V
j
V
dt
dv
RC
v
i
f
i
o
i
o
-
-
-
)
(
)
(
Active Filters
-
Low
-
Pass Filter
+
-
R
i
R
f
(a)
C
f
i
o
Active filters
(a) A low
-
pass filter attenuates high frequencies
f
f
i
f
i
o
C
R
j
R
R
j
V
j
V
-
1
1
Gain = G =
|G|
freq
f
c
= 1/2
R
i
C
f
R
f
/R
i
0.707 R
f
/R
i
Active Filters (High
-
Pass Filter)
C
i
+
-
R
i
i
o
(b)
R
f
Active filters
(b) A high
-
pass filter attenuates low frequencies and blocks dc.
i
i
i
i
i
f
i
o
C
R
j
C
R
j
R
R
j
V
j
V
-
1
Gain = G =
|G|
freq
f
c
= 1/2
R
i
C
f
R
f
/R
i
0.707 R
f
/R
i
Active Filters (Band
-
Pass Filter)
+
-
i
o
(c)
R
f
C
i
R
i
Active filters
(c) A bandpass filter attenuates both low and high frequencies.
i
i
f
f
i
f
i
o
C
R
j
C
R
j
C
R
j
j
V
j
V
-
1
1
|G|
freq
f
cL
= 1/2
R
i
C
i
R
f
/R
i
0.707 R
f
/R
i
f
cH
= 1/2
R
f
C
f
C
f
Frequency Response of op
-
amp and Amplifier
Open
-
Loop Gain
Compensation
Closed
-
Loop Gain
Loop Gain
Gain Bandwidth Product
Slew Rate
Offset Voltage and Bias Current
Read section 3.12
Nulling, Drift, Noise
Read section and 3.13
Differential bias current, Drift, Noise
Input and Output Resistance
d
i
i
ai
R
A
i
v
R
)
1
(
+
-
R
d
i
i
R
o
R
L
C
L
i
o
A
d
d
o
i
+
-
1
A
R
i
v
R
o
o
o
ao
Typical value of R
d
= 2 to 20 M
W
Typical value of R
o
= 40
W
Phase Modulator for Linear variable
differential transformer LVDT
+
-
+
-
Phase Modulator for Linear variable
differential transformer LVDT
+
-
+
-
Phase
-
Sensitive Demodulator
Used in many medical
instruments for signal detection,
averaging, and Noise rejection
The Ring Demodulator
v
c
2
v
i
If
v
c
is positive then D
1
and D
2
are forward
-
biased and
v
A
=
v
B
. So
v
o
=
v
DB
If
v
c
is negative then D
3
and D
4
are forward
-
biased and
v
A
=
v
c
. So
v
o
=
v
DC
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