Intel – Prosessorien kehitys historia

parkagendaΗλεκτρονική - Συσκευές

2 Νοε 2013 (πριν από 4 χρόνια και 11 μέρες)

102 εμφανίσεις

Intel



Prosessorien kehitys historia




8085


o

Introduced March
1976


o

Clock speed 5MHz

o

0.37 MIPS

o

Bus Width 8 bits data, 16 b
its address

o

Number of Transisto
rs 6,500 at 3 μm

o

Used in Toledo scale

o

High level of integration, operating for the first time on a single 5 volt power supply, from 12 volts
previously



8086


o

Introduced
June 8
,
1978


o

Clock speeds:



5MHz with 0.33 MIPS



8MHz with 0.66MIPS



10MHz with 0.75 MIPS

o

Bus Width 16 bits data, 20 bits address

o

Number of T
ransistors 29,000 at 3 μm

o

Addressable memory 1 megabyte

o

10X the performance of 8080

o

Used in portable computing

o

Instruction set backwards compatible to 8080

o

Used segment registers to access more than 64K of data at once, bane of programmers' existence
for
years to come



8088


o

Introduced
June 1
,
1979


o

Clock spee
ds:



5MHz with 0.33 MIPS



8MHz with 0.75 MIPS

o

Internal architecture 16 bits

o

External bus Width 8 bits data, 20 bits address

o

Number of Transistors 29,000 at 3 μm

o

Addressable memory 1 megabyte

o

Identical to 8086 except for its 8 bit external bus

o

Used in
IBM PCs

and PC clones



80186


o

Introduced
1982


o

Used mostly in embedded applications
-

controllers, point
-
of
-
sale systems, terminals, and the like

o

Included two timers, a DMA controller
, and an interrupt controller on the chip in addition to the
processor

o

Later renamed the iAPX 186



80188


o

Same as 80186 except with 8 bit external data bus








80286


o

Introduced
February 1
,
1982


o

Clock speeds:



6MHz with 0.9 MIPS




8MHz, 10MHz with 1.5 MIPS



12.5MHz with 2.66 MIPS

o

Bus Width 16 bits

o

Included memory protection hardware to support multitasking operating systems with per
-
process
address space

o

Number of Transistors 134,000 at 1.5 μm

o

Addressable memory 16 megabytes

o

Added protected
-
mode features to 8086 with essentially the same instruction set

o

3
-
6X the performance of the 8086

o

Widely used in PC clones at the time

o

Can scan the
Encyclopædia Britannica

in 45 seconds



80386DX


o

Introduced
October 17
,
1985


o

Clock speeds:



16MHz with 5 to 6 MIPS



2/16/1987 20MHz with 6 to 7 MIPS



4/4/1988 25MHz with 8.5 MIPS



4/10/1989 33MHz with 11.4 MIPS (9.4 SPECin
t92 on Compaq/i 16K L2)

o

Bus Width 32 bits

o

Number of Transistors 275,000 at 1 μm

o

Addressable memory 4 gigabytes

o

Virtual memory 64 terabytes

o

First x86 chip to handle 32
-
bit data sets

o

Reworked and expanded memory protection support including paged virtu
al memory and virtual
-
86
mode, features required by
Windows 95

and
OS/2

Warp

o

Used in Desktop computing

o

Can address enough
memory to manage an eight
-
page history of every person on earth

o

Can scan the Encyclopædia Britannica in 12.5 seconds



80386SX


o

Introduced
June 16
,
1988


o

Clock speeds:



16MHz with 2.5 MIPS



1/25/1989 20MHz with 2.5 MIPS, 25MHz with 2.7 MIPS



10/26/1992 33MHz with 2.9 MIPS

o

Internal

architecture 32 bits

o

External bus width 16 bits

o

Number of Transitors 275,000 at 1 μm

o

Addressable memory 16 megabytes

o

Virtual memory 256 gigabytes

o

16
-
bit address bus enable low cost 32
-
bit processing

o

Built in multitasking

o

Used in entry
-
level desktop and portable computing







80486DX


o

Introduced
April 10
,
1989


o

Clock speeds:



25MHz with 20 MIPS (1
6.8 SPECint92, 7.40 SPECfp92)



5/7/1990 33MHz with 27 MIPS (22.4 SPECint92 on Micronics M4P 128k L2)



6/24/1991 50MHz with 41 MIPS (33.4 SPECint92, 14.5 SPECfp92 on Compaq/50L 256K L2)

o

Bus Width 32 bits

o

Number of Transistors 1.2 million at 1 μm; the 50MHz was at 0.8 μm

o

Addressable memory 4 gigabytes

o

Virtual memory 64 terabytes

o

Level 1 cache on chip

o

50X performance of the 8088

o

Used in Desktop computing and servers



80386SL


o

Introduced
October 15
,
1990


o

Clock speeds:



20M
Hz with 4.21 MIPS



9/30/1991 25MHz with 5.3 MIPS

o

Internal architecture 32 bits

o

External bus width 16 bits

o

Number of Transistors 855,000 at 1 μm

o

Addressable memory 4 gigabytes

o

Virtual memory 64 terabytes

o

First chip specifically made for portable computers because of low power consumption of chip

o

Highly integrated, includes cache, bus, and memory controllers




80486SX


o

Introduced
April 22
,
1991


o

Clock speeds
:



9/16/1991 16MHz with 13 MIPS, 20MHz with 16.5 MIPS



9/16/1991 25MHz with 20 MIPS (12 SPECint92)



9/21/1992 33MHz with 27 MIPS (15.86 SPECint92)

o

Bus Width 32 bits

o

Number of T
ransistors 1.185 million at 1 μm and 900,000 at 0.8 μm

o

Addressable memory 4 gigabytes

o

Virtual memory 64 terabytes

o

Identical in design to 486DX but without math coprocessor

o

Used in low
-
cost entry to 486 CPU desktop computing

o

Upgradable with the Intel O
verDrive processor



80486DX2


o

Introduced
March 3
.
1
992


o

Clock speeds:



50MHz with 41 MIPS (29.9 SPECint92, 14.2 SPECfp92 on Micronics M4P 256K L2)



8/10/1992 66 MHz with 54 MIPS (39.6 SPECint92, 18.8 SPECfp92 on Micronics M4P 256K
L2)

o

Bus Width 32 bits

o

Number of Transistors 1.2 million at 0.8 μm

o

Addressable memory 4 gigabytes

o

Virtual memory 64 terabytes

o

Used in high performance, low cost desktops

o

Uses "speed doubler" technology where the microprocessor core runs at twice the speed of the bus





80486SL


o

Introduced
November 9
,
1992


o

Clock speeds:




20MHz with 15.4MIPS



25MHz with 19 MIPS



33MHz with 25 MIPS

o

Bus Width 32 bits

o

Number of Transistors 1.4 million at 0.8 μm

o

Addressable memory 64 megabytes

o

Virtual memory 64 terabytes

o

Used in notebook PCS



Pentium


o

Introduced
March 22
,
1993


o

Clock speeds:



60MHz with 100 MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256K L2)



66 MHz with 112 MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256K
L2)



75 MHz Introduced
October 10
,
1994




90 MHz Introduced
March 7
,
1994




100 MHz Introduced
March 7
,
1994




120 MHz Introduced
March 27
,
1995




133 MHz Introduced
June
,
1995




150 MHz Introduced
January 4
,
1996




166 MHz Introduced
January 4
,
1996




200 MHz Introduced
June 10
,
1996


o

Bus width 64 bits

o

Address bus 32 bits

o

Number of transistors 3.1 million at 0.8 μm

o

Addressable Memory 4 gigabytes

o

Virtual Memory 64 terabytes

o

Pin count 273 PGA Package

o

Package dimensions 2.16" x 2.16"

o

Superscalar architecture brough
t 5X the performance of the 33MHz 486DX processor

o

Ran on 5volts of power

o

Used in desktops



80486DX4


o

Introduced
March 7
,
1994


o

Clock speeds:



75MHz with 53 MIPS (41.3 SPECint92, 20.1 SPECfp92 on Micronics M4P 256K L2)



100MHz with 70.7 MIPS (54.59 SPECint92, 26.91 SPECfp92 on Micronics M4P 256K L2)

o

Num
ber of Transistors 1.6 million at 0.6 μm

o

Bus width 32 bits

o

Addressable memory 4 gigabytes

o

Virtual memory 64 terabytes

o

Pin count 168 PGA Package, 208 SQFP Package

o

Die size 345 Square mm

o

Used in high performance entry
-
level desktops and value notebooks




Pentium Pro

(200, 180, 166, 150 MHz)

o

Variants



150 MHz Introduced
November 1
,
1995




166 MHz Introduced
November 1
,
1995




180 MHz Introduced
November 1
,
1995




200 MHz Introduced
November 1
,
1995




200 MHz (1MB L2 Cache) Introduced
August 18
,
1997





Pentium MMX


o

Variants



166 MHz Introduced
January 8
,
1997




200 MHz Introduced
January 8
,
1997




233 MHz Introduced
June 2
,
1997




166 MHz (Mobile) Introduced
January 12
,
1998




200 MHz (Mobile) Introduced
September 8
,
1997




233 MHz (Mobile) Introduced
September 8
,
1997




266 MHz (Mobile) Introduced
January 12
,
1998




300 MHz (Mobile) I
ntroduced
January 7
,
1999




Pentium II


o

Variants



233 M
Hz Introduced
May 7
,
1997




266 MHz Introduced
May 7
,
1997




300 MHz Introduced
May 7
,
1997




333 MHz Introduced
January 26
,
1998




350 MHz Introduced
April 15
,
1998




400 MHz Introduced
April 15
,
1998




450 MHz Introduced
August 24
,
1998




233 MHz (Mobile) Introduced
April 2
,
1998




266 MHz (Mobile) Introduced
April 2
,
1998




300 MHz (Mobile) Introduced
September 9
,
1998




333 MHz (Mobile)



366 MHz (Mobile)



Celeron


o

Variants



266 MHz Introduced
April 15
,
1998




300 MHz Introduced
June 9
,
1998




300A MHz Introduced
August 24
,
1998




333 MHz Introduced
August 24
,
1998




366 MHz Introduced
January 4
,
1999




400 MHz Introduced
January 4
,
1999




433 MHz Introduced
March 22
,
1999




466 MHz



500 MHz Introduced
August 2
,
1
999




533 MHz Introduced
January 4
,
2000




566 MHz



633 MHz Introduced
June 26
,
2000




667 MHz Introduced
June 26
,
2000




700 MHz Int
roduced
June 26
,
2000




733 MHz Introduced
November 13
,
2000




766 MHz Introduced
November 13
,
2000




800 MHz



850 MHz In
troducted
April 9
,
2001




900 MHz Introducted
July 2
,
2001




950 MHz Introduced
August 31
,
2001




1000 MHz Introduced
August 31
,
2001




1100 MHz Introduced
August 31
,
2001




1200 MHz Introduced
October 2
,
2001




1300 MHz Introduced
January 3
,
2002




266 MHz (Mobile)



300 MHz (Mobile)



333 MHz (Mobile) Introduced
April 5
,
1999




366 MHz (Mobile)



400 MHz (Mobile)



433 MHz (Mobile)



450 MHz (Mobile) Introduced
February 14
,
2000




466 MHz (Mobile)



500 MHz (Mobile) Introduced
February 14
,
2000




550 MHz (M
obile)



600 MHz (Mobile) Introduced
June 19
,
2000




650 MHz (Mobile) Introduced
June 19
,
2000




700 MHz (Mobile) Introduced
September 25
,
2000




750 MHz (Mobile) Introducted
March 19
,
2001




800 MHz (Mobile)



850 MHz (Mobile) Introduced
July 2
,
2001




600 MHz (LV Mobile)



500 MHz (ULV Mobile) Introducted
January 30
,

2001




600 MHz (ULV Mobile)



Later Celerons are based on the Pentium 4's NetBurst microarchitecture.



Pentium II
Xeon

(400 MHz)

o

Variant
s



400 MHz Introduced
June 29
,
1998




450 MHz (512 KB L2 Cache) Introduced
October 6
,
1998




450 MHz (1 MB and 2 MB L2 Cache) Introduced
January 5
,
1999




Pentium III


o

Introduced
February 26
,
1999


o

Streaming
SIMD

Extensions

o

All Mobile Pentium III processors introduced in 2000 and later include SpeedStep Technology, allowing
them to reduce processor speed to increase bat
tery life.

o

Variants



450 MHz Introduced
February 26
,
1999




500 MHz Introduced
February 26
,
1999




533 MHz Introduced
September 27
,
1999




550 MHz Introduced
May 17
,
1999




600 MHz Introduced
August 2
,
1999




650 MHz Introduced
October 25
,
1
999




667 MHz Introduced
October 25
,
1999




700 MHz Introduced
October 25
,
1999




733 MHz Introduced
October 25
,
1999




750 MHz Introduced
December 20
,
1999




800 MHz Introduced
December 20
,
1999




850 MHz Introduced
March 20
,
2000




866
MHz Introduced
March 20
,
2000




933 MHz Introduced
May 24
,
2000




1000 MHz Introduced
March 8
,
2000

(Not widely available at time of rel
ease)



1133 MHz (Tualatin: 512k cache, 0.13 μm process)



1333 MHz (Tualatin: 512k cache, 0.13 μm process)



1400 MHz (Tualatin: 512k cache, 0.13 μm process)



400 MHz (Mobile) Introduced
October 25
,
1999




450 MHz (Mobile) Introduced
October 25
,
1999




500 MHz (Mobile) Introduced
October 25
,
1999




600 MHz (Mobile) Introduced
January 18
,
2000




650 MHz (Mobile) Introduced
January 18
,
2000




700 MHz (Mobile) Introduced
April 24
,
2000




750 MHz (Mobile) Introduced
June 19
,
2000




800 MHz (Mobile) Introduced
September 25
,
2000




850 MHz (Mobile) Introduced
September 25
,
2000




900 MHz (Mobile) Introducted
March 19
,
2001




1000 MHz (Mobile) Introducted
March 19
,
2001




866 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced
July 30
,
2001




933 MHz (Mobile Tualatin: 512k cache, 0.13 μm pro
cess) Introduced
July 30
,
2001




1000 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced
July 30
,
2001




1200 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced
October 1
,
2001




600 MHz (LV Mobile) Introduced
June 19
,
2000




700 MHz (LV Mobi
le) Introduced
February 27
,
2001




750 MHz (LV Mobile) Introduced
May 21
,
2001




500 MHz (ULV Mobile) Introducted
January 30
,
2001




600 MHz (ULV Mobile) Introduced
May 21
,
2001




700 MHz (ULV Mobile)



Pentium(r) III
Xeon
(tm) Processor

o

Introduced
October 25
,
1999


o

Number of transistors: 9.5 million at 0.25 μm or 28 mill
ion at 0.18 μm)

o

L2 cache is 256KB, 1MB, or 2MB Advanced Transfer Cache (Integrated)

o

Processor Package Sytle is Single Edge Contact Cartridge (S.E.C.C.2) or SC330

o

System Bus Speed 133 MHz (256KB L2 cache) or 100 MHz (1
-
2MB L2 cache)

o

System Bus Width 64
bit

o

Addressable memory 64 gigabytes

o

Used in two
-
way servers and workstations (256KB L2) or 4
-

and 8
-
way servers (1
-
2MB L2)

o

Variants



500 MHz (0.25 μm process) Introduced
March 17
,
1999




550 MHz (0.25 μm process) Introduced
August 23
,
1999




600 MHz (0.
18 μm process, 256KB L2 cache) Introduced
October 25
,
1999




667 MHz (0.18 μm process, 256KB L2 cache) Introduced
October 25
,
1999




733 MHz (0.18 μm process, 256KB L2 cache) Introduced
October 25
,
1999




800 MHz (0.18 μm process, 256KB L2 cache) Introduced
January 12
,
2000




866 MHz (0.18 μm process, 256KB L2 cache) Introduced
April 10
,
2000




933 MHz (0.18 μm process,
256KB L2 cache)



1000 MHz (0.18 μm process, 256KB L2 cache) Introduced
August 22
,
2000




700 MHz (0.18 μm process, 1
-
2MB L2 cac
he) Introduced
May 22
,
2000




900 MHz (0.18 μm process, 2MB L2 cache) Introduced
March 21
,
2001




Pentium(r) 4 Processor built on 0.18 μm process technology (1.40 and 1.50 GHz)

o

Introduced
November 20
,
2000


o

L2 cache was 256KB Advanced Tansfer Cache (Integrated)

o

Processor Package Style was PGA423, PGA478

o

System Bus Speed 400 MHz

o

SSE2 SIMD Extensions

o

Number of Transistors 42 mil
lion

o

Used in desktops and entry
-
level workstations



Pentium(r) 4 Processor built on 0.18 μm process technology (1.7 GHz)

o

Introduced
April 23
,
2001


o

See the 1.4 and 1.5 chips for d
etails



Intel(r) Xeon(tm) Processor (1.4, 1.5, 1.7 GHz)

o

Introduced
May 21
,
2001


o

L2 cache was 256KB Advanced Transfer Chache (Integ
rated)

o

Processor Package Style was Organic Lan Grid Array 603 (OLGA 603)

o

System Bus Speed 400MHz

o

SSE2 SIMD Extensions

o

Used in high
-
performance and mid
-
range dual processor enabled workstations





Pentium(r) 4 Processor built on 0.18 μm process technology (1.6 and 1.8 GHz)

o

Introduced
July 2
,
2001


o

See 1.4 and 1.5 chips for det
ails

o

Core Voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in Battery Optimized Mode

o

Power <1 watt in Battery Optimized Mode

o

Used in full
-
size and then light mobile PCs



P
entium(r) 4

Processor built on 0.18 μm process technology "Willamette" (1.9 and 2.0 GHz)

o

Introduced
August 27
,
2001


o

See 1.4

and 1.5 chips for details



Xeon (2.0 GHz)

o

Introduced
September 25
,
2001




Pentium® 4 (2 GHz, 2.20 GHz)

o

Introduced
January 7
,
2002




Pentium® 4 (2.4 GHz)

o

Introduced
April 2
, 2002



Itanium

(733 MHz and 800 MHz)



Itanium 2 (900 MHz and 1 GHz)



Pentium 4 Processor built on 0.13 μm process technology "Northwood A"(1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6
GHz)

o

400 MHz system

bus.



Pentium 4 Processor built on 0.13 μm process technology "Northwood B" (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)

o

533 MHz system bus. (3.06 includes Intel's
hyper threading

technology).



Mobile Intel Pentium 4
-

M Processor build on 0.13 μm process technology; Heart of the Intel mobile
"Centrino" system; "Banias" (1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.2 GHz)

o

400 MHz system bus.



Pentium 4 Processor built on 0.13 μm process te
chnology "Northwood C" (2.4, 2.6, 2.8, 3.0, 3.2 GHz)

o

800MHz system bus (all versions include Hyper Threading)

o

6500 to 10000 MIPS



Pentium 4E Processor built on 0.09 μm process technology "Prescott" (2.8, 3.0, 3.2, 3.4) 1MB L2 cache

o

533/800MHz system bus

(all versions include Hyper Threading except 2.8 (533))

o

Designed specifically for advanced gaming

o

7500 to 11000 MIPS



Intel Pentium 4 Extreme Edition (EE)

o

same as Pentium 4 Processor

o

2MB L3 Cache

AMD kehityshistoria


http://en.wikipedia.org/wiki/List_of_AMD_microprocessors