# EE 320L Electronics I Laboratory

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2 Νοε 2013 (πριν από 4 χρόνια και 8 μήνες)

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EE 320L Electronics I
Laboratory

Laboratory Exercise #
7

BJT Amplifier DC Biasing

Departme
n
t of Electrical and Computer Engineering

University of Nevada, at Las Vegas

Objec
t
iv
e
:

BJT transi
st
ors are the most widely

used form

of transistor used in general applications.
The
m
ajor applic
a
tion of

BJT includ
e
s
the
a
m
pli
f
ier circuit. In building an

a
m
pli
f
ier
ci
r
cuit, the transist
o
r
m
ust be biased which t
his lab
w
ill i
n
tro
d
uce you to
,

the bias
ing

of
an a
m
pli
f
ier.

Equipment Usage

For

this lab, the
f
ollowing

equip
m
ent will be u
s
ed:

Power supply

Multi
-
m
eter

Oscillo
s
co
p
e

(2N3904 and 2N3906)

Background:

A BJT is a current a
m
plification device, but current and voltage are directly related.
K
eep
this in
m
i
nd during
c
uit.
The b
i
asing circuit sets the base voltage,
which in t
ur
n deter
m
ines
the transistors operating
I
-
V curve. Figure 6
-
1 illu
s
t
r
ates a
common emit
t
er biasing circ
u
it.

Figure 6
-
1

Resistors
R
1

and R
2

sets the
base v
o
ltage req
u
ired

to s
e
t the b
a
se cur
r
ent. A s
m
all sig
n
al input
is provided by Vs. The AC voltage
f
ound at the base, however,
m
ay not be at the sa
m
e value
as Vs. In fact, the voltage at the base can be calculated considering the reactance of

Cc
1
,

and
R
1

and R
2
.

In effect, the biasing circu
i
t acts as a fil
t
er circuit.

BJT Biasing Lab Procedure

for
NPN

Given
V
CC

= 10V,
R
c

=

1

kΩ, R
E

= 100 Ω, find
R
1

and R
2

to set V
CEQ

= 5 V for the CE
a
m
pli
f
ier.

with VCC
s
et at 10V and Vbb set at 0V:

Figure 6
-
2
(b
)

bb

until you
m
easure the volt
a
ge at V
ceq

is 5V. As an example, V
bb

is measured
to be

1.188V and I
b

is 47.25 µA (calculated from

the voltage drop across R
b
). Now, we c
a
n set
up the biasing net
w
ork, which consists of parallel combination of R
1

and R
2

as shown on the
ci
r
cuit
be
low. Let
the
cu
r
rent thru R
1

be

ten ti
m
es the
current
I
b

i.e.
472.5

µA in our exa
m
ple.

Figure 6
-
3
(a)

Note: You may have to
a
djust resi
s
t
o
r values

s
li
g
htly in the l
a
b to bias co
r
rectly.

BJT Biasing Lab Procedure for
PNP

Given
V
CC

=
-
10V,
R
c

=

1

kΩ, R
E

= 100 Ω, find
R
1

and R
2

to set V
CEQ

=
-
5 V for the CE
a
m
pli
f
ier.

with V
CC

s
et at
-
10V and Vbb
1

set at 0V:

Figure 6
-
2
(b
)

bb
1

until you
m
easure the volt
a
ge at V
ceq

is
-
5V. As an example, V
bb
1

is
measured to be

-
1.247V

and I
b

is
-
25.29

µA (calculated from

the voltage drop across R
b
1
).
Now, we c
a
n set up the biasing net
w
ork, which consists of parallel combination of R
7

and R
8

as shown on the ci
r
cuit
be
low. Let
the
cu
r
rent thru R
7

be

ten ti
m
es the
current
I
b

i.e.
252.9

µA
in our exa
m
ple.

Figure 6
-
3
(b)

Note: You may have to
a
djust resi
s
t
o
r values

s
li
g
htly in the l
a
b to bias co
r
rectly.

Prelab:

Analysis 1
:

Given

V
CC

= 10V,
R
c

=

1

kΩ,
R
e
=100

,
β = 100, find
R
1

and R
2

to set
V
CEQ

=

5

for NPN and
V
CEQ

=

-
5
V
for PNP
f
or the CE
biasing

circuit shown i
n Figure 6
-
3(a,b)
. Si
m
ulate quiescent
, (V
CEQ
),

p
o
int
changes when
Beta (
β
)

assu
m
es
the value of 50, 100, and 150

for both NPN and PNP transistor circuits
.

What happens to the voltage
V
CEQ

as Beta changes?

Analysis 2:

Given

V
CC

= 10V,
R
E

=

1250 Ω,
R
c

=

1

kΩ, β = 100, find
R
1

and R
2

to s
e
t V
CEQ

= 5 V
for
NPN and
V
CEQ

=

-
5
V
for PNP
f
or the
CC
biasing

cir
c
uit

shown in Figure 6
-
4(a,b)
. Si
m
ulate quiesce
n
t
,
(V
CEQ
),

point changes when
Beta (
β
)

assu
m
es the value of 50, 100, and 150

for both NPN and PNP
transistor circuits
.

What happens to the voltage
V
CEQ

as Beta changes?

Figure 6
-
4
(a)

Figure 6
-
4(b)

Analysis 3:

Given

V
CC

= 10V, R
E

= 100 Ω,
R
c

=

1

kΩ, β = 100 find
R
1

and R
2

to set V
CEQ

= 5 V
for NPN
and
V
CEQ

=

-
5
V
for PNP
f
or the CB a
m
plifier
c
i
rc
u
it

shown in Figure 6
-
5(a,b)
. Si
m
ulate quiesce
n
t
, (V
CEQ
),

p
o
int chan
g
es when β assu
m
es
the value of 50, 100, and 150

for both NPN and PNP transistor circuits
.

What happens to the voltage
V
CEQ

as Beta changes?

Figure 6
-
5
(a)

Figure 6
-
5(b)

Note: To simulate different β values you will need to modify the Bf setting of the transistor. To do this in
Pspice you need to right
-
click on the transistor and select edit Pspice model. On the bottom of the page,
you will find the model parameters of the

transistor. To check if your β is correct, measure Ic/Ib and after
you change the parameter. Bf is usually higher than the desired β value.

Pre
-
Lab Deliverables:

1)

Sub
m
m
pleted analysis, s
c
he
m
atics, and si
m
ulation results.

Lab Experiments:

Ex
peri
m
ent 1:

Given Vcc = 12
V, constru
c
t common e
m
itter (CE) NPN and PNP biasing circ
u
it (similar
to Fig. 6
-
3) to set
V
CEQ

at the
m
iddle of the power rail

(V
cc
) which

is V
CC
/2
.
M
easure
D
C

operating
voltage at each of the circuit nodes and show that
transistor is operating in forward active

m
ode.

Experi
m
ent 2:

Given Vcc = 12
V, construct common collector (CC) NPN and PNP biasing circ
u
it
(similar to Fig. 6
-
4(a,b)
) to
s
et
V
CEQ

at the
m
iddle of the power rail

(V
cc
) which

is V
CC
/2
. Measure DC
operating
voltage at each of t
h
e circuit no
d
es and show that tran
s
i
stor is operating in forward acti
v
e
m
o
de.

Experi
m
ent 3:

Given Vcc = 12
V, construct common base (CB) NPN and PNP biasing circ
u
it (similar to
Fig. 6
-
5(a,b)
)
remember

to set
V
CEQ

at the
m
iddle of the
power rail

(V
cc
) which is V
CC
/2
.

Measure DC
operating voltage at each of the circ
u
it nodes and show that transistor is operating in forward active
m
ode.

Post
-
Lab D
e
liv
e
rabl
e
s:

1)

Sub
m