Bharath Ambale Venkatesh 10/24/2007

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E6200, Fall 07, Oct 24

Ambale: CMP

1

Bharath Ambale Venkatesh

10/24/2007

E6200, Fall 07, Oct 24

Ambale: CMP

2

Trends


Increasing processor size/speed leads to increase in power
required


Increasing heat generated leads to need of cooling
components


Increase in network speeds is much slower than increase in
processor speeds


Future applications are becoming more and more parallel


multimedia, face recognition, voice recognition, etc…


Future applications also becoming data intensive

E6200, Fall 07, Oct 24

Ambale: CMP

3

Instruction
-
level parallelism (ILP)


Re
-
ordering of
instructions so that they
can be executed in
parallel


Pipelining


Superscalars


Maximum of 6
-
10
instructions per cycle for
real applications


Bottlenecks: Branch
prediction

E6200, Fall 07, Oct 24

Ambale: CMP

4

Thread
-
level parallelism (TLP)


Multiple threads
spawned from same
process (SMT)


Loop
-
level parallelism


Threads interact with
each other


Pentium 4 uses hyper
-
threading


Bottleneck: Memory
cache

E6200, Fall 07, Oct 24

Ambale: CMP

5

Process
-
level Parallelism (PLP)


Run multiple
independent processes
controlled by the OS


Symmetric
Multiprocessors (SMP) :
multiple independent
processors connected by
a network (cluster)


Bottleneck: network

E6200, Fall 07, Oct 24

Ambale: CMP

6

Memory Access


Cache miss: when data has to fetched from main memory


Cache miss in superscalars leads to significant delay


SMT leads to multiple processes accessing a shared cache


a cache is pushed to have more ports


Memory bandwidth is a problem

E6200, Fall 07, Oct 24

Ambale: CMP

7

CMP


Introduce multiple
supersacalar processors
each capable of running
multiple threads


Each processor has
individual cache and also
has a shared cache


Processors need not be
homogenous

E6200, Fall 07, Oct 24

Ambale: CMP

8

CMP


Advantages


Multi
-
tasking


Shorter signal path


Less
-
power consumed


Memory bandwidth is not the limiting problem


Disadvantages


Specialized software to utilize multithreading


Thermal management is more difficult


Commercial CMP’s


Intel and AMD’s dual
-
core, quad
-
core,..

E6200, Fall 07, Oct 24

Ambale: CMP

9

Cell Processor

E6200, Fall 07, Oct 24

Ambale: CMP

10

References


"A D&T Roundtable: Are Single
-
Chip Multiprocessors in Reach?," IEEE
Design and Test of Computers ,vol. 18, no. 1, pp. 82
-
89,
January/February, 2001.


Wenbin Yao, Dongsheng Wang, Weimin Zheng, Songliu Guo. “Current
Trends in High Performance Computing and Its Applications.”
Architecture Design of a Single
-
chip Multiprocessor , pp. 165
-
174, 2005.


L. Hammond, B. Nayfeh, and K. Olukotun. "A single
-
chip
multiprocessor." IEEE Computer, vol. 30, no. 9, pp. 79
--
85, September
1997.