CMOS VLSI Design - UTPA Faculty Web

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Introduction to VLSI

CMPE/ELEE 4375






Introduction

CMOS VLSI Design

Outline

0: Introduction

2


Syllabus


Logistics
(time, place, instructor, website, textbook)


Grading


Topics


Outcomes



Introduction to VLSI


A brief history


MOS transistors


CMOS logic gates

CMOS VLSI Design

Course Information (1)

0: Introduction

3

Time and Place



Class: 8:45 am
-

9:35 am


MWF Engineering Building 1.262


Instructor


Hasina Huq


hhuq@utpa.edu



ENGR 3.278
,
665
-
5017


Office hours: MTW 1.00 pm
-
3.00 pm or walk in or by
appointment



CMOS VLSI Design

Course Information (2)

0: Introduction

4

Prerequisites


D
igital logic (
ELEE 2330
)

and Electronic 1(ELEE 3301)
, or
equivalent


I assume you know the following topics


Boolean algebra, logic gates, etc.


MOSFET characteristics


Undergraduate physics: Ohm’s law, resistors, capacitors, etc.


Undergraduate math: calculus

CMOS VLSI Design

Course Information (3)


Text

Ken Martin, Digital

Integrated
Circuits design
, Oxford,


Reference


Class handouts


Cadence manual set


H.Craig Casey, Jr.,
Devices for Integrated Circuits
,
John
-
Wiley,


Baker, Li, & Boyce,
CMOS Circuit Design, Layout,
and

Simulation
, IEEE Press, 1998.


Account UNIX (lab access)

0: Introduction

5

CMOS VLSI Design

Course Information (4)

0: Introduction

6


Grading


6
0% project


5
%
homework


15%
mid
-
term exam


20% final exam


Laboratory Based Projects (3) 60% (10%, 20%, 30%)


Final project include design, report and presentation


Total 100%

CMOS VLSI Design

Course Information (5)

0: Introduction

7


Topics


NMOS,PMOS CMOS


logic gate


fabrication and layout


MOS transistor characteristics


Performance analysis for VLSI circuits


digital circuits design


Integrated Circuit (IC) design


Compact & cost effective design


System on chip


CMOS VLSI Design

Course Information (
6
)

0: Introduction

8


Use the Electric CAD tool to design a chip including (depending on
tool availability)


Schematic entry


Layout


Transistor
-
level cell design


Gate
-
level logic design


Hierarchical design


Switch
-
level simulation (IRSIM)


Design rule checking (DRC)


Electrical rule checking (ERC)


Network consistency checking (NCC)


HDL design (Verilog)


Place and route


Pad frame generation and routing


Pretapeout verification


CMOS VLSI Design

Course Information (
7
)

0: Introduction

9


Outcomes


Estimate and optimize combinational circuit delay using
RC delay models and logical effort


Design high speed and low power logic circuits


Understand interconnect and reliability issues


Design functional units including adders, multipliers, DFF,
ROMs, SRAMs, and PLAs


Beware of the VLSI trends and challenges

CMOS VLSI Design

Introduction

0: Introduction

10


Integrated circuits: many transistors on one chip.


Very Large Scale Integration

(VLSI): very many


Complementary Metal Oxide Semiconductor



Fast, cheap, low power transistors


Today: How to build your own simple CMOS chip


CMOS transistors


Building logic gates from transistors


Transistor layout and fabrication


Rest of the course: How to build a good CMOS chip


CMOS VLSI Design

A Brief History

0: Introduction

11


1958: First integrated circuit


Flip
-
flop using two transistors


Built by Jack Kilby at Texas Instruments


2003


Intel Pentium 4
m
processor (55 million transistors)


512 Mbit DRAM (> 0.5 billion transistors)


53% compound annual growth rate over 45 years


No other technology has grown so fast so long


Driven by miniaturization of transistors


Smaller is cheaper, faster, lower in power!


Revolutionary effects on society

CMOS VLSI Design

0: Introduction

12

The impact of ICs on modern society has been pervasive.


Without them current computer, electronics systems and

information
-
technology revolution would not exist.

Immense amount of signal and computer processing is realized in a single IC.




Most of the students of Computer/ Electrical Engineering are exposed to
Integrated Circuits (IC's) at a very basic level, involving circuits like
multiplexers, Flip flop, encoders etc.

But there is a lot bigger world out there involving miniaturization, that a
micrometer and a microsecond are literally considered huge! This is the
world of VLSI
-

Very Large Scale Integration.

CMOS VLSI Design

The course will help you to understand why you need to learn the
Chip / Integrated Circuit (IC) Design technologies.


This involves packing more and more logic devices into smaller areas
and smaller areas.


This has opened up a big opportunity to do things that were not
possible before. VLSI circuits are everywhere ... your computer, your
car, your brand new state
-
of
-
the
-
art digital camera, the cell
-
phones,
and what have you.



All this involves a lot of expertise on many fronts within the same
field, which we will look at in the course.


At UTPA we use Cadence simulation tool which is an industry
standard simulator


0: Introduction

13

CMOS VLSI Design

0: Introduction

14

Modern ICs are enormously complicated. A large chip may have more
transistors than there are people on Earth i.e. may contain millions of
transistors. The rules for what can and cannot be manufactured are also
extremely complex. An IC process may well have more than 600 rules.

CAREER:


Design Engineer: Takes specifications, defines architecture, does circuit
design, runs simulations, supervises layout, tapes out the chip to the foundry,
evaluates the prototype once the chip comes back from the fab.

TYPICAL COMPANIES AND JOBS?


Intel, IBM, Texas Instruments, Motorola, National Semiconductor,

Maxim, Linear Technology, Siemens, Qualcomm


CMOS VLSI Design

0: Introduction

15

University:

Most of the universities in USA are offering VLSI course at
undergraduate level because of reality, demand. Dept: Electrical and
Computer Engineering: University of Texas at Austin,
Rice

University,
Department

of Electrical and Computer Engineering at Texas A&M
University, Dept. of Electr. Eng. & Comput. Sci., Univ of Michigan. Ann Arbor,
MI, Department of Electrical and Computer Engineering
UC Berkeley


CMOS VLSI Design

0: Introduction

16

CMOS VLSI Design

0: Introduction

17

CMOS VLSI Design

0: Introduction

18

CMOS VLSI Design

0: Introduction

19

CMOS VLSI Design

Invention of the Transistor

0: Introduction

20


Vacuum tubes ruled in first half of 20
th

century Large,
expensive, power
-
hungry, unreliable


1947: first point contact transistor

at Bell Labs


John Bardeen and Walter Brattain at Bell Labs


Read
Crystal Fire


by Riordan, Hoddeson

CMOS VLSI Design

Transistor Types

0: Introduction

21


Bipolar transistors


npn or pnp silicon structure


Small current into very thin base layer controls large currents
between emitter and collector


Base currents limit integration density


Metal Oxide Semiconductor Field Effect Transistors


nMOS and pMOS MOSFETS


Voltage applied to insulated gate controls current between
source and drain


Low power allows very high integration


Simpler fabrication process

CMOS VLSI Design

MOS Integrated Circuits

0: Introduction

22


1970’s processes usually had only nMOS transistors


Inexpensive, but consume power while idle









1980s
-
present: CMOS processes for low idle power

Intel 1101 256
-
bit SRAM

Intel 4004 4
-
bit
m
Proc

CMOS VLSI Design

Moore’s Law

0: Introduction

23


1965: Gordon Moore plotted
the number of
transistor
s

on each chip


Fit straight line on semilog scale


Transistor counts have doubled every 26 months

Year
Transistors
4004
8008
8080
8086
80286
Intel386
Intel486
Pentium
Pentium Pro
Pentium II
Pentium III
Pentium 4
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000
1,000,000,000
1970
1975
1980
1985
1990
1995
2000
Integration Levels

SSI
:

10 gates

MSI
:

1000 gates

LSI
:

10,000 gates

VLSI
:

> 10k gates

CMOS VLSI Design

Corollaries

0: Introduction

24


Many other factors grow exponentially


Ex: clock frequency, processor performance

Year
1
10
100
1,000
10,000
1970
1975
1980
1985
1990
1995
2000
2005
4004
8008
8080
8086
80286
Intel386
Intel486
Pentium
Pentium Pro/II/III
Pentium 4
Clock Speed (MHz)
CMOS VLSI Design

Scaling Down: a Mystery

0: Introduction

25


In 1971, minimum dimensions of 10 um in 4004.


In 2003, minimum dimensions of 130 ns in Pentium4.


Scaling down forever ? (No, transistors cannot be
less than atoms)


Many predictions of fundamental limits to scaling
have already proven wrong


We believe that scaling will continue for at least
another decade.


What is the future?

CMOS VLSI Design

Periodic Table

0: Introduction

26

CMOS VLSI Design

Dopants

0: Introduction

27


Silicon is a semiconductor


Pure silicon has no free carriers and conducts poorly


Adding dopants increases the conductivity


Group V

(Arsenic)
: extra electron (n
-
type)


Group III

(Boron)
: missing electron, called hole (p
-
type)

As
Si
Si
Si
Si
Si
Si
Si
Si
B
Si
Si
Si
Si
Si
Si
Si
Si
-
+
+
-