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14 Δεκ 2013 (πριν από 3 χρόνια και 3 μήνες)

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TLM Convenience Socket


Parvinder

Pal Singh


Girish

Verma



Brief note on OSCI TLM2.0


Challenges in TLM2.0


Features provided by Convenience Layer


Convenience Socket Modeling


Presentation Topics




Target

Initiator

1. Core
Interfaces
and

TLM2 Sockets

2. Generic payload

Command

Address

Data

Byte enables

Response status

Extensions

nb_transport_fw

(TRANS, phase, time)

b_transport

(TRANS, time)

nb_transport_bw

(TRANS, phase, time)

Brief ON OSCI TLM2.0

Brief ON OSCI TLM2.0

BEGIN_REQ

END_REQ

BEGIN_RESP

END_RESP

Approximately
-
Timed
Modeling

Loosely


Timed Modeling

MASTER

SLAVE

Call

Return

b_transport
ns
)

MASTER

SLAVE


To get more timing information










To Extend Generic structure to
protocol specific

Extending Base TLM2.0

END_REQ

BEGIN_REQ

END_DATA

BEGIN_DATA

BEGIN_RESP

END_RESP

GENERIC
PAYLOAD

Protocol

Specific

Extensions

Payload
With
Extensions

Challenges in TLM2.0


Implementing State Machine


Writing FSM for every IP makes it
difficult for IP developer


Managing
TRANS

becomes complex


Managing
TRANS

field settings gets
tough


Compile time Fixing of BUSWIDTH


Addition and Deletion of Protocol
Specific Extensions to GP


Managing the extensions that already
have been added to GP


Features of
Conv
’ Layer


various abstraction levels supported


Memory management for
TRANS

and its
extensions


Support to
VCD TRACE

for trans and its
extensions


Support to
Statistics Collection


Bus
protocol independent

APIs and
callbacks


One time information for GP extension
Phase


Bus
-
Width
Configuration


Support various Abstraction Level


For e.g. OCP
-
IP define 4 level


TL4, TL3, TL2, TL1


Run
-
time configuration of abstraction
level of a transaction


Abstraction Levels

b_transport

Abstraction
Level

Change
request

Simulation in progress

Slave also
configures
itself for
abstraction
level
communicated
through

master


No

NEED

for

managing

TRANS

and

its

extensions


Configures

memory

manager

to

provide

data

and

byte

enable

pointers


Configures

the

number

of

transactions

that

are

outstanding

at

any

given

time

by

restricting

TRANS

Memory Management

Memory

Manager

Master

Process
Transaction

Pool For TRANS

Pool For Data array

Pool For be array

Pool For Extension


Tracing

at

all

abstraction

levels


Tracing

of

GP

fields,

extensions

and

phases


Contains

information

like



Number

of

phases

sent


Number

of

transaction

types

sent


Number

of

bytes

sent,

etc
.



Provides

statistics

for

a

SOCKET

VCD Trace and Statistics











Protocol Independent APIs

Register API for Invalidating
DMI

API to set trace file

Reset

Debug

Dmi

Read write blocking

Read write Non blocking

get trans b/
nb

MASTER

Register to get write handler

Register to get read handler

Register debug

Register DMI

Register Reset

Invalidate DMI


SLAVE


Provides

the

option

whether

or

not

to

have

callbacks


Provides

the

timing

information

Callbacks

Status
read_data
(
fn_ptr

resume_txn
, trans, offset, size,
request_level
)

Status
write_data
(
fn_ptr

resume_txn
, trans, offset, size,
request_level
)

Status
write_status
(
fn_ptr

resume_txn
, trans)

Status
accept_command
(
fn_ptr

accepted, trans)

Status
read_data
(
fn_ptr

resume_txn
, trans, offset, size,
request_level
)

Status
write_data
(
fn_ptr

resume_txn
, trans, offset, size,
request_level
)

Status
write_status
(
fn_ptr

resume_txn
, trans)

MASTER

SLAVE

read_nb
()

write_nb
()

read_nb
()

b_transport
()

Transaction
Queue

b_transport

MASTER

Master
Convenience

Slave
Convenience

read_data
()

read_data
()

get_read_handler
()

accept_command
()

read_data
()

SLAVE

TL4

Abstraction

Level

TL1 Abstraction Level

write_b
()

BEGIN_REQ

M
Conven
.



S
Conven

get_write_handler
()

accept_command
()

SLAVE

END_REQ

phase1

phase2

Write_data

Write_data

Write_Resp

BEGIN_RESP

END_RESP

MASTER




TLM2 checks
bus
-
width

at compile time


Convenience layer allows the bus
-
width
configuration until BEOE phase


Configure a new Bus
-
width pair without any
re
-
compilation of the application


Bus
-
Width

Configuration

convenience_initiator_socket
<0>
m_socket
;

convenience_target_socket
<0>
s_socket

EOE

phase

b_transport

Mismatch

Stop
Simulation



Return if BW matches

Buswidth

Configuration

Elaboration and
beoe

phase

TLM 2.0 Core Interfaces
and Generic Payload

Memory
Manager

Configurable
Param

Abstract API
for FSM
IMPLEMENTATION

Protocol
Specific
Implementation

API to Add
Phases And
Extension

Convenience Layer Generic API and



Callbacks


USER IP MODEL

TLM2.0 Structure

struct

bus_protocol_type

{


typedef

memory_manager

mm;


typedef

fsm_factory

factory_class
;


typedef

extension
extension_class
;


typedef

convenience_config_param

config_param
;

};


template

<uint32_t BUSWIDTH = 0,


typename

TYPES =
bus_protocol_type
>

class

convenience_initiator_socket

:

public

transport_initiator_socket

<BUSWIDTH,



typename

TYPES::mm,


typename

TYPES::
extension_class
>,


public

TYPES::
config_param

Pseudo
-
Code

Thank You!!