Lecture Notes #11

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14 Δεκ 2013 (πριν από 3 χρόνια και 6 μήνες)

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1EEL 602
Memory Management
Reading:
Silberschatz
chapter 9
Reading:
Stallings
chapter 7
2EEL 602
Outline
Background
Issues in Memory Management
Logical Vs Physical address, MMU
Dynamic Loading
Memory Partitioning

Placement Algorithms

Dynamic Partitioning
Buddy System
Paging
Memory Segmentation
Example –Intel Pentium
3EEL 602
Background
Main memory→fast, relatively high cost, volatile
Secondary memory→large capacity, slower, cheaper
than main memory and is usually non volatile
The CPU fetches instructions/data of a program from
memory; therefore, the program/datamust reside in the
main(RAM and ROM) memory
Multiprogramming systems →main memory must be
subdivided to accommodate several processes
This subdivision is carried out dynamically by OS and
known as memory management
4EEL 602
Issues in Memory Management
Relocation:Swapping of active process in and out of
main memory to maximize CPU utilization

Process may not be placed back in same main memory region!

Ability to relocate the process to different area of memory
Protection:Protection against unwanted interferenceby
another process
Must be ensured by processor (hardware) rather than OS
Sharing:Flexibility to allow several process to access the
same portions of the main memory
Efficiency:Memory must be fairly allocated for high
processor utilization, Systematic flow of information
between main and secondary memory
5EEL 602
Binding of Instructions and Data to Memory
Compiler →Generates Object Code
Linker →Combines the Object code into
a single self sufficient
executable code
Loading →Copies executable
code into memory
Execution →dynamic memory allocation
6EEL 602
Binding of Instructions and Data to Memory
Compile time: If memory location known a priori,
absolute codecan be generated; must recompile code if
starting location changes
Load time: Must generate relocatablecode if memory
location is not known at compile time
Execution time: Binding delayed until run time if the
process can be moved during its execution from one
memory segment to another →most general purpose OS
Address binding of instructions and data to memory addressescan
happen at three different stages
7EEL 602
Logical Vs Physical Address Space
Each logical address is bound to physical
address space;

Logical address–generated by the CPU; also
referred to as virtual address

Physical address–address seen by the memory unit
Logical and physical addresses ;

Identical in compile-timeand load-timeaddress-
binding schemes

Differ in execution-time address-binding scheme

Logical address ↔Virtual address
8EEL 602
Memory-Management Unit (MMU)
The runtime mappingfrom virtual →physical address
Relocation register is added to every address →
generated by user process
The user program →logicaladdresses, it never sees
the realphysical addresses
9EEL 602
Dynamic Loading
Routine is not loaded until it is called
Better memory-space utilization

unused
routine is never loaded
Useful to handle infrequently occurring cases,
e.g. error handling routines
No special support from the OS required
implemented through user program design
10EEL 602
Memory Partitioning
Fixed Partitioning:OS occupies fixed portion of main memory, rest available for
multiple processes. Two alternatives;

Equal size fixed partitions

any process ≤partition size can be loaded

Unequal size partitions

several unequal size partitions, process of matching sizes
Problems with equal size fixed partitions:

If program is bigger than a partition size, use of overlays

Main memory utilization is extremely inefficient; Internal Fragmentation–waste of space
internal to partition due to the fact that block of data loaded is smaller than partition
Two schemes –used in several variations of now-obsolete OS
11EEL 602
Unequal-Size Partitions
Advantages:

Process are always assigned in such a way as to minimize
wasted memory within a partition →internal fragmentation

Relatively simple and require minimal OS software and
overhead
Disadvantages:

Limitations on the active number of processes, number of
partitions specified at system generation time

Small jobs cannot utilize partition space efficiently; In most
cases it is an inefficient technique
Assign each processes the smallest partition to which it will fit
12EEL 602
Placement Algorithm with Partitions
Equal-size partitions

Because all partitions are of equal size, it does not
matter which partition is used
Unequal-size partitions

Can assign each process to the smallest partition
within which it will fit

Queue for each partition size

Processes are assigned in such a way as to minimize
wasted memory within a partition
13EEL 602
Placement Algorithm with Partitions
14EEL 602
Dynamic Partitioning
Partitions of variable length and number; Process in bought intomain
memory, it is allocated exactly as much memory as it requires
Leaves Holes

First at the end →eventually lot of small holes

Memory becomes more fragmented with time, memory utilization ↓
External Fragmentation

Memory that is external to all partitions becomes increasingly fragmented
Compaction

Used to overcome external fragmentation

OS shifts processes so that free memory is together in one block

Compaction requires use of dynamic relocation capability

Time consuming procedure and wasteful
of processor time
Developed to address the drawbacks of fixed partitioning
15EEL 602
Dynamic Partitioning
16EEL 602
Placement Algorithms
Three placement algorithms→Selecting among free
blocks of main memory
Best-Fit:Closest in size to the request
First-Fit:Scans the main memory from the beginning
and first available block that is large enough
Next-Fit: Scans the memory from the location of last
placementand chooses next available block that is large
enough
Compactionis time consuming →OS must be clever in plugging holes
while assigning processes to memory
17EEL 602
Placement Algorithms -Example
Allocation of 16 MB block using three placement algorithms
18EEL 602
Placement Algorithms
Which of the above approaches is the best?
Process Size/Sequence, General Comments

First-Fit→Simplest, usually the best and fastest

Next-Fit→Slightly worst results with next fit
Compaction may be more frequently required

Best-Fit→Usually the worst performer; main memory
is quickly littered by blocks too small to satisfy
memory allocation
requests
Compaction -more frequently than other algorithms
19EEL 602
Buddy System
Drawbacks

Fixed partitioning: Limits number of active process, inefficient
if poor match between partition and process sizes

Dynamic Partitioning: Complex to maintain, includes the
overhead of compaction
Compromise may be the Buddy System -Entire space
available is treated as a single block of 2U
If a request of size ssuch that 2U-1 < s≤2U, entire block
is allocated

Otherwise block is split into two equal buddies

Process continues until smallest block greater than or equal to s
is generated
20EEL 602
Initial block size 1 MB; First request Ais for 100 KB
Buddy System -Example
21EEL 602
Binary tree representation immediately after Release Brequest.
Buddy System -Example
22EEL 602
Relocation
A process may occupy different partitions which means different
absolute memorylocationsduring execution (from swapping)
Compaction will also cause a program to occupy a different partition
which means different absolute memory locations
23EEL 602
Paging
Partitioning main memory →small equal fixed-size chunks

Each process is divided into the same size chunks →pages

Chunks of memory→frames or page frames
Advantages

No external fragmentation

Internal fragmentation →only a fraction of last page of a process
OS maintains a page table for each process

Contains frame location for each page in the process

Memory address →a page number, a offset within the page

Processor hardware →logical-to-physical address translation
24EEL 602
Paging -Example
Assignment of process pages to free frames
25EEL 602
Paging -Example
Assignment of process pages to free frames.
26EEL 602
Paging -Example
Data structures for page tables at time epoch (f)
27EEL 602
Paging -Example
Convenience in Paging scheme

Frame size →power of 2

Relative address (wrtorigin of program) and the logical address
(page # and offset) are same

Example -16 bit address, page size →1K or 1024 bytes

Maximum 64 (26) pages of 1K bytes each
Advantages

Logical addressing →transparent to programmer, assembler, linker

Relatively easy to implement a function to perform dynamic
address translation at run time
28EEL 602
Paging -Example
29EEL 602
Paging -Example
Logical-to-physical address translation
in Paging
30EEL 602
Paging -Example
Logical-to-physical address translation
in Paging
31EEL 602
Implementation of Page Table
Different methods of storing page tables, OS dependent
Pointer to page table →PCB
Hardware implementation of page tables

Page table →Set of dedicated high speed registers, Simplest

Suitable for small page table sizes, Usually very large
requirements
Page table is kept in main memory

Page-tablebase register (PTBR) points to the page table

Two memory access, page table and other for data/instruction

Memory access slowed by a factor of two
Solution to the two memory access problem

Usage of a special fast-lookup hardware cache called
associative memory
or translation look-aside buffers
(TLBs)

TLB contains Page # →Frame #, Small # of TLB entries (64-
1024)
32EEL 602
Paging Hardware With TLB
33EEL 602
Shared Pages
Shared code

One copy of read-only (reentrant) code shared
among processes, e.g. text editors, compilers

Shared code must appear in same location in the
logical address space of all processes
Private code and data

Each process keeps a separate copy of the code and
data

The pages for the private code and data can appear
anywhere in the logical address space
34EEL 602
Shared Pages Example
Sharing of code in paging environment
35EEL 602
Segmentation
Memory-management scheme that supports user view of
memory
Program →Collection of segments (name and length)
Complier automatically constructs segments reflecting
input program
Example –A C complier might create separate
segments for the following
main program,
procedure,
function,
object,
local variables, global variables,
common block,
stack,
symbol table, arrays
36EEL 602
Segmentation
The program/process and its associated data is divided
into a number of segments
All segments of all programs do not have to be of the
same length
There is a maximum segment length
Addressingconsist of two parts -a segment numberand
an offset
Since segments are not equal, segmentation is similar to
dynamic partitioning
37EEL 602
Address Translation Architecture
38EEL 602
User’s View of a Program
39EEL 602
Logical View of Segmentation
1
3
2
4
1
4
2
3
user space physical memory space
40EEL 602
Example of Segmentation
41EEL 602
Sharing of Segments
42EEL 602
Segmentation
Compared to dynamic partition, segmentation program may occupy
more than one partitionand these partitions need not be contiguous
Segmentation eliminatesthe need for internal fragmentationbut like
dynamic partitioning it suffers from external fragmentation
Process is broken in small pieces, the external fragmentation is less
with segmentationthan dynamic partition
Paging is invisible to the programmer, segmentation is usually visible
43EEL 602
EXAMPLE: Logical Addresses.
Segmentation
44EEL 602
Segmentation
EXAMPLE:
Logical-to-physical address translation in Segmentation
45EEL 602
Hierarchical Page Tables
Most systems support a large logical address space

232 –2
64
, page table itself becomes excessively large
Break up the logical address space into multiple page
tables
A simple technique is a two-level page table
46EEL 602
Two-Level Paging Example
A logical address (32-bit machine with 4K page size) is divided into:
a page number consisting of 20 bits

a page offset consisting of 12 bits
Since the page table is paged, page number is further divided into:

a 10-bit page number

a 10-bit page offset
Thus, a logical address is as follows:
wherepi
is an index into the outer page table, and p2
is the
displacement within the page of the outer page table
page number
page offset
pi
p2
d
10
1012
47EEL 602
Two-Level Page-Table Scheme
48EEL 602
Address-Translation Scheme
Address-translation scheme for a two-level 32-bit
paging architecture