Experiment 7: MSP430FG4618/2013 Clocks &Timers

forestevanescentΗλεκτρονική - Συσκευές

2 Νοε 2013 (πριν από 3 χρόνια και 7 μήνες)

343 εμφανίσεις

CSE421: Microprocessors and
Microcontrollers

201
2
-
201
3

Spring

Semester




Experiment
7
:

MSP430FG4618/2013

Clo
c
ks &Timers



Important Notice:

There will be a quiz at the beginning of this Lab work. In this lab you will be
familiarized with
MSP430FG4618/
2013

clo
c
ks and timers
. You will be
re
-
program and
ru
n
several
ap
p
lications
on timers.


Exercise

1
:

Write below program and download and debug for MSP430FG4618 microcontroller.

-
What is the value of Basic Timer Control register (BTCTL)?

-
Configure BTCT
L with giving new value for led toggles every 1s.



//******************************************************************************

// MSP
-
FET430P460 Demo
-

Basic Timer, Toggle P5.1
Inside

ISR, 32kHz ACLK

//

// Description: Toggles P5.1 by xor'ing P5.1

inside of a basic timer ISR.

// ACLK provides the basic timer clock source. LED toggles every 125ms.

// ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

// //* An external watch crystal between XIN & XOUT is required for ACLK
*//

//

//



MSP430xG461x

//
-----------------

// /|
\
| XIN|
-

// | | | 32kHz

//
--
|RST XOUT|
-

// | |

// | P5.1|
--
>LED

//

// S.
Sch
auer
/ M.
Mitchell

// Texas
Instruments

Inc.

// October 2006

// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.41A

//*****************************************************************************

#include

<msp430xG46x.h>


void

main
(
v
oid
)

{


WDTCTL = WDTPW + WDTHOLD;
// Stop WDT


FLL_CTL0 |= XCAP18PF;
// Set load cap for 32k
xtal


P5DIR |= 0x02;
// Set P5.1 as output


BTCTL = BTDIV + BT_fCLK2_DIV16;
// ACLK/(2
56*16)


IE2 |= BTIE;
// Enable BT interrupt



_BIS_SR(LPM3_bits + GIE);
// Enter LPM3, enable interrupts

}


// Basic Timer
Interrupt

Service Routine

#pragma

vector=BASICTIMER_VECTOR

__interrupt
void

basic_time
r_ISR
(
void
)

{


P5OUT ^= 0x02;
// Toggle P5.1

}







Exercise

2
:

Write below program and download and debug for MSP430FG4618 microcontroller.

-
What is the value of Watchdog Timer Control Register (WDTCTL)?




#include

<msp430
xG46x.h>


//
Watchdog

config
: active , ACLK /32768
-
> 1s interval; clear counter

#define

WDTCONFIG (WDTCNTCL|WDTSSEL)

//
Include

settings for _RST/NMI pin here as well

//
----------------------------------------------------------------------


void

main

(
vo
id
)

{


WDTCTL = WDTPW | WDTCONFIG;
// Configure and clear
watchdog


P2DIR |= 0x04;
// Set P2.2 to output direction


P5DIR |= 0x02;



// Set P5.1 to output direction


P1DIR &= ~0x01;
//Configure P1.0 as
Input

(S1)



P2OUT &= 0xFB;

// Set P2.2,


P5OUT |= 0x02;
// Set P5.1,



for

(;;) {
// Loop forever



if

(IFG1 & WDTIFG){




P2OUT |= 0x04;
// LED2 shows state of WDTIFG



}



if

(P1IN & 0x01) {
// Button up




P5OUT &= 0xFD;
// LED1 off



}
else

{
// Button down




WDTCTL = WDTPW | WDTCONFIG;
// Feed/pet/kick/clear
watchdog




P5OUT |= 0x02;
// LED1 on



}


}

}




Exercise

3
:

Write below program and download and debug for MSP430FG4618 microcontroller.

-
What is the value of Timer A Control r
egister (TACTL)?


#include

<msp430xG46x.h>


void

main

(
void
)

{


WDTCTL = WDTPW|WDTHOLD;
// Stop
watchdog

timer


P2DIR |= 0x04;
// Set P2.2 to output direction


P5DIR |= 0x02;



// Set P5.1 to output direction



P2OUT &= ~0x04;

// Set P2.2,


P5OUT |= 0x02;
// Set P5.1,



TACTL = MC_2|ID_3|TASSEL_2|TACLR;
// Set up and start Timer A


// Continuous up mode , divide clock by 8, clock from SMCLK , clear timer


for

(;;) {
// Loop forever



while

((TACTL &
TAIFG) == 0x0000) {
// Wait for overflow



}
// doing nothing



TACTL = TACTL & ~TAIFG;
// Clear overflow flag




P2OUT ^= 0x04;
// Toggle P2.2,



P5OUT ^= 0x02;
// Toggle P5.1,


}

}
// Back around infinite loop




Exercise

4
: Timer Compare Mode

The compare mode is selected when CAP = 0. The compare mode is used to generate PWM output signals
or interrupts at specific time intervals.

Write below program and download and debug for MSP430FG4618 microcontroller.

-
W
hat are values of TACTL, TACTL1, TACTL2, TACCR0, TACCR1, TACCR2 ?


//*******************************************************************************

// MSP430xG46x Demo
-

Timer_A, PWM TA1
-
2, Up Mode, 32kHz ACLK

//

// Description: This program outputs tw
o PWM signals on P1.2 and P2.0 using

// Timer_A configured for up mode. The value in TACCR0 defines the PWM period

// and the values in TACCR1 and TACCR2 the PWM duty cycles. Using 32kHz ACLK as

// TACLK, the timer period is 15.6ms with a 75% duty cycle

on P1.2 and 25%

// on P2.0. Normal operating mode is LPM3.

// ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

// //* An external watch crystal between XIN & XOUT is required for ACLK *//

//

// MSP430xG461x

//

-----------------

// /|
\
| XIN|
-

// | | | 32kHz

//
--
|RST XOUT|
-

// | |

// | P1.2|
--
> TACCR1
-

75% PWM

// | P2.0|
--
>
TACCR2
-

25% PWM

//

// K.
Quiring
/ M.
Mitchell

// Texas
Instruments

Inc.

// October 2006

// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.41A

//******************************************************************************

#includ
e

<msp430xG46x.h>


void

main
(
void
)

{


volatile

unsigned

int

i;



WDTCTL = WDTPW +WDTHOLD;
// Stop WDT


FLL_CTL0 |= XCAP14PF;
// Configure load caps



// Wait for
xtal

to stabilize


do


{


IFG1 &= ~OFIFG;

// Clear OSCFault flag


for

(i = 0x47FF; i > 0; i
--
);
// Time for flag to set


}


while

((IFG1 & OFIFG));
// OSCFault flag still set?



P1DIR |= 0x04;
// P1.2 output


P1SEL |=
0x04;
// P1.2 TA1 option


P2DIR |= 0x01;
// P2.0 output


P2SEL |= 0x01;
// P2.0 TA2 option


TACCR0 = 512
-
1;
// PWM Period


TACCTL1 = OUTMOD_7;

// TACCR1 reset/set


TACCR1 = 384;
// TACCR1 PWM duty cycle


TACCTL2 = OUTMOD_7;
// TACCR2 reset/set


TACCR2 = 128;
// TACCR2 PWM duty cycle


TACTL = TASS
EL_1 + MC_1;
// ACLK, up mode



_BIS_SR(LPM3_bits);
// Enter LPM3

}