Exam 2

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14 Δεκ 2013 (πριν από 3 χρόνια και 6 μήνες)

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Study Guide for Exam 2

Comp 251


Fall 2013
-

Sigle



Chapter 4
-

MARIE: An Introduction to a Simple Computer


4.1

Introduction


4.2 CPU Basics and Organization



Registers, ALU, Control unit


4.3 The Bus



Arbitration schemes


4.4 Clocks



Synchronous
vs. asynchronous activities



Relationship of clock speed to computer speed


4.5 The Input/Output Subsystem



Memory mapped I/O vs. Instruction
-
based I/O


4.6 Memory Organization and Addressing



Addressability, alignment, interfacing


4.7 Interrupts



Tr
iggering, maskable, handling


4.8 MARIE



MARIE datapath and RTN, instruction set, memory structure


4.9 Instruction Processing



Fetch
-
Decode
-
Execute cycle with interrupt processing


4.10 A Simple Program



I will ask you to read one or two MARIE programs
; I may ask you to write a simple one.


4.11 A Discussion on Assemblers



Purpose, how they work, passes,


4.12 Extending Our Instruction Set



You should have the complete MARIE instruction set on your cheat sheet.


4.13 A Discussion on Decoding: Hardwir
ed Versus Microprogrammed control



How each works; how they compare


4.14 Real
-
World Examples of Computer Architectures



IA
-
32 registers and memory addressing; MIPS load
-
store architecture;





Chap. 5 A Closer Look at Instruction Set Architecture


5.
1 Introduction


5.2 Instruction Formats



Instruction set tradeoffs; Big vs. little endian; expanding opcodes


5.3 Instr
uction Types



Name and describe


5.4 Addressing



Data types and lengths;
basic

addre
ssing modes


5.5

Instruction Pipelining



How it
works; performance; types of hazards


5.6

Real
-
World Examples of ISAs



Contrast Intel and MIPS architectures; JVM and bytecode





Chap. 6


Memory


6.1 Introduction


6.2 Types of Memory



Cache, SRAM, DRAM, ROM, PROM, EPROM, EEPROM, flash


6.3 The Memory

Hierarchy



Purpose; hit rate; miss penalty; locality


6.4 Cache Memory



Cache mapping schemes; replacement policies; EAT; cache write policies; types and levels


6.5 Virtual Memory



Paging, segmentation, EAT, TLBs, fragmentation


6.6 A Real
-
World Examp
le of Memory Management



Omit