Programming Multi-Core Processors Based Embedded System

desirespraytownΛογισμικό & κατασκευή λογ/κού

1 Δεκ 2013 (πριν από 3 χρόνια και 8 μήνες)

66 εμφανίσεις

Programming

Multi
-
Cor
e Processors Based
Embedded
System


A Hands
-
On Experience

with Cavium Octeon Based
Platforms



Short Course

Course Description:

Multi
-
core
processor architecture
is the latest means
of
extending the
benefits due to
Moore's Law. Howeve
r, this choice brings along
some of the unique challenges of

memory
architecture design and software development to the main
-
stream that were once hallmarks
of high
-
end, high
-
performance, and high
-
price paralle
l computing.


This short

course will focus on

multi
-
threading based programming paradigm, which

is
widely used for
developing
multi
-
core processor applications.
We shall provide a concise
introduction to parallel architecture and computing terminology to lay the foundation for
this course.
However, o
ur focus is on offering a

hands
-
on experience of developing
applications for

multi
-
core processors based systems. We
will

employ

a multi
-
core

Octeon
processor based Linux system as our target platform
for hands
-
on laboratory exercises in
this course
.
We
w
ill

provide a brief introduction to
Cavium processor architecture as well as
Pthreads based programming to provide a bas
is for the rest of the multi
-
core programming
activities in this course
.


Students will have a unique opportunity to learn embedded
hi
gh
-
throughput network
packet processing

application development on
our selected
Cavium

multi
-
core platform.

We

will

use a running example of network packet capture and processing
(sniffer)
at various
layers including application layer.
Using multi
-
threadi
ng on multi
-
core architecture, students
will get a
n invaluable exposure to performance measurement and tuning techniques

for
such applications
.

Prerequisite:

Familiarity with
C programming on Linux.

Course Objectives:

1)

To introduce the students to
multi
-
threading based
multi
-
core processor
programming
paradigm; and

2)

To provide students with a unique opportunity to learn
developing network applications
on
a leading
mu
lti
-
core processor

based platform

while

focus
ing

on performance.


Course Syllabus

Day

Lect
ure Topics

Lab Experiments

Day 1

Introduction:



Multi
-
core processor architectures
and terminology



Context of current interest in
parallel computing



Programming paradigms for multi
-
core architecture



Octeon processor architecture

Lab 1:



HelloWorld



Understa
nding multi
-
core
processor architecture and
performance using MPAC
benchmarks

Day 2

Multi
-
threading on multi
-
core processors:



Developing parallel applications

1.

Mapping to multi
-
core

2.

Programming for performance



Parallel programming using multi
-
threading:

1.

In
troduction to Pthread
s

2.

Using Pthreads for multi
-
core
applications

3.

Multi
-
threaded application
examples

Lab 2:



Sorting



Performance measurements
and tuning

Day 3

M
ulti
-
core

applications

and complexities
:



Types of
HPC
applications

1.

Scientific/engineering appli
cations

2.

Commercial applications



Complexities of multi
-
threading

1.

Threading related issues

2.

Memory consistency

3.

Synchronization

Lab 3:



Sniffer

part one



Network packet capturing



Performance measurements
and tuning

Day 4

Application

layer level networking
:



Appl
ication layer protocols



Deep packet inspection and
content processing



Performance consideratio
ns

Lab 4:

Sniffer

part two



Network packet capturing with
IP and TCP header inspection




5
-
tuple based matching



Performance measurement
and tuning

Day 5

Performanc
e measurement and tuning



Archite
cture level performance
evaluation

using
benchmarks



Application level performance
evaluation



Performance
profiling

and
tuning




Case study: sniffer performance
tuning

Lab 5:

Sniffer

part three



Network packet capturing with
ap
plication level protocol
payload extraction and
matching



Performance measurement
and tuning