2011 ITRS Metrology Roadmap
Empire Innovation Professor of Nanoscale Science
College of Nanoscale Science and Engineering
257 Fuller Road
Albany, NY 12203
The continued interest in metrology was evident during 2011. Technical challenges were again
accelerated as 3D device structures such as the FinFET
and Through Silicon Vias (TSVs)
went from the
research stage to
interest was also evi
dent as the
Metrology Technical Working
increased participation and replaced key representatives.
As with previous years, the
Metrology Roadmap is a collaborative effort between the Metrology TWG and the other TWGs. Process
, Emerging Research Devices,
FEP, Interconnect, Process Integration, Devices and Structures, and Assembly and Packaging. As a cross
cutting TWG, Metrology also relies on the information from Modeling and
Enhancement, and Factory Integration.
In this article, the main challenges for 2011 are highlighted, and
a few new measurement needs emphasized.
Emerging Research Materials Metrology
Over the past several years, graphene devices have be
en the most visible example of the strong
international interest in the Nanoelectronic
search for a new switch to
replace the transistor
. During 2011, efforts to fabricate large area graphene included the now well
processing of SiC and Chemical Vapor Deposition of graphene on metals substrates
The grain size and grain boundary structure of CVD graphene is significant because
the grain boundary structure is believed to have a significant impact on
the electron transmission
) Recent aberration corrected scanning transmission electr
on microscopy images of grain
boundaries and edge structures point to the challenges in imaging grain boundaries and the significant
influence of local structure on electronic properties.(
Armed with this information, other groups are
the structure and optical properties of CVD graphene.(5)
An example of the
characterization of CVD graphene is shown in figure 1.
Line cleanroom measurements of graphene on
SiO2 and other surfaces have already been demonstrated.(6)
e device research is clearly an important area, the ERM Roadmap describes a number
of metrology needs for other materials and devices.
One example is Redox memory devices
memristors. A concerted effort is required to understand the physical mec
hanisms involved in device
operation. Operation of the devices involves formation of conducting nanofilaments in the TiO
between metal electrodes.
Recently, transmission electron microscopy(7
), synchrotron based
with chemical analysis using
absorption fine structure
and photoemission electron microscope (PEEM)(
observed the formation of a stable
Magneli Ti4O7 phase
in the TiO
This characterization is
ng and far from routine.
Filament characterization also illustrates the difficulties involved in
understanding new materials.
Alternate channel materials and
3D device structures are key areas of interest for FEP metrology.
V channel materials are expected to require characterization m
ethods capable of
accessing crystalline defects in patterned structures. Although blanket film characterization of the
stacks is difficult, characterizing film stress and defectivity i
n sub 20 nm gate length transistors is even
The use of multiple method
to improve capability
FEP & Lithography
Metrology for FinFET transistors
The topic of Compl
Metrology has been
of considerable interest during 2011 as evidenced by
Metrology, Inspection, and Process Control for Microlithography XXV conference
which is part of
SPIE Advanced Lithography conference.
Alok Vaid’s invited talk used the term “Hybrid Metr
and discussed a holistic approach to improving CD measurement. (11) This approach takes the long used
concept of using multiple methods to verify a measurement value and combines it with advanced
software. Similar concepts have motivated Advanced E
quipment and Advanced Process Control.
The 2011 Metrology TWG discussions have illustrated the wide ra
nging applicability of Compl
Metrology, and the TWG uses FinFETs as a key example.
As shown in Figure 2, FinFET
processing requires measurement of a number of different dimensions and other properties on a 3D
structure that starts with a single crystal “fin” of si
licon. Various layers such as h
afnium dioxide based
and a metal gate electrode stack
that cover the sides and top of the fin. The
etrology is also challenging, and
scanning spreading resistance microscopy has proven itself
invaluable in characterizing FinFETs.
The need for production
worthy EUV patterning is driving research and development of metrology for
mask substrates, mask blanks, and patterned masks. Two distinctly different types of defects must be
detected: phase defects and amplitude defects. These are illustrated in Figure
3D Interconnect Metrology
The 2011 Metrology Roadmap contains an expanded description of the metrology needs for through
silicon vias (TSV). Although TSVs are only one kind of 3D interconnection, their measurement needs
have received wide
Last year’s Future Fab article on the Metrology Roadmap illustrates
recent advances in TSV metrology.(13)
The following have participated in the 2011 ITRS Metrology TWG:
Carlos Beitia (
CEA LETI MINATEC
Ben Bunday (SEMATECH)
Diebold (CNSE), Brendan Foran
(Aerospace), Christina Hacker (NIST), Karey Holland (FEI), Masahiko Ikeno (Hitachi High
Kawamura (Fujitsu Semiconductor),
Adrian Kiermasz (Metryx), Delphine Le Cunff (ST), Scott List (INTEL),
Philippe Maillot (
Yaw Obeng (NIST
, George Orji (NIST),
Dave Seiler (NIST)
Chin Soobok (Samsung),
Vic Vartanian (SEMATECH)
Andras Vladar (NIST),
Yuichiro Yamazaki (Toshiba)
J. An, E. Voelkl, J. Suk, X. Li, C. W. Magnuson, L. Fu, P. Tiemeijer
, M. Bischoff, B. Freitag, E.
Popova, R. S. Ruoff. Domain (Grain) Boundaries and Evidence of "Twin
Like" Structures in CVD
Grown Graphene. ACS Nano
(4) 2433, 2011.
O.V. Yazyev and S.G. Louie, Electronic transport in polycrystalline graphene, Nature Mate
P.Y. Huang, C.S. Ruiz
Vargas, A.M. van der Zande, W.S. Whitney, M.P. Levendorf, J.W. Kevek, S.
Garg, J.S. Alden, C.J. Hustedt, Y. Zhu, J. Park, P.L. McEuen
, D.A. Muller, Grains and Grain
Boundaries in Single
Layer Graphene Atomic Patchwork Quilts, Nature 469, (2011), pp 389
K.Suenaga & M. Koshino, Atom
atom spectroscopy at graphene edge, Nature 468, December
F. Nelson, V. K. Kamineni, T. Zhang, E. S. Comfort, J. Lee and A. C. Diebold,
App. Phys. Lett.,
, 253110 (2010).
F. J. Nelson, V. K. Kamineni, T. Zhang, E. S. Comfort, J. Lee, A. C. Diebold
Ellipsometry of CVD Graphene,
H Kwon, K. M.
Kim, J. H. Jang, J. M. Jeon, M. H. Lee, G. H. Kim, X.
S. Li, G.S. Park, B. Lee, S.
Han, M. Kim, and C. S. Hwang,
Atomic structure of conducting nano
filaments in TiO2 resistive
switching memory, N
W. M. Tong, J. J. Yang, P. J.
Kuekes, D. R. Stewart, R. S. Williams
E. DeIonno, E. E. King, S. C.
Witczak, M. D. Looper, and J. V. Osborn
Radiation Hardness of Memristive Junctions, IEEE
Trans. on Nucl. Sci.
, (2010), 1640.
J. P. Strachan, D.B Strukov, J. Borghetti, J.J. Yang, G.
and R S.Williams
switching location of a bipolar memristor: chemical, thermal and structural mapping,
J. P. Strachan, J.J. Yang, R. Munstermann, A. Scholl, G. Medeiros
, D.R. Stewart,
Structural and chemical characterization of TiO2 memristive devices by spatially
A. Vaid, et al,
A holistic metrology approach: hybrid metrology utilizing scatterometry, CD
Proceedings Vol. 7971
Metrology, Inspection, and Process Control for
Editor, (2011), p
J. Mody, P. Eyben, E. Augendre, O.
Toward extending the capabilities
of scanning spreading resistance microscopy for fin field
Vac. Sci. Technol. B
, (2008), p
Dark Field Transmission Electron Microscopy image of grains in CVD graphene.
Grains having the same color have the same crystallographic orientation. Figure courtesy
Florence Nelson, College of Nanoscale Science and Engineering.
Complex structures such as FinFETs require 3D metrology
parameters in diagram
require dimensional measurement
not counting top corner rounding, footing, or etch recess
Exaggerated sidewall angle angles are used in this figure.
EUV Phase and Amplitude defect types are illustrated. Figure courtesy Phil Seidel,