Topic : Implementation architectures and VLSI

connectionbuttsΗλεκτρονική - Συσκευές

26 Νοε 2013 (πριν από 3 χρόνια και 8 μήνες)

119 εμφανίσεις

Topic :Implementation architectures and VLSI
From AVC Decoder to SVC: Minor Impact on a Dataflow Graph Description (Abstract)
Maxime Pelcat, Médéric Blestel, Mickaël Raulet
Pipelining Architecture Design of the H.264/AVC HP@L4.2 Codec For HD Applications (Abstract)
Kiwon Yoo, Kwanghoon Sohn
New LZW Data Compression Algorithm and Its FPGA Implementation (Abstract)
Wei Cui
A Cost-Efficient Residual Prediction VLSI Architecture for H.264/AVC Scalable Extension (Abstract)
Yi-Hau Chen, Tzu-Der Chuang, Chuan-Yung Tsai, Yu-Jen Chen, Liang-Gee Chen
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Topic :Implementation architectures and VLSI
Algorithm and Architecture Design for Intra Prediction in H.264/AVC High Profile (Abstract)
Tzu-Der Chuang, Yi-Hau Chen, Chen-Han Tsai, Yu-Jen Chen, Liang-Gee Chen
FLEXBLE ARCHITECTURE OF PROCESSOR OPTIMIZED FOR MULTIMEDIA APPLICATIONS
(Abstract)
Adam Luczak, Olgierd Stankiewicz
Area-efficient Quantization Architecture with Zero-prediction Method for AVS Encoders (Abstract)
Ke Zhang, Yunpeng Zhu, Lu Yu
VLSI Architecture of H.264 RDO-based Block Size Decision for 1080 HD (Abstract)
Ryoji Hashimoto, Kimiya Kato, Gen Fujita, Takao Onoye
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Topic :Implementation architectures and VLSI
A Hardware-oriented Intra Prediction Scheme for High Definition AVS Encoder (Abstract)
Man-Lan Wong, Yi-Lun Lin, Homer H. Chen
A 158 MS/S JPEG 2000 CODEC WITH A BIT-PLANE AND PASS PARALLEL EMBEDDED BLOCK
CODER (Abstract)
Masayuki Miyama, Yuusuke Inoie, Takafumi Kasuga, Ryouichi Inada, Masashi Nakao, Yoshio Matsuda
LOW-POWER HIGH-THROUGHPUT MQ-CODER ARCHITECTURE WITH AN IMPROVED CODING
ALGORITHM (Abstract)
Alireza Aminlou, Maryam Homayouni, Mahmoud Reza Hashemi, Omid Fatemi
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