Lithography Chapter 5
Text Book:
Silicon VLSI Technology
Fundamentals, Practice and
Modelin
g
g
Authors:
J. D. Plummer, M. D. Deal,
a
n
d
P. B.
G
riffin
adG
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
Lithography Chapter 5
Photolitho
g
ra
p
h
y
(
Cha
p
. 1
)
gpy(p)
•Basic lithography process
–
A
pp
l
y
p
hotoresist
ppyp
–Patterned exposure
–Remove photoresist regions
Etchwafer
Light
–
Etch
wafer
–Strip remaining photoresist
Photoresist
Mask
Substrate
Film deposition
Photoresist application
Deposited Film
Exposure
Etch mask
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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2
Development
Etching
Resist removal
Lithography Chapter 5
Lithography
•The ability to print patterns with submicron features
and to place patterns on a silicon substrate with
better than 0.1 um precision.
•Lithography is arguably the single most important
technologyinICmanufacturing
technology
in
IC
manufacturing
–Gains have traditionally been paced by the development of
new lithography tools, masks, photoresist materials, and
criticaldimensionetchprocesses
critical
dimension
etch
processes
•Considerations:
–Resolution
–Exposure field
–Placement accuracy (alignment)
–
Throughput
SILICON VLSI TECHNOLOGY
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Throughput
–Defect density (mask, photoresist and process)
3
Lithography Chapter 5
SIA NTRS Lithography
Year of Production 1998 2000 2002 2004 2007 2010 2013 2016 2018
Technology Node (half pitch) 250
nm
180 nm 130 nm 90 nm 65 nm 45 nm 32 nm 22 nm 18 nm
MPU Printed Gate Length 100 nm 70 nm 53 nm 35 nm 25 nm 18 nm 13 nm 10 nm
DRAM Bits/Chip (Sampling) 256M 512M 1G 4G 16G 32G 64G 128G 128G
MPU Transistors/Chip (x10
6) 550 1100 2200 4400 8800 14,000
Gate CD Control 3
(nm)3.32.2 1.61.160.80.6
Overlay (nm) 32 23 18 12.8 8.8 7.2
Field Size (mm) 22x32 22x32 22x32 22x32 22x32 22x32 22x32 22x32 22x32
ExposureTec
h
no
l
ogy
248
248nm
248nm
193nm
193nm+
193nm
193nm
???
???
Exposure
Tec
h
no
l
ogy
248
nm
248
nm
248
nm
+ RET
193nm
+ RET
193nm
+
RET
193nm
+ RET
+ H
2O
193nm
+ RET
+ H
2O
157nm??
???
???
Data Volume/Mask level (GB) 216 729 1644 3700 8326 12490
•0.7X in linear dimension every 3 years.
•Placement accuracy ≈ 1/3 of feature size.
•
≈35%ofwafermanufacturingcostsforlithography
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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Upper Saddle River NJ
4
≈
35%
of
wafer
manufacturing
costs
for
lithography
.
•Note the ???single biggest uncertainty about the future of the roadmap.
Lithography Chapter 5
Definitions
•Critical Dimensions (CD)
–Dimensions that must be maintained
•CD Control
–About 10% of minimum feature size.
Expressedas3
sigmaasthreestandarddeviationsofthe
–
Expressed
as
3

sigma
as
three
standard
deviations
of
the
feature size population must be within the specified 10% of
the mean)
PlacementorAlignmentAccuracy
•
Placement
or
Alignment
Accuracy
•Optical Lithography used through 0.18um to 0.13 um
g
eneration.
(
described in text
)
g()
•Xray, eBeam and extreme ultraviolet are options
beyond 0.1 um.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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5
Lithography Chapter 5
Wafer Exposure
•It is convenient to divide the
wafer printing process into
threeparts
three
parts
–A: Light source,
–B. Wafer exposure system,
–
C. Resist.
Aerial
Image
(Surface)
•Aerial image is the pattern of
opticalradiationstrikingthe
P
+
N
+
N
+
P
+
TiN Local
optical
radiation
striking
the
top of the resist.
•
Latentimageisthe3Dreplica
N Well
P Well
P
Latent
Image
in Photoresist
Interconnect Leve
l
(See Chapter 2)
•
Latent
image
is
the
3D
replica
produced by chemical
processes in the resist.
Positive Photoresist
•exposed photoresist dissolves when
p
rocesse
d
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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6
p
Lithography Chapter 5
Important Aspects
•Masks
–Design, Fabrication, Reuse and Maintenance
•Photoresist
–Material, material properties, develop, operation during etch
ormaskprocesspostprocessremoval
or
mask
process
,
post
process
removal
•Wafer Exposure System
–Exposure energy type, focus, linewidth/wavelength,
difftifft(fii)dthff
diff
rac
ti
on e
ff
ec
t
s
(f
r
i
ng
i
ng
)
,
d
ep
th
o
f
f
ocus
•
All
All
–Line width
–Alignment
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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7
Lithography Chapter 5
A. Light Sources
•Decreasing feature sizes require the use of shorter wavelengths, λ.
•Traditionally mercury (Hg) vapor lamps have been used which generate
manyspectrallinesfromahighintensityplasmainsideaglasslamp
many
spectral
lines
from
a
high
intensity
plasma
inside
a
glass
lamp
.
–Electrons are excited to higher energy levels by collisions in the plasma.
–Photons are emitted when the energy is released.
–
g
line λ= 436 nm
(
t
yp
ical in 1990’s
)
g
(yp)
–i line λ = 365 nm(used for 0.5 µm, 0.35 µm)
•Brightest sources in deep UV are excimer lasers
–KrF λ= 248 nm(used for 0.25 µm, 0.18µm, 0.13 µm)
Kr+NF3
energy
⎯
→
⎯
⎯
KrF→photon emission
(1)
–
A
rF λ= 193 nm(used for 0.13µm, 0.09µm, . . . )
–FF λ= 157 nm(used for ??)
–Issues include finding suitable resists and transparent optical components at these
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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wavelengths.
8
Lithography Chapter 5
B. Wafer Exposure Systems
4
Light
Source
1:1 Exposure Systems
Usually
4
X or 5X
Reduction
Three types of
exposure systems
havebeenused.
Optical
System
have
been
used.
Mask
Photoresist
Si Wafer
Gap
•Contact printing is capable of high resolution but has unacceptable defect densities
(minimal diffraction effects, low cost, contact contaminants and defects)
Contact PrintingProximity PrintingProjection Printing
•Proximity printing cannot easily print features below a few µm
(diffraction effects exist, may be used for xray systems)
•Projection printing provides high resolution and low defect densities and dominates
today (diffraction a concern)
∴
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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–Typical projection systems use reduction optics (2X 5X), step and repeat or step and scan mechanical
systems, print ≈ 50 wafers/hour and cost $10 25M.
9
Lithography Chapter 5
Diffraction (1)
•A simple example is the image formed by a small circular
aperture (Airy disk).
Ntthtitiifdlif
•
N
o
t
e
th
a
t
a po
i
n
t
i
mage
i
s
f
orme
d
on
l
y
if
:
–λ→ 0, d→ ∞, or f → 0
1.22
λ
是∞
d
f
R
⋅
=
λ
22.1
•Diffraction is usuall
y
described in terms of two
y
limiting cases:
–Fresnel diffraction near field (proximity and contact systems)
–
Fraunhofer diffraction far field
(p
ro
j
ection s
y
stems
)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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(pjy)
10
Lithography Chapter 5
Resolution
•The denominator is defined as the numerical aperture:
α
sin nNA
≡
(3)
–
Where αrepresents the ability of the lens to collect diffracted light.
•The Resolution is then defined as
NA
k
NA
R
λ
λ
61.0
1
==
(4)
•
k1isanexperimentalparameterwhichdependsonthelithography
•
k1
is
an
experimental
parameter
which
depends
on
the
lithography
system and resist properties (≈ 0.4 0.8).
•
Obviouslyresolutioncanbeincreasedby:
Obviously
resolution
can
be
increased
by:
–decreasing k1
–Decreasing λ
–increasing NA (bigger lenses)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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11
Lithography Chapter 5
Depth of Focus
•While resolution can be increased by:
–decreasing k1
Di
λ
k
R
λ
λ
61.0
1
=
=
(4)
–
D
ecreas
i
ng
λ
i湣牥慳楮朠乁
扩杧敲 汥湳敳l
䡩杨敲乁汥湳敳慬獯摥捲敡獥t桥摥灴doff潣畳⡄但(
NA
k
NA
R
1
(4)
•
Higher
NA
lenses
also
decrease
the
depth
of
focus
(DOF)
.
(See text for derivation.)
k
DOF
λ
λ
δ
±
±
(5)
()
(
)
2
2
2
2NA
k
NA
DOF
δ
±
=
±
=
=
(5)
•k2 is usually experimentally determined.
•Thus a 248nm (KrF) exposure system
with a NA = 0.6 would have a resolution of
R≈03µm(k1=075)anda
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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12
R≈
0
.
3
µm
(k1
=
0
.
75)
and
a
DOF of ≈ ±0.35 µm (k2 = 0.5).
Lithography Chapter 5
Modulation Transfer Function
•Another useful concept is the modulation transfer function or MTF, defined
as shown below.
–MTF depends on the feature size and on the spatial coherence of the light source
Photoresist
I
I
Aperture
Light
Source
Condenser
Lens
Objective or
Projection
Lens
Photoresist
on Wafer
Mask
MTF
=
φ
䵁M
−
φ
䵉M
φ
䵁M
+I
MIN
(6)
Intensity
at Mask
Intensity
on Wafer
1
1
I
MAX
•Typically require
MTF > 0.5 or resist has
I
MAX
IMIN
exposure problems
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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13
00
Position
Position
Lithography Chapter 5
Spatial Coherence
•Finally, another basic concept is the
spatialcoherenceofthelightsource
spatial
coherence
of
the
light
source
.
•Practical light sources are not point
sources.
Light
Source
Mask
Condensor
Lens
•Therefore, the light striking the mask
will not be plane waves.
s
d
• The spatial coherence of the system is
d
s
S
=
=
di
l
d
diameter sourcelight
(
7
)
defined as
or often as
d
di
amete
r
l
enscon
d
enser
()
optics projection
condenser
NA
NA
=S
(8)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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14
•Typically, S ≈ 0.5 to 0.7 in modern systems
Lithography Chapter 5
Modulation Transfer Function
Small
Diffraction effect ⇓MTF
s≈0.50.7
for s→0 optical intensity decreases
de
g
radation for
large features
Lower contrast in the aerial image
Less
coherent
light
Improvement for
very small
features
S=light source diameter/condenser diameter
S/d
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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S
=s
/d
S=NAcondenser optics
/NAprojection optics
Lithography Chapter 5
Photoresist
•Designed to respond to incident photons by changing
their properties when exposed to light.
–Longlived response require a chemical change
•Most resists are hydrocarbonbased materials.
Photonsbreakchemicalnonds
–
Photons
break
chemical
nonds
•Positive resists become more soluble in the
developer solution
–Typically used and have better resolution
Ntiitdthit
•
N
ega
ti
ve res
i
s
t
s
d
o
th
e oppos
it
e.
•
Spincoatingtypicallyemployed
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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•
Spin
coating
typically
employed
16
Lithography Chapter 5
Processing
•Start with clean wafer
•S
p
inon
p
hotoresist
p
p
–Adhesion promoter may be required
–Viscosity and spin rate determine thickness and uniformity
–Create a film of 0.6 to 1 um depth
•Prebake to drive off solvents
•Alignment and Exposure
Possible
postbake
–
Possible
postbake
•Develop (remove unwanted photoresist)
•Etch
•Postbaketo harden as an etchant mask
•Remove Photoresist
SILICON VLSI TECHNOLOGY
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–
Chemically or in an oxygen plasma
17
Lithography Chapter 5
Resist Important Parameters
•Sensitivity
–How much light is required to expose the resist.
–gline and iline typically 100 mJ cm
2
–Too sensitive, unstable, temp. dependent, noise prone
•
Resolution
•
Resolution
–Diffraction limited resolution in the resist image
•“Resist”
–The ability to withstand etching or ion implantation or
whatever after postbake
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Fundamentals, Practice and Modeling
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18
Lithography Chapter 5
Basic Properties of Resists
•Two basic parameters are used to describe resist properties, contrast and
the critical modulation transfer function or CMTF.
•Contrast allows distinguishing light and dark areas on the mask.
m
aining
0.75
1.0
0.75
1.0
Positive
Resist
Negative
Resist
•Contrast (the slope) is
definedas
i
on of Resist Re
m
0.25
0.5
0.75
0.25
0.5
0.75
D
0
D
f
D
0
D
f
defined
as
10
log
1
D
D
f
=
γ
(11)
Fract
i
0
Exposure Dose (log)
1
10
100
Exposure Dose (log)
1
10
100
0
0
D
•Typical gline and iline resists achieve contrast values,
γ, of 2 3 and Df
values of about 100 mJ cm2.
•DUV resists have much higher contrast values (5 10) and Df values
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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19
of about 20 40 mJ cm2.
Lithography Chapter 5
Critical MTF
1.0
0.5
0.75
1.0
x
posure Dose
D
f
Areal Image
0.25
0
E
x
Position
D
0
•The aerial image and the resist contrast in combination, result in the quality
of the latent image produced. (Gray area is “partially exposed” area which
determines the resist edge sharpness.)
•
ByanalogytotheMTFdefinedearlierforopticalsystemstheCMTFfor
•
By
analogy
to
the
MTF
defined
earlier
for
optical
systems
,
the
CMTF
for
resists is defined as
CMTFresist
=
D
f
−D
0
D
f
+D
0
=
101/γ
−1
101/γ
+1
(12)
•Typical CMTF values for g and iline resists are about 0.4. Chemically
amplified DUV resists achieve CMTF values of 0.1 0.2.
•Lower values are better since in general CMTF < MTF is required for the
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
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20
resist to resolve the aerial image.
Lithography Chapter 5
Manufacturing Methods and Equipment
Slit of light to avoid
optical aberration
•Full wafer scanning
system
Typically1:1maskto
–
Typically
1:1
mask
to
image
–Limited to larger features
•A slit is scanned
across the wafer
–
Slit and lens s
y
stem
Thlblli
y
minimize aberrations
–Difficult full wafer
alignment
•
Th
e systems use g
l
o
b
a
l
a
li
gnment 
difficult alignment on each die
•full mask difficult use steppers instead
to improve overlay accuracy
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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Lithography Chapter 5
Manufacturing Methods and Equipment
Combined stepper + scanner 4X5X
larger mask patterndifference in
scanning speeds.
•Stepper System
–4x to 5x mask
–Step, align, scanslit
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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Lithography Chapter 5
Measurements of Masks
•Check Masks for Features and Defects
–Scan
–Make a new mask or Correct the errors
Corrections = repairs made by lasers
(evaporation of Cr=excess by focusing)
Defects of sizes below critical dimensions will not print on PR
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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Lithography Chapter 5
Measurement of Photoresist Patterns
•SEM has typically replaced optical microscopes
SEM
(Photo courtesy of A. Vladarand P. Rissman, Hewlett Packard.)
SEM
Resist pattern
Φebeam≈10nm
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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Lithography Chapter 5
Electrical Line Width Monitor
•Test structures to determine the effective line width
–Van derPauwcross used to determine sheet resistivity
–The crossbridge test structure
(
)
43−
⋅
=
=
V
S
π
ρ
ρ
LL
V
R
⋅
−
ρ
ρ
3
2
(
)
65
2ln
−
I
t
S
U
WWtI
R
S
⋅
=
⋅
=
=
−
ρ
51
3
2
51−
⋅⋅=
V
I
LW
S
ρ
32
−
V
resistor
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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Lithography Chapter 5
Electrical Alignment Monitors
•Based on the cross
bridge design
•Place a alternate
mask layer to form a
potentiometer
potentiometer
.
–If centered, two
resistors equal
Ifttd
–
If
no
t
cen
t
ere
d
,
resistance indicates
distance offset
L
W
L
R
i
Si
⋅=
ρ
i
i
WRR
RL
⋅
⎟
⎠
⎞
⎜
⎝
⎛
+
−=Δ
21
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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26
S
i
i
ρ
⎟
⎠
⎜
⎝
2
Lithography Chapter 5
Models and Simulation
• Lithography simulation relies on models from two fields of science:
–Optics to model the formation of the aerial image.
–Chemistry to model the formation of the latent image in the resist.
A. Wafer Exposure System Models
Th
lillilbliltitlthtlltth
•
Th
ere are severa
l
commerc
i
a
ll
y ava
il
a
bl
e s
i
mu
l
a
ti
on
t
oo
l
s
th
a
t
ca
l
cu
l
a
t
e
th
e
aerial image PROLITH, DEPICT, ATHENA. All use similar physical models.
•We will consider only projection systems.
•Light travels as an electromagnetic wave.
(
)
(
)
(
)
)(cos,ttWCtP
φω
ε
+=
(13)
(
)
(
)
{
}
(
)
(
)
(
)
Pjtj
e
W
C
W
U
e
W
U
t
W
φω
ε
−−
=
=
where
Re
or, in complex exponential notation,
(
14
)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
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27
(
)
(
)
{
}
(
)
(
)
e
W
C
W
U
e
W
U
t
W
ε
=
=
where
Re
,
()
Lithography Chapter 5
Light
Condenser
Lens
Objective or
Projection
Lens
Photoresist
on Wafer
Mask
Generic
Projection
Source
α
System
Aperture
x
y
z
x
1y
1 Plane
x
'
y
'
Plane
x y Plane
• The mask is considered to have
(
)
⎬
⎫
⎨
⎧
areasclear in 1
(15)
a digital transmission function:
• After the light is diffracted, it is
described b
y
the Fraunhofer
(
)
⎭
⎬
⎫
⎩
⎨
⎧
=
areas opaquein 0
,
11
y
x
t
(15)
(
)
(
)
()
∫
∫
+∞+∞
+−
=
dxdy
e
y
x
t
y
x
yfxfj
yx
π
ε
2
1
1
,
’
,
’
(16)
y
diffraction (far field) integral:
where fx
and fy
are the spatial
fre
q
uencies of the diffraction
(
)
(
)
∫
∫
∞−∞−
dxdy
e
y
x
t
y
x
H
1
1
,
,
O
O
y
f
x
f
y
x
’
and
’
=
=
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
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28
q
pattern, defined as
λ
λ
z
f
z
f
y
x
Lithography Chapter 5
•
ε(x’,y’) is the Fourier transform of the mask pattern.
(
)
(
)
{
}
ε
⠱㜩
(
)
(
)
{
}
11
,,
y
xt
F
f
f
yx
=
ε
(17)
• The light intensity is simply the square of the magnitude of the
ε
field, so that
(
)
(
)
(
)
{
}
2
2
ε
⠱㠩
(
)
(
)
(
)
{
}
2
11
2
,,,yx
t
F
f
f
f
f
I
yxyx
=
=
ε
(18)
• Example consider a long
rectan
g
ular slit. The Fourier
Mask
x
g
transform of t(x) is in standard
texts and is the sin(x)/x function.
t(x)
w/2
z
Objti
Photoresist
on Wafer
F{t(x)}
Light
Source
Condenser
Lens
Obj
ec
ti
ve or
Projection
Lens
Mask
α
I(x')
Aperture
x
y
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
29
z
x1
y1 Plane
x
'
y
'
Plane
x y Plane
Lithography Chapter 5
• But only a portion of the light is collected.
(
)
⎪
⎬
⎫
⎪
⎨
⎧
<+
=
λ
NA
NA
ff
f
f
P
yx
y
x
22
if 1
,
(
19
)
• This is characterized by a pupil function:
(
)
⎪
⎭
⎬
⎪
⎩
⎨
>+
λ
NA
ff
f
f
yx
y
x
22
if 0
,
()
• The objective lens now performs the inverse Fourier transform.
()
(
)
(
)
{
}
(
)
{
}
(
){}
yxyxyx
ffPyxtFFffPffFyx,,,,,
11
11−−
==
ε
ε
(20)
resulting in a light intensity at the resist surface (aerial image) given by
()()
2
,,yxyxI
i
ε
=
(21)
•Summary: Lithography simulators
Lens Performs Inverse
Fourier Transform
Light Intensity
ε(x,y) = F

1{
ε(f
x
,f
y
)P(f
x
,f
y
)}
I
i
(x,y) = ⎥ε(x,y)⎥2
perform these calculations, given a mask
design and the characteristics of an
optical system.
•These simulators are quite powerful
today.
•Math is well understood and fast
algorithms have been implemented in
commercial tools.
Thilidld
FarField
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
30
•
Th
ese s
i
mu
l
ators are w
id
e
l
y use
d
.
Mask
Transmittance
t(x1,y1)
Far
Field
Fraunhofer
Diffraction Pattern
Pupil Function
P(f
x
,f
y
)
ε
(f
x
,f
x
) = F{t(x
1,y1
)}
Lithography Chapter 5
• ATHENA simulator (Silvaco). Colors correspond to optical intensity in the
aerial image.
s
1
2
3
1
2
1
2
Micron
s
0
1
2
3
Microns
0
1
2
Microns
0
1
Microns
3
0
1
231
2
3
Microns
0
12
1
2

2
2
Microns
0
12
1
2
Exposure system: NA =
Slh
Sameexampleexceptthat
0.43, partially coherent
gline illumination
(λ
= 436 nm). No
aberrationsor
S
ame examp
l
e except t
h
at
the feature size has been
reduced to 0.5 µm. Note
thepoorerimage.
Same
example
except
that
the illumination
wavelength has now been
changed to iline
illiti(
λ
㌶3Φ
慢敲牡瑩潮a
=
潲
=
摥景捵獩湧⸠䵩湩浵洠
晥慴畲攠獩穥猠ㄠ땭⸠
瑨t
=
灯潲敲
=
業慧攮
=
楬i
畭
i
湡
瑩
潮→
(
λ
㴠
㌶3
=
Φ
慮搠瑨攠乁慳敥渠
楮捲敡獥搠瑯‰⸵⸠乯瑥⁴桥i
業
p
牯癥搠業±
g
攮
卉䱉䍏丠噌卉π呅䍈乏䱏䝙
䙵湤慭敮瑡Fs,⁐牡捴楣e=慮搠䵯摥汩湧
䉹=偬畭me爬⁄敡氠☠䝲楦晩δ
ꤠ㈰20==偲敮瑩捥⁈慬=
啰灥爠卡摤汥⁒楶e爠乊
31
pg
Lithography Chapter 5
Optical Intensity Pattern in the Resist
Aerial Image I
i
(x,y)
Exposing Light
Latent Image in
Resist I(x,y,z)
Latent Image
•
The
secondstepin
lithography
P
N
P
+
P
+
N
+
N
+
The
second
step
in
lithography
simulation is the calculation of the
latent image in the resist.
Th
lihtititdi
P WellN Well
•
Th
e
li
g
ht
i
n
t
ens
it
y
d
ur
i
ng
exposure in the resist is a function
of time and position because of
–
Li
g
ht absor
p
tion and bleachin
g
.
P
g
pg
–Defocusing.
–Standing waves.
• These are generally accounted for by modifying Eqn. (21) as follows:
(
)
(
)
(
)
zyxIyxIzyxI
ri
,,,,,
=
(22)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
32
where Ii(x,y) is the AI intensity and I
r
(x,y,z) models latent image effects.
Lithography Chapter 5
ATHENA Simulation
•Calculation of light intensity
distribution in a photoresist layer
during exposure using the ATHENA
0
simulator.
•A simple structure is defined with a
photoresist
layercoveringasilicon
M
icrons
0.4
0.8
photoresist
layer
covering
a
silicon
substrate which has two flat regions
and a sloped sidewall.
Th
ilihh
h
M
1.2
•
Th
e s
i
mu
l
at
i
on s
h
ows t
h
e p
h
oto
active compound (PAC) calculated
concentration after an exposure of
200
mJ
cm
2
.
Microns
0
0.8
1.62.4
200
mJ
cm
.
•Lower PAC values correspond to
more exposure. The color contours
thdtthittd
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
33
th
us correspon
d
t
o
th
e
i
n
t
egra
t
e
d
light intensity from the exposure.
Lithography Chapter 5
Photoresist Exposure
•The light incident is primarily absorbed by the PAC
which is uniformly distributed in the resist.
–Note: this analysis neglects standing wave effects
•Resist bleaching:
PACbecomesmore
transmissive
asitbecomesexposedas
–
PAC
becomes
more
transmissive
as
it
becomes
exposed
,
as
the PAC converts to carboxylic acid
MdliThbbilifbii
•
M
o
d
e
li
ng:
Th
e pro
b
a
bili
ty o
f
a
b
sorpt
i
on
i
s
proportional to the light intensity and the absorption
coefficient.
)
)
()
Itz
dz
dI
⋅−=,
α
(23)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
34
Lithography Chapter 5
Exposure Model
• The absorption coefficient depends on the resist properties and
on the PAC
BmA
resist
+
⋅
=
α
(24)
where A and B are resist parameters (first two “Dill” parameters)
with A the absorption coefficient of bleached and B nonbleached
resist. Defining the percentage of unexposed resit
[
]
[]
0
PAC
PAC
m=
(25)
•m is a function of time (m=1 unexposed t=0, m=0 fully exposed)
and is given by (with C another “Dill” parameter
mIC
dt
dm
⋅⋅−=
(26)
Substituting
(24)into(23)wehave:
•
Substituting
(24)
into
(23)
,
we
have:
()()
IBtzmA
dz
dI
⋅+⋅−=,
(27)
•
Eqns
(26)and(27)arecoupledequationswhicharesolved
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
35
•
Eqns
.
(26)
and
(27)
are
coupled
equations
which
are
solved
simultaneously by resist simulators.
Lithography Chapter 5
Conceptual Experimental Setup
Cd
Photoresist
on Transparent
Substrate
Filter to Select
Particular
λ
⁌楧桴
卯畲捥
C
潮
d
敮獥e
†††䱥湳
偡牴楣畬慲
=
λ
呲慮獭楴瑥T
䱩杨L
T
牡湳浩瑴慮捥
1
〮㜵
〮0
T
<
䱩杨L
䑥瑥捴潲
α
T
〮㈵
㈰2㐰4
㘰6
T
0
䕸灯獵牥⁄潳攠⡭䨠捭
ⴲ
Φ
A transparent substrate with a
backside antireflective coating
is used
Typical experimental result
• By measuring T0
and T∞, the Dill parameters, A, B and C, can be extracted.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
36
Lithography Chapter 5
Photoresist Baking
A
tbkitiditdlithittt
•
A
pos
t
exposure
b
a
k
e
i
s some
ti
mes use
d
pr
i
or
t
o
d
eve
l
op
i
ng
th
e res
i
s
t
pa
tt
ern.
•This allows limited diffusion of the exposed PAC and smoothes out standing wave
patterns.
•Generally this is modeled as a simple diffusion process (see text).
0
04
0
0.4
Mi
crons
0
.
4
0.8
Microns
0.4
0.8
1.2
1.2
Microns
0.8
1.6
2.40
Microns
0
0.8
1.62.4
•Simulation on right after a post exposure bake of 45 minutes at 115 ˚C. The color
contours again correspond to the PAC after exposure.
Nt
thtthtdi
ffttlihb“dt”bthi
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
37
•
N
o
t
e
th
a
t
th
e s
t
an
di
ng wave e
ff
ec
t
s apparen
t
ear
li
er
h
ave
b
een
“
smeare
d
ou
t”
b
y
thi
s
bake, producing a more uniform PAC distribution.
Lithography Chapter 5
Photoresist Developing (1)
•A number of models for resist developing have been proposed and
implemented in lithography simulators.
•The simplest is purely empirical (Dill et.al).
(
)
()
⎪
⎪
⎬
⎫
⎪
⎪
⎨
⎧
⎞
⎛
−>++
=
5.0 if exp006.0
,
,
3
2
2
321
E
E
mmEmEE
z
y
x
R
(28)
(
)
()
⎪
⎪
⎭
⎬
⎪
⎪
⎩
⎨
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−+
otherwise 1exp006.0
,
,
2
3
2
1
E
E
E
E
z
y
x
R
whereRisthelocaldevelopingrateandmisthelocal
PAC
after
where
R
is
the
local
developing
rate
and
m
is
the
local
PAC
after
exposure. E1, E2
and E3
are empirical constants.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
38
Lithography Chapter 5
Photoresist Developing (2)
•A more physically based model has been developed by Mack which
models developer diffusion and reaction (much like the deposition
modelsdiscussedinChap.9).
models
discussed
in
Chap.
9).
•See the text for details on this development model.
(
)
[]
n
SRSDD
PACCkFCCkF
⋅⋅=⇔−⋅=
21
D
[]
[]
n
RD
n
DRD
PACkk
PACCkk
FF
⋅+
⋅⋅⋅
==
21
In steady state F
1=F2
and
C
S
C
D
But the rate is then r=F
1=F2
and
(
)
F1
F2
F
3
(
)
[]
()
min
0
1
1
r
m
PACk
k
m
C
k
r
n
n
R
D
n
DD
+
−+
⋅
−⋅⋅
=
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
39
Resist
Substrate
Developer
Lithography Chapter 5
Developing Model
ons
0
0.4
0
0.4
Micro
0.8
1.2
Microns
0.8
1.2
Microns
0.8
1.6
2.4
0
Microns
0.81.6
2.4
0
El
fhllifdldhilih
•
E
xamp
l
e o
f
t
h
e ca
l
cu
l
at
i
on o
f
a
d
eve
l
ope
d
p
h
otores
i
st
l
ayer us
i
ng t
h
e
ATHENA simulator. The resist was exposed with a dose of 200 mJcm
2,
a post exposure bake of 45 min at 115 ˚C was used and the pattern was
developedforatimeof60
seconds
,allnormalparameters.TheDill
developed
for
a
time
of
60
seconds
,
all
normal
parameters.
The
Dill
development model was used.
•Center part way through development.
Riht
ltdlt
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
40
•
Ri
g
ht
comp
l
e
t
e
d
eve
l
opmen
t
.
Lithography Chapter 5
Future Trends
•Optical lithography will be extendible to the 65 nm
generation (maybe further ).
•Beyond that, there is no general agreement on which
approach to use.
Possibilitiesincludee
beame
beamprojection
•
Possibilities
include
e

beam
,
e

beam
projection
(SCALPEL), xray and EUV.
•New resists will likel
y
be re
q
uired for these s
y
stems.
yqy
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
41
From R. Socha, ASML, SPIE Microlithography Conf. 2004
Lithography Chapter 5
Techniques for Future Electronics
•Lithography and Other Patterning Techniques for Future
Electronics
ByRFabianPeaseFellowIEEEandStephenYChouFellowIEEE
–
By
R
.
Fabian
Pease
,
Fellow
IEEE
,
and
Stephen
Y
.
Chou
,
Fellow
IEEE
–Proceedings of the IEEE, Vol. 96, No. 2, February 2008
•
ProjectionOptics
Projection
Optics
–Light Sources: 248–193 nm (KrFand ArFexcimerlasers)
•Immersion Optics: use a fluid instead of air
ExtremeUltravioletLithography(EUVL)
•
Extreme
Ultraviolet
Lithography
(EUVL)
•Resolution Enhancement Technology (RET)
•Absorbance Modulation Optical Lithography (AMOL)
•Electron and Ion Beam Lithography
•Xray Lithography
•N
a
n
o
im
p
rin
t
T
ec
hn
o
l
ogy
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
aopt
ecoogy
42
Lithography Chapter 5
Summary of Key Ideas
•Lithography is the key pacing item for developing new technology
generations.
•
Exposuretoolstodaygenerallyuseprojectionopticswithdiffraction
•
Exposure
tools
today
generally
use
projection
optics
with
diffraction
limited performance.
•g and iline resists based on DNQ materials and were used down to
0.35
µ
m.
µ
•DUV resists use chemical amplification and are generally used below
0.35 µm.
•Lithography simulation tools are based on Fourier optics and do an
excellent job of simulating optical system performance. Thus aerial
images can be accurately calculated.
•Photoresist modeling (exposure, development, postbake) is less
advancedbecausechemistryisinvolvedwhichisnotaswell
advanced
because
chemistry
is
involved
which
is
not
as
well
understood. Thus latent images are less accurately calculated today.
•A new approach to lithography may be required in the next 10 years.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
© 2000 by Prentice Hall
Upper Saddle River NJ
43
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