Processor Architecture - CSD

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18 Νοε 2013 (πριν από 3 χρόνια και 6 μήνες)

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1

Processor Architecture

Jurij Silc, Borut Robic, Theo Ungerer

2

Plan of
l
ectures (1)


Prelude


Ch
apter

1:

RISC processors, ISA,
b
asic processor structure
, b
asic pipelining,
pipeline hazards and solutions, static branch prediction
, m
ulti
-
cycle ops, RISC
examples, JAVA processors


Ch
apter

2:

Dataflow processors


Ch
apter

3:

Scoreboarding and Tomasulo


Ch
apter

4:

Principles of superscalar and VLIW processors
, i
nstruction fetch and
dynamic branch prediction techniques
, l
ater pipeline stages in detail, multimedia
enhancements
, p
rocessor examples: Pentium III, Transmeta Crusoe, VLIW, EPIC
and the Itanium processor


Ch
apter

5:

Technological trends,
v
alue speculation,
t
race cache
, a
dvanced
s
uperscalar


Ch
apter

6:

Multithreading, Sun’s MAJC and
s
ingle
-
c
hip
m
ultiprocessor
,
s
imultaneous
m
ultithreading, Alpha 21464,

m
ultiscalar and
d
ynamic
m
ultithreading
, d
atascalar


Ch
apter

7:

Processor
-
in
-
Memory
, r
econfigurable and
a
synchonous

processor


3

Technology

Programming

Languages

Operating

Systems

History

Applications

Interface Design

(ISA)

Measurement &
Evaluation

Parallelism

Computer Architecture:

• Instruction Set Design

• Organization

• Hardware

Processor
a
rchitecture
c
ourse
f
ocus


Understanding the design techniques, machine structures, technology

f
actors,
evaluation methods that will determine the form of computers in 21st Century

4

Topic
c
overage


Basics:

Scalar RISC Processors and Basic Pipelining


Past:


Dataflow Processors


CISC Processors: Scoreboarding and Tomasulo Algorithm


Present:

Multiple
-
Issue Processors


Superscalars, Multimedia Enhancements, VLIW and EPIC


Future:


Technological Trends


Traditionals: Value Speculation, Trace Cache, Future Superscalars/EPICs,


Parallel Solutions: Multithreading, Single
-
Chip Multiprocessor, Processor
-
in
-
Memory,


Advanced research: Multiscalar, Dynamic Multithreading


Exotics: Datascalar, Reconfigurable Computing, Asynchronous Processors

5

Textbook


Jurij
S
ilc, Borut Robi
c
, Theo Ungerer:
Processor Architecture
-

From Dataflow
to Superscalar and Beyond

(
Springer
-
Verlag
,

1999
)



Journal papers



Jurij Silc, Borut Robic, Theo Ungerer:
"Asynchrony in parallel computing: From
dataflow to multithreading",

Parallel and Distributed Computing Practices
,
1(1):3
-
30, 1998.


Borut Robic, Jurij Silc, Theo Ungerer:
"Beyond dataflow",

J. Computing and
Information Technology
, 8(2):89
-
101, 2000.


Jurij Silc, Theo Ungerer, Borut Robic:
"A survey of new research directions in
microprocessors",

Microprocessors and Microsystems
, 24(4):175
-
190, 2000.


Theo Ungerer, Borut Robic, Jurij Silc:

Multithreaded
processors",

The
Computer Journal
, (
to appear)
, 200
2
.


6

Book


o
verview

7

Supplementary
l
iterature


J. L. Hennessy, D. A. Patterson:
Computer Architecture: A Quantitative
Approach

(
Morgan Kaufmann Publishers, 2nd Edition
,

1996
)



B. Shriver, B. Smith:
T
he Anatomy of a High
-
Performance Microprocessor
-

A
Systems Perspective

(
IEEE Computer Society Press
,
1998
)



M. Flynn:
Computer Architecture, Pipelined and Parallel Processor Design

(
Jones and Bartlett Publishers, Sudbury, MA
,
1995
)