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`7.

SUBJECT DETAILS





7.4

OPERATING SYSTEMS






7.4.1

Objective and Relevance






7.4.2

Scope






7.4.3

Prerequisites






7.4.4

Syllabus







i.

JNTU







ii.

GATE







iii.

IES






7.4.5

Suggested Books






7.4.6

Websites






7.4.7

Experts’ Details







7.4.8

Journals






7.4.9

Findings and Developments






7.5.10

i.

Session Plan








ii.

Tutorial






7.4.11

Student Seminar Topics






7.4.12

Question Bank








i.

JNTU







ii.

GATE







iii.

IES










7.4.1

OBJECTIVES AND RELEV
ANCE




Understanding how an operating system works involves an understanding of hardware
structures (devices, networks, memory organisation) and soft ware structures
(scheduling,concurrency, security).



This course deals with the structure and mechanisms of operating systems from an
engineering point of view, and its purpose is to provide an understanding of the
fundamentals of the operating systems design, relating them with current direction in
their de
velopment.


At the completion of the course, students should be able to describe the components of a
modern operating systems, explain how they interact with the computer hardware, and
apply the concepts of operating system design to practical problems



7.4.2

SCOPE





At the completion of the course, students should be able to describe the components
of amodern operating systems, explain how they interact with the computer hardware,
and apply the concepts of operating system design to practical problem
s



7.4.3

PREREQUISITES



i.

Introduction to computer engineering


ii.

Proficiency in C programming language.



7.4.4.1

JNTU SYLLABUS




UNIT I



OBJECTIVE



To explain what operating systems are, what they do, how they are designed and
constructed. How
the concept of operating systems was developed, what the common
features of operating system are and what are operating system does for an user. To
cover windows 2000 overview.




SYLLABUS



Computer system and operating system overview, overview of computer system
hardware, instruction execution, I/O function, interrupts, memory hierarchy, I/O
communication techniques. Operating systems objectives and function, evaluation of
operating systems
, examples systems.




UNIT II



OBJECTIVE



The process concept and concurrency are at the heart of modern operating systems. To
cover various methods for process scheduling, inter process communication, and also
to cover traditional UNIX systems.





SY
LLABUS



Process description and control, process state, process description, process control,
processes and threads, examples of process description and control.








UNIT III



OBJECTIVE



Principles of concurrency, mutual exclusion, deadlocks and case

studies of unix and
windows 2000 concurrency mechanisms.





SYLLABUS



Concurrency, principles of concurrency, mutual exclusion, software and hardware
approaches, semaphores, monitors, message passing, readers/writers problerm.




UNIT IV



OBJECTIVE



To cover the process and threads symmetric multiprocessing, case studies of windows
2000, Solaris, Linux thread and SMP management.




SYLLABUS



Principles of deadlock, deadlock prevention, detection and avoidance, dining
philosophers problem, example sy
stems.




UNIT V



OBJECTIVE



Deal with classic internal algorithms and structures of storage management. To provide
firm practical understanding of the algorithms used. The properties, advantages and
disadvantages.

Also about file system structures, organization case studies of windows
2000, linux, solaris memory management. Also wi ndows 2000, unix file management.




SYLLABUS



Memory management, memory management requirements, loading programs into main
memory, vi
tual memory, hardware and control structures, OS softwar, examples of
memory management.




UNIT VI



OBJECTIVE



To deal system I/O, including I/O system design, interfaces, internal system structures
and functions also case studies of Unix SUR4 I/O and w
indows 2000 I/O.




SYLLABUS



Uniprocessor scheduling, types of scheduling, scheduling algorithm, I/O management
and disk scheduling, I/O devices, organiazation of I/O function, OS desingn issues,
I/O buffering, disk I/O, disk scheduling polices, exampl
es system.




UNIT VII



OBJECTIVE



To deal security threats and various issue along with windows 200 security. Also
designing of assemblers.




SYLLABUS



File management and security, overview of file management, file organization and
access, file directories, file sharing, record blocking, secondary storage management,
example system.




UNIT VIII



OBJECTIVE



To deal security threats and various issue a
long with windows 200 security. Also
designing of assemblers.




SYLLABUS



Security, security threats, protection, intruders, viruses, trusted systems.



7.4.4.2

GATE SYLLABUS






UNIT I



Not applicable




UNIT II



Processes, synchronization, threads,
inter process, communication




UNIT III



Concurrency




UNIT IV



Deadlock




UNIT V



Memory management and virtual




UNIT VI



CPU scheduling




UNIT VII



File systesm, I/O systems




UNIT VIII



Protection and secuirty.



7.4.4.3

IES SYLLABUS




Not

Applicable.



7.4.5

SUGGESTED BOOKS




TEXT BOOKS


T1

Operating systems, Internal and design principles stallings, 5
t h

En, Pearson
Education/PHI


T2

Operating system principles, Abraham Silberchatz, Peter B. Galvin, Greg Gange 7
t h

En. John Wiley





REFERENCE BOOKS


R1

Operating System, A Design Approach, Crowley, TMH


R2

Modern Operating Systems, Andrew S. Tanenbaum, 2
nd

En, Pearson/PHI.


7.4.6

WEBSITES



1.

www.eecs.mit.edu//MassachusettsInstituteofTechnolgoies


2.

www.cs.stanford.edu/degrees/undergrid/thinking.shtm/


3.

www.cs.stanford.edu (Standford University Califorina)


4.

www.eecs.berkely.edu (University of Californiana
-

Berkeley)


5.

www.cs.emu.edu/educaton/undergraduate/ (carnegic melton university)


6.

www.
cs.unac.edu/ (university of Illinois
-

urbana)


7.

www.eecs.umi.ch.edu/ (university of michigan)


8.

www.ece.utexas.edu/undergrad/ (university of Texas)


9.

www.iitg.ernet.in (IIT Gawahati)


10.

www.awl.com/cseng/books/osc5e


11.

www.bellabs.com/history/un
ix


12.

www.nondto.org/saber/os


13.

www.howstuffworks.com


14.

www.frees.com


15.

www.redhatlinux.com



7.4.7

EXPERTS’ DETAILS




INTERNATIONAL


1.

Mr. Hal Abelson




Email: hal@mit.edu



2.

Mr. Arvind




Email: arvind@mit.edu





NATIONAL


1.

Mr. R. D. Kumar





Email: rdk@cse.iitb.ac.in




2.

Mr. Amitabha Bagchi




Email: bagchi@cse.iitd.ac.in



3.

Mr. Deepak Gupta




Email: deepak@cse.iitk.ac.in




REGIONAL


1.

Mr. T. V. Gopal




Email: gopal@annauniv.edu



2.

Mr. Deepak Gupta




Email: deep
ak@cse.iitk.ac.in



7.4.8

JOURNALS



1.

IEEE transaction on computers



2.

Spectram


3.

Digit



4.

Linux for you



5.

IEEE Computer magzine










7.4.9

FINDINGS AND DEVELO
PMENTS



1.

Practical, Transparent support for super System Implementation,
Juan Navarro,
OSDI’02 5
t h

symposium on OS Design and Operating 2002,


2.

Light weight shared objects in a 64
-
bit architectures, J. Chase, Object oriented
programming systems, Languages and

Applications (OOPSLA), 2001.


3.

Working with Digital informatio
n using on Linux, A R D Prasad, CALIBER 2001
University of Pune, 2001.


4.

A Case for Artificial Intelligence in Library Information Science, A R D Prasad 8
t h

LATLIS conference held at Bangalore, 17
-
19 Jan 1990


5.

A brief introduction of Hyderabad, A R D
Prasad, NACLIN
-
2001 University of Z39.50,
6
t h



9
t h

Nov 2001



7.4.10

SESSION PLAN




Sl. No.

Topics in JNTU Syllabus

Modules and Sub modules

Lecture
No.

Suggested Books

Remarks

UNIT


I

1.

Computer and
operating systems
overview

Introduction to
operating
systems identification and
applications.

L1

T1
-
Ch2


2.

Overview of system
hardware

Computer hardware
instruction execution

L2

T2
-
Ch3,T1
-
Ch2 T1
-
Ch2


3.

Interrupts

Interrupts lifecycle

L3

T1
-
Ch2


4.

I/O communication
techniques

I/O
communication
techniques

L4, L5

R2
-
Ch2


5.

Operating systems,
objective and
functions

Introduction to operating
systems

L6

T1
-
Ch2


6.

Evaluation of
operating systems

Serial systems
Multiprogramming

Timesharing

L7, L8

T1
-
Ch3


7.

Example systems

Example
systems

L9

T1
-
Ch2


UNIT II

8.

Process description
and control

Process status

Model creation termination
of process

L10

T2
-
Ch4, R2
-
Ch5 T1
-
Ch3

GATE

9.

Process states

Five states model

L11

T2
-
Ch4, R2
-
Ch5

GATE

10.

Process description

PCB

L12

T2
-
Ch4,
R2
-
Ch5

GATE

11.

Process control

Process control

L13,
L14

T2
-
Ch4, R2
-
Ch5

GATE

12.

Threads

Process threads

L15

T2
-
Ch4, R2
-
Ch6

GATE

13.

Examples

Examples

L16

T1
-
Ch3


14.

Revision


L17



Sl. No.

Topics in JNTU
Syllabus

Modules and Sub modules

Lecture
No.

Suggested Books

Remarks

UNIT III

30.

Principles of
concurrency

Def of concurrency principles
of concurrency

L18

T2
-
Ch6, T1
-
Ch4

GATE

31.

Mutual exclusion

Mutual Exclusion

L19

T1
-
Ch4, T2
-
Ch6 R2
-
Ch6


32.

Software and
hardware approaches

Software and hardware
approaches

L20

T2
-
Ch6


33.

Semaphores

Semaphores

L21

T1
-
Ch4, T2
-
Ch6


34.

Monitors

Monitors

L22

T1
-
Ch4, T2
-
Ch6


35.

Message passing

Readers/Writers problems

L23

T2
-
Ch6, R2
-
Ch8

T1
-
Ch4


UNIT IV

36.

Principles of deadlock

Deadlock
preventions

Dead lock prevention

L24

T2
-
Ch7, T1
-
Ch5

GATE

37.

Deadlock detection

Dining philosopher’s
problem

Deadlock detection and
avoidance

L25


T2
-
Ch7, T1
-
Ch5

T2
-
Ch6

GATE

Dinning philosopher’s
problem

L26

38.

Example systems

Examples systems

L27

T1
-
Ch5


UNIT V

15.

Introduction to
memory systems

Main memory

Physical memory

L28

T2
-
Ch8, R2
-
Ch10


16.

Loading programs
into main memory

Loading

Linking dynamics and static
loading

L29

T2
-
Ch8, R2
-
Ch10


17.

Virtual memory

Paging, Segmentation

Virtual
memory

L30,
31,32

T2
-
Ch9, R2
-
Ch11

GATE

18.

OS. Software

Page replacement algorithms

L33,34

T2
-
Ch9, R2
-
Ch11

GATE

19.

Hardware and Control
structures

Hardware and control
structures

L35

T2
-
Ch9


20.

OS software examples
of memory
management

OS software

Examples of memory
management

L36

L37

T2
-
Ch9

GATE

21.

Revision

Revision

L38



UNIT VI

22.

Uniprocessor
scheduling

Types of scheduling

L39

T1
-
Ch8, T2
-
Ch5

R2
-
Ch8

GATE

23.

Scheduling algorithms

Types of algorithms

L40,L4
1

T1
-
Ch8, T2
-
Ch5
R2
-
Ch8

GATE

24.

I/O management

I/O management and disk
scheduling

L42

T2
-
Ch13, T1
-
Ch10


25.

I/O devices

I/O devices

L43

T2
-
Ch12


26.

Design issues

OS design issues

L44

T2
-
Ch12, R2
-
Ch15
T1
-
Ch10


27.

I/O buffering

Disk I/O

Disk scheduling
polices

I/O buffering

Disk I/O

Disk scheduling policies

L45

T2
-
Ch13, R2
-
Ch15

GATE

28.

Examples

Examples

L46

T1
-
Ch3


29.

Revision

Revision

L47



Sl. No.

Topics in JNTU Syllabus

Modules and Sub modules

Lecture
No.

Suggested Books

Remarks

UNIT VII

39.

File organization

Security and
file organization
access

L48

T2
-
Ch10, R2
-
Ch17
T1
-
Ch11

GATE

40.

File directories

File directory structures

L49

T2
-
Ch11, R2
-
Ch16
T1
-
Ch11


41.

File sharing

File sharing

L50

T2
-
Ch11, R2
-
Ch16


42.

Record blocking

Record blocking

L51

T2
-
Ch11, T1
-
Ch11
R2
-
Ch16


43.

Secondary storage
management
example systems

Secondary storage
management

L52

T2
-
Ch13, T1
-
Ch11
R2
-
Ch13

GATE

UNIT VIII

44.

Security

Security threats

L53

T2
-
Ch20, T1
-
Ch14

GATE

45.

Protection

Protection from introduction

L54

T2
-
Ch19, T1
-
Ch14

GATE

46.

Viruses

Viruses trusted systems

L55

T2
-
Ch19, T1
-
Ch14



ii
.

T
UTORIAL

Tutorial
No

Unit
No

Title

Salient topics to be discussed

Remarks

Problems

(Q Nos.) covered from
question bank

T1

I

Eval uat i on of oper at i ng
Si gni f i c anc e of oper at i ng

system

system

T2

I

I nput out put
communi cat i on
t echni ques

Conc ept


T3

II

Pr oc es s c ont r ol

Ex ampl es and des c r i pt i on


T4

II

Pr oc es s and t hr eads

Conc ept s and
appl i c at i ons


T5


III

Pr i nc i pl es of c onc ur r enc e

I mpor t anc e of
c onc ur r enc y


T6

III

Moni t or s and s emaphor es

Ef f ec t of c onc ur r enc y


T7

IV

Deadl oc k pr event i on

Ex pl ai n t he t ec hni ques


T8

IV

Di ni ng phi l ops her s
pr obl em

Pr obl em


T9

V

OS s of t war e

Conc ept wi t h exampl es


T10

V

Memor y management
r equi r ement s

Conc ept and appl i cat i ons


T11

VI

Types of s c hedul i ng

Conc ept s and appl i c at i on


T12

VI

Di s k s c hedul i ng pol i c i es

Exampl es


T13

VI I

Fi l e management

Conc ept


T14

VI I

Sec ondar y s t or age
management

Exampl es


T15

VI I I

Sec ur i t y t hr eat s

Conc ept


T16

VI I I

Tr us t ed s y s t em

Exampl es













ii
.

THEORY

7.4.11

STUDENT SEMINAR TOPI
CS



1.

Importance of operating system


2.

Process and threads in operating system


3.

Software and hardware approaches for concurrency


4.

Deadlock and its prevettion with various techniques


5.

Memory management with examples


6.

Sche
duling olgorithms and disk scheduling polies


7.

File sharing and record blocking


8.

Protection and security.



7.4.12

QUESTION BANK


UNIT I


1.


Di erentiate Distributed systems from Multiprocessor systems.

(Feb 08)


2.


Explain about

the various memories hierarchy.

(Feb 08)


3.


Draw and explain program flow of control without and with interrupts.

(Nov 07)


4.

i.

DMA access to main memory is given higher priority than processor access to main memory.
Why?
Explain with an example.


ii.

Explain the characteristics of Two level memories.

(Apr 07)


5.

i.

Describe the basic instruction cycle with example.

(Apr 07, Nov 06)


ii.

What is an Interrupt? Describe the Different types of interrupts.



6.


Describe the Objectives and functions of Operating system. Also explain the different services
provided by the operating system.

(Apr 07, Feb 07)


7.


What is Multiprogramming? Explain the memory hierarchy with reference to the uses, characteristics,
appli
cations and functions.



(Feb 07)



8.


Explain the Operating system as Resource Manager.

(Feb 07)


9.


A major operating system will evolve over time for a number of reasons. What are they?

(Feb 07)


10.


Explain the dierence between the Cache and Main
Memory with the help of its structure and operation.











(Nov, Sep 06)

11


What is OS? Describe the Different types of Operating systems with the examples.

(Nov 06)


12.


With the help of neat block diagram, describe the computer components with an

example

(Nov 06)


13.


Discuss the operating system design hierarchy with an example.
(Sep 06, May 05, Nov 04)


14.


Explain the applications of windows NT Operating System.

(Sep 06, May 05, Nov 04)


15.

.

Explain the Operating system as Resource Manager
.

(Sep 06)


16.


Mention the various registers and their functions udnder the following wo categories



i. User visible registers ii. Control and status registers

(Sep 06)


17.


Describe the basic instruction cycle with example

(Sep 06)


18


What is an Itnerrupt ? Describe the different types of interrupts

(Sep 06)


19.


What are the important properites of I/O organization? Explain the I/O communication
techniques with an example.





(Sep 06)


20.


With the help of neat block diagram,
describe the computer components with an
example.










(May05,03)

21.


A major operating system will evolve over time for a number of reasons. What are
they?

(May 05)


22.


Explain the Multiprogrammed batched system with an example

(May 04)


23



Desc
ribe the features of timesharing systems with an example.

(May 04)


24.


What is Multiprogramming? Explain the memory hierarchy with reference to the uses,


characteristics, applications and functions.

(Nov, May 04)


25.


With the help of simple interrupt
processing block diagram, explain the interrupt
processing with an example.






(Nov 04)


26.


Explain 2
-

level memory hierarchy and 3
-

level hierarchy

(May 03)


27.


Differentaiate between multiuser and multi
-
processing system.


28.


Explain the featu
res of UNIX/LINUX operating system



29.


Which combination of the following features will suffice to characterize an OS as a
multiprogrammed OS? (i) More than one program may be laoded

into main memory at
the same time for execution. (ii) If a program waits for certain events such as I/O,
another program is i mmediatley scheduled for execution. (iii) If the execution of a
program terminates, another program is immediatley scheduled for e
xecution.



i. a

ii. a and b

iii. a and c

iv. a, b and c

(GATE 02)



30.


A processor needs soft ware interrupt to

(GATE 01)


i.

test the interrupt system of the processor


ii.

implement co
-
routines


iii.

obtain system services which need execution of pr
ivileged instructions


iv.

return from subroutine


31.


A multi
-
user, multi
-
processing operating system cannot be implemented on hardware
that does not support







(GATE 99)


i.

Address translation


ii.

DMA for disk transfer


iii.

At least t wo modes of C
PU execution (privileged and non
-
privileged)


iv.

Demand paging


32.


In a resident
-

OS computer, which of the following systems must reside in the main
memory under all situation?






(GATE 98)


i.

Assember



ii.

Linker



iii.

Loader



iv.

Compiler


33.


Which of the following is an example of a spooled device?

(GATE 98)


i.

The terminal used to enter the input data for the C program being executed


ii.

An output device used to print the output of a number of jobs


iii.

The secondary memory device i
n a virtual storage system.


iv.

The swapping area on a disk used by the swapper.


34.


When an interrupt occurs, an operating system

(GATE 97)


i.

ignores the interrupt


ii.

always changes state of interrupted process after processing the interrupt


iii.

always resumes execution of interrupted process after processing the interrupt


iv.

may change state of interrupted process to ‘blocked’ and schedule another process


35.


A part of the system software, which under all circumstances must reside in the mai
n
memory, is



i. text editor ii. assembler iii. linker




iv. Loader v. none of the above

(GATE 93)


36.


Which of the following is an example of spooled device


i.

the terminal u
sed to the input data for a program being executed


ii.

the secondary memory device in a virtual memory system.


iii.

a line printer used to print the output of a number of jobs.

(GATE 92)



UNIT II


1.

i.

Describe various operations on threads.

(Feb 0
8)


ii.

Discuss about threads synchronization.


2.


Discuss the Operating System design hierarchy with an example.

(Feb 08)


3.


What is meant by process pre
-
emption? Explain with examples.

(Feb 08)


4.


What is a process? Explain
di erent process states.

(Feb 08)


5.

i.

Describe various operations on threads.

(Nov 07)


ii.

Discuss about threads synchronization.


6.


Explain the various mechanisms provided by UNIX for inter process communication
and synchronization in
detail.

(Nov 07)


7.


What is a process? Explain di erent process states.

(Nov 07)


8.


What the design characteristics of Message Systems are of inter process communication and
synchronization?



9.


Explain about single threaded and m
ulti threaded process models with suitablediagrams.

(Nov 07)


10.


Explain the following transitions:

(Nov 07)


i.

Blocked ’! Blocked/Suspended.


ii.

Blocked/Suspended ’! Ready/Suspended.


iii.

Ready/Suspended ’! Ready.


11.

i.

Explain the
role of process control block in OS.


ii.

Differentiate the following



i. Process Switching vs Context Switching



ii. Clock interrupt Vs I/O interrupt.

(Apr 07, Feb 07, Nov, Sept 06, May 03)


12.

i.

Explain the reasons for process terminations.


ii.

Describe the single blocked queue and multiple blocked queues with an example.











(Apr 07, Feb 07, Nov 06, May 05, 04)

13.


Discuss about the following:


i.

user
-
level threads


ii.

Kernel
-
level threads


iii.

Multi
-
threadings.





(Feb 07)


14.


Dis
cuss the attributes of the process. Describe the typical elements of process control
Block.










(Sep 06, May 05, Nov 04)

15.


Define the following


i.

Process



ii.

Program


iii.

Process control block



iv.

Process Scheduling.




(Sep 06, M
ay 05, May, Nov 04,03)


16.


What are preemptive and non
-
preemptive scheduling.

(May 04)


17.


Explain busy waiting and blocking wait.

(May 04)


18.


Describe the relationship between threads and Processes with an example.

(May 03)


19.


Write short notes
on the following:

(Nov 03)


i.

Shortest process next.


ii.

Shortest remaining time.



20.


What is meant by process preemption.

(Nov 03)


21.


Discuss briefly about user level threads


22.


Discuss briefly about Kernel level trheads


23.


Explain the
multi
-
threadings and its importance


24.


What is swapping and what is its purpose.


25.


What is the difference between process switching and context switching


26.


What is the difference between an interrupt and a trap.


27.


Describe the single blocked

queue and multiple blocked queues with an example.



28.


Explain the reasons for process terminations.


29


Difference between Clock interrupt Vs I/O interrupt.


30.


Explain the process State Transmission diagram with examples


31.


Discuss about pree
mptive scheduling policies


32.


Explain the Highest response ratio next


33.


Write short notes on Single
-

Server queues with two priorities.


34.


Consider t wo cache organiozation
: the first one is 32 kb 2
-
way set associative with 32
-
byte block size. The second one is of the same size but direct mapped. the size of an
address is 32 bits in both cases. A 2
-
to
-
1 multiplexer has a latency of 0.6 ns while a k
-
bit comparator has a laten
cy of k/10 ns. The hit latency of the set associative
organization is h
1
while that of the direct mapped one is h
2.


i.

The value of h
1
is:



i.2.4 ns



ii.2.3 ns



iii.1.8 ns



iv.1.7 ns



ii.

The value of h
2

is:



i.2.4 ns



ii. 2.3 ns



iii.1.8 ns



iv.
1.7 ns







(GATE 06)


35.


Which of the following actions is/are typically not performed by the operating system
when switching context from process A to process B?


i.

Faster access to memory on an average


ii.

Processes can be given protected address s
paces

(GATE 05)


36.


if (fork()==0)




{ a=a+5;printf(“%d,%d
\
n”,a,&i.;}



else {a
-
5;printf(“%d,%d
\
n”,a,&i.;}



Let u,v be the values printed by the parent process,and x,y be the values printed by the
child process.which one of the following is TRUE?


i.

u
=x+10


ii.

u=x+10 and v!=y


iii.

u+10=x and v=y


iv.

u+10=x and v!=y





(GATE 05)


37.


Consider the following statements with respect to user
-
level threads and kernel
-
supported threads


i.

context switch is faster with kernel supported threads

(GATE 04)


ii.

for user level threads , a system call can block the entire process


iii.

kernel supported threads can be scheduled independently


iv.

user
-
level threads are transparent to the kernel



Which of the above statements are true?


a. ii,iii and iv only

b
. ii and iii only




c. i and iii only


d. i and ii only


38.


When the result of a computation depends on the speed of the processes involved there
is said to be


i.

cycle steating



ii.

rare condition


iii.

a time lock



iv.

a deadlock






(GAT
E 98)


39.


Each process Pi, i = 1 ..... 9 is coded as follows


(GATE 97)



repeat



P (mutex)



{critical section}



v (mutex)



forever



The code for P10 is identical except that it uses v (mutex) in place of P (mutex
). What
is the largest number of processes that can be inside the critical section at any moment.


i. 1


ii. 2


iii. 3


iv. none of above



UNIT III


1.


What is a monitor? Compare it

with Semaphore. Explain in detail a monitor with notify and
broadcast using an example.


(Feb 08)


2.


Define monitor. What are its characteristics?

(Feb 08)


3.


Write the short notes on the following

(Feb 08)


i.

Race Condition


ii.

Process Interaction


4.


Explain the solution for the critical section problem for multiple processes.

(Nov 07)



5.


Explain the following LINUX Kernel concurrency mechanisms

(Nov 07)


i.

Atomic Integer Operations


ii.

Atomic

Bitmap Operations.


6.

i.

What is a semaphore? What are the various operations defined on it?



ii.

What is the di erence between weak semaphore and strong semaphore? Explain.

(Nov 07)


7.

i.

Explain the uses of the following:

(Nov 07)



a.

Event Object



b.

Mutex Object



c.

Semaphore Object



d.

Waitable timer Object.


ii.

Describe about mechanism used by Windows to implement Synchronization of Critical Section
objects.



8.


Bounded Waiting.




(Nov 07)


9.

i.

Wha
t is a monitor? Compare it with semaphore.

(Apr 04, May 04)


ii.

Explain in detail a monitor with signal using an example.



10.

i.

Write the Peterson?s algorithm for the mutual exclusion problem and explain the same


ii.

What is meant by
semaphore? Explain with an example.

(Apr 07)


11.

i.

Explain busy waiting and blocking wait.

(Apr 07, Sep 06, May 05)


ii.

Is busy waiting always less efficient (in terms of using process or time) than a
blocking wait? Explain










12.


Show that
monitors and semaphores have equivalent functionality by


i.

Implementing a monitor using semaphores


ii

Implementing a semaphore using monitors

(Feb 07, Nov 06)


13.


What is message passing? Explain the design characteristics of message systems for inter

process
communication and synchronization.

(Feb 07)


14.


Explain in detail all the steps involved in getting a Dekker’s algorithm.

(Feb 07)


15.


Explain the state of the process Queue for the Readers / Writers problem and get the solution to the
same by

using message
-
passing


(Feb 07, Nov, Sep 06, May 05)


16.


Demonstrate that the following software approaches to mutual exclusion do not depend on elementary
mutual exclusion at the memory access level:


i.

The bakery algorithm


ii.

Peterson’s algorithm
.




(Nov 06)


17.


Explain in detail the message addressing and message format with an example.

(Nov 06)


18.


What are the requirements for mutual exclusion? Explain them in detail.
(Sep 06, May 05)


19.


Explain different conditons of process
interation with respoect to the degree of
awareness, relationship between processes, influence of processes, control problems
(Sep 06)


20.


Explain the various mechanisms provided by UNIX for inter process communication
and synchronization in detail.

(Se
p 06)


21.


What are the principles of concurrency and explain the execution of the concurrent
process with a si mple example.





(May 05, 04)


22.


What is a monitor? Compare it with semaphore. Explain in detail a monitor with signal
using an example.







(May 04)


23.


Three processes share 4 resources units that can be reserved and reused only one at a
time. Each process needs a maximum of 2 units. Show that a deadlock can not occur.
(May 04)


24.


N processes share M resource uits

that can be reserved and released only one at a time.
The maximum need of each process does not exceed M and the sum of all maximum
needs is less than M + N. Show that a dead lock can not occur.


25.


Demonstrate that the following software approaches to
mutual exclusion do not depend
an elementary mutual exclusion at the memory access level.

(May 04)



i. The backery algorithm ii. Peterson’s algorithm.


26.


What design and management issues are raised by the existence of concurrency?

Point
out


how the issues of speed independence can be addressed.

(Nov 04)



27.


How mutual exclusion, hold & wait and circular wait are different from each other?
Explain with the help of examples.





(Nov 04)


28.


Explain how the concurrent processe
s cooperate by sharing and by communication.
(May 04)


29.


What is Semaphore? Define the Binary Semaphore primitives and explain mechanism
with an example







(May 03)


30.

i.

How hold & wait and circular wait the different from each other? Explain wi
th the help
of examples.



ii.

Write an algorithm to detect the occurrence of deadlocks.

(May 03)


31.


What is queuing discipline? Explain with an example the way in which the message
passing can be used to enforce mutual exclusion.

(May 2003)


32.


Expla
in in detail how concurrent process come into conflict with each other when they
are the competing for the use of the same resource.


33.

i.

What are the necessary requirements for mutual exclusion?


ii.

Write an algorithm to detect the occurrence of deadl
ocks.


34.


Write a concurrent program using parbegin
-
parend and semaphores to represent the
prece dence constraints of the statements S1 to S6 as shown in the fig. below





35.


Let m [0] ... m [4] be mutexes (binary semaphores) and P [0] ... P[4] be
processes.
Suppose each process P[i] executes the following:

(GATE 2000)



wait (m [i ]); wait (m [(i + 1) mode 4]);



.........

release (m [ i ]); release (m[(i+1) mode 4 });



This could cause


i.

Thrashing



ii.

Deadlock



iii.

Starvation, but not d
eadlock




iv.

None of the above


36.


A counting semaphore was initialized to 10. The 6 P (wait) operations and 4 V (signal)
operations were complete ed on this semaphore. The resulting value of the semaphore
is


i.

0




ii.

8



iii.

10



iv.

12









(GATE 98)


37.


A critical section is a program segment

(GATE 96)


i.

which should run in a certain specified amount of time


ii.

which avoids deadlocks


iii.

where shared resources are accessed


iv.

which must be enclosed by a pair of semaphore op
erations, P and V


38.


Draw a precedence graph for the following sequential code. The statements are
numbered from S1 to S6







(GATE 1993)



S1

read n



S2

i: = 1



S3

if i > n goto next



S4

a (i) : = i + 1



S5

i : = i + 1



S6

bext : Write a (i)



39.


Consider the following program segment for concurrent processing using semaphore
operator P and V for synchronisation. Draw the precedence graph for the statements S1
to S9 var

(GATE 93)



a,b,c,d,e,f,g,h,i,j,k : semaphore;



being



cobegin




begin

S1; V(i.; V(ii. end;




begin P(i.; S2 V(iii.; V(d) end;




gin P(iii.; S4 V(e); end;




gin P(d); S5 V(f); end;




gin P(e); P(f); S7; V(k) end;




gin P(ii.; S3 V(g); V(h) end;




gin P(g); S6 V(i); end;




gin P(j); P(j); P(k); S9 end;



coend



end;


40.


Consider the following scheme for implementing a critical section in a situation with
three processes pj and pk


(GATE 91)



pi;



repeat



flag[i]:= true;



while flag[j]or flag[k] do



case turn of



j: if flag[j] then



begin



flag[i]:=false;



while turn!= I do skip;



flag [i] : true



end;



k: if flag [k] then



begin



flag [i]:=false,



while turn !=I do skip;



flag[i]:= true



end



end



critical section



if turn=I then turn:=j;



flag[i]:= false



non
-
critical section



until false;


i
.

does the scheme ensure mutual exclusion in the critical section? briefly explain.


ii.

Is there a situation in whi ch a waiting process can never enter the critical section? If
so ,explain and suggest modifications to the code to solve this problem.


41.


Match the following.




(GATE 90)


i.


critical region p. Hoare’s monitor


ii.

Wait/signal



q. Mutual exclusion


iii.

working set



r. Principle of Locality


iv.

Deadlock



s. circular wait


42.


A computer has six tape drives, with n processes competing for them. Each process
may need t wo drives. What is the maximum value of n for the system to be deadlock
free?


i. 6


ii. 5


iii. 4


iv. 3



UNIT IV


1.


Explain about

protection technique of critical section in LINUX.

(Nov 07)


2.


What is deadlock avoidance? Explain process initiation denial and resource allocation denial in detail
with example






(Apr 07, Feb 07, Nov 06)


3


Explain all the strategies involv
ed in deadlock detection and how it is recovered.











(Apr 07, Nov 06, Nov 04)

4.

i.

Three processes share 4 resource units that can be reserved and reused only one at a
time. Each process needs a maximum of 2 units. Show that a dealock cannot occu
r.


ii.

N processes share M units that can be reserved and released only one at a time. The
maximum need of each process does not exceed M and the sum of all maximum needs
is less than M+N. Show that a dead lock cannot occur.

(Apr 07, Sep 06)


5.


What
is dining philosophers problem?

(Feb 07, May 04,03)


6.


Device an algorithm to solve the problem using Semaphore.

(Feb 07, May 04,03)


7.


How mutual exclusion, hold and wait and circular wait are Different from each other? Explain with the
help of
examples.





(Apr 07, Feb 07)


8.


Write an algorithm to detect the occurrence of deadlocks

(Feb 07)


9.


How the deadlocks can be avoided? Explain with the help of necessary algorithms.












(Feb 07, Nov 06, May 03)

10.


How the problem among dini
ng philosophers can be resolved? Suggest a suitable algorithm.

(Nov 06)


11.


Explain the Banker’s alogorithm in detail

(Sep 06)


12.


What are the conditions that must satisfy for deadlock occurrence and explain them.











(Sep 06,May 05, Nov 04)

13.


Is the deadlocks problem preventable? Justify your answer with example and diagram.












(Sep 06,May 05, Nov 04)

14.


Give the conditions for deadlock and explain the methods of preventing deadlock.











(Sep 06,May 05, May 04)

15.


What are t
he principle of deadlock? And explain in detail the two categories of
resources.










(Sep 06,May 05)

16.


Consider the following snaphot of a system. There are no current outstanding queued
unsatisfied requests available





i.

Compute what each proc
ess still might request and display in the coloumns labeled
still needs


ii.

Is this system currently in a safe or unsafe moe ? Why?


iii.

Is this system currenly deadlocked? Why or why not?


iv.

which process, if any, are may become deadlocked?


v.

If a r
equest from p3 arrives for (0,1,0,0), can that request be safety granted
immediately? In what state would immediately grantign that whole request leave the
system? Which process, if any, are may bcome deadlocked if this whole request is
granted immediate
ly?

(Sep 06)


17.


What is Deadlock? Prove that an unsafe state is not deadlock state.

(May 04, 03)


18


Explain the necessary conditions for the deadlock.

(May 04, 03)


19


Explain busy waiting and blocking wait.

(May 03)



20


Is busy waiting always
less efficient (in terms of using process or time) than a
blocking wait? Explain.







(May 03)


21.


Express process initiatition denial and resource allocation denial in detail with
example


22.


Is the deadlock problem preventable? Justify you answer
with example and diagram?



23.


An operating system contains 3 user process each requiring 2 units of resource R. The
mini
-

mum number of units of R such that no deadlocks will ever arise is

(GATE 05)


i. 3

ii. 5

iii. 4

iv. 6


24.


Suppose n processes p1…
pn share m identical resource units ,which can be reserved
and released one at a time. The maxi mum resource requirement of process Pi is sp
where si>0. Which one of the following is a sufficient condition for ensuring that
deadlock does not occur?

(GATE 05
)


i.

for all i ,si<m


ii.

for all i ,si<n


iii.

sigma i=1 to n, si<(m+n)


iv.

sigmai 1 to n si(m*n)


25.


Which of the following is NOT a valid deadlock prevention scheme?

(GATE 2000)


i.

Release all resources before requesting a new resource


ii.

Number

the resources uniquely and never request a lower numbered resource than the
last one requested


iii.

Never request a resource after releasing any resource


iv.

Request and all required resources be allocated before execution


26.


A critical section is a
program segment

(GATE 96)


i.

which should run in a certain specified amount of time


ii.

which avoids deadlocks


iii.

where shared resources are accessed


iv.

which must be enclosed by a pair of semaphore operations, P and V


27.


A solution to the Dining

Philosophers Problem which avoids deadlock is



i.

ensure that all philosophers pick up the left fork before the right fork


ii.

ensure that all philosophers pick up the right fork before the left fork


iii.

ensure that one particular philosopher picks up

the left fork before the right fork, and
that all other philosophers pick up the right fork before the left fork


iv.

none of the above




(GATE 96)


28.


Consider a system having m resources of the same type. These resources are shared by
3 processes A,
B and C, which have peak demands of 3,4 and 6 respectively. for what
value of m deadlock will not occur?



i. 7

ii. 9

iii. 10

iv. 13

v. 15


(GATE 1993)



UNIT V


1.


Explain about address binding for a user program and discuss multi step processing of a

user
program.







(Feb 08)


2.

i.

Cleary explain how, in general a virtual address generated by the CPU is translated into a
physical main address.


ii.

A process contains eight Virtual Pages in disk and is assigned a fixed
allocation of four page frames
in main memory. The following page trace occurs: 1, 0, 2, 2, 2, 7, 6, 7, 0, 1, 2, 0, 3, 0,
4, 5 .

a.

how the successive pages residing in the four frames using the LRU re
-

placement

b.



policy. Compute the hit ratio in main memory. Assume the frames are initially
empty.



b. for FIFO replacement policy.


(NOv 07)



3
.


Explain segmentation scheme for memory management. Give the segmentation hardware.

(Nov 07)


4.

i.

Explain Paging hardware with translation look
-
aside bu er.


ii.

How memory protection can be accomplished in a paged environment? Explain
.

(Nov 07)


5.


Explain various techniques implemented for free space management, discuss with suitable examples.











(Nov 07)

6.


Explain any two techniques for structuring the page table. Discuss with suitable examples.











(Nov 0
7)

7.


Explain paging scheme for memory management, discuss the paging hardware and paging
model.











(Nov 07)

8.


Consider a memory management system with demand paging. There are there processes P1, P2, P3
which have one page of private memory each. Moreover P1and P2 are sharing an array A which fits
entirely into one memory page. Similarly, P2 and P3 are sharing an
array B, which fits into a memory
page.


i.

Let all the data for the processes be located into physical memory. Draw a possible memory allocation
diagram, give the page tables for the three processes.


ii.

Assume that process P1 gets swapped out of memory
entirely. How are the page tables changing.


iii.

Assume that process P1 gets swapped back into memory. Give the page tables

in this situation.












(Apr 07, Feb 07, May 04)

9.

i.

Di erentiate between demand cleaning and pre
-
cleaning.


ii.

What

is the di erence between a resident set and a working set?


iii.

A process references five pages A, B, C, D, and E, in the following order: A; C; B; E; A; B;
E; A; B; C; D; E; Assume the replacement algorithm is first
-
in
-

first
-

out. Find the number of page
transfers during this sequence of references starting with an empty main memory with three page
frames. Repeat for four page frames.

(Apr 07)


10.

i.

Discuss how thrashing can be detected by an Operating System? What can
be done to
alleviate this problem?



(Apr 07, May 04)


ii.

What is the difference between simple paging and virtual memory paging?


iii.

Why is the principle of locality crucial to the use of virtual memory?


iv.

What is accomplished by page buffering?



11.

i.

Discuss the dierences between a pure paging and pure segmentation virtual memory systems. What are
the pros and cons of each scheme?


ii.

What are the three main issues of implementing a virtual memory system?


iii.

Comment on the relative merits of

using a local versus a global page replacement policy.












(Feb 07, Sep 06, May 05, 03)

12.

i.

Explain the process of loading programs into main memory.



ii.

Write in brief on the following memory management techniques comparing their relative str
engths and
weaknesses.



a. Fixed Partitioning



b. Simple Segmentation



c. Virtual Memory Paging



d. Dynamic Partitioning


iii.

Describe the Placement Algorithm.

(Feb 07)


13.

i.

A process has 4 page frame allocated to it. Calculate the number of page faults using following page
replacement algorithms for the reference string4,0,0,0,2,4,2,1,0,3,2.

(Feb 07)



a. MIN (OPT)



b. FIFO



c. LRU



d. Clock


ii.

Explain thrashing in det
ail.



14.

i.

Enumerate the reasons for allowing two or more processes to, all have access to particular region of
memory.


ii.

In a fixed partitioning scheme, what are the advantages of using unequal size partitions?


iii.

What is the dierence between in
ternal and external fragmentation?


iv.

What are the distinctions among logical, relative and physical addresses?

(Nov 06, May 04)


15


Write short notes on the following:


i.

Page Table structure Page Table structure


ii.

Translation look
-
aside buffer.


i
ii.

Segmentation.


iv.

Paging.







(Sep 06, May 05)


16.

i.

Consider a buddy system in which a particular block under the current alloacation has
an address of 011011110000



a. If the block is of size 4 what is the binary address of its buddy



b. If
the block is of size 16, what is the binary address of its buddy


ii.

A virtual address in a paging system is equivalent to a pair (p, w), in which p is a page
number and w is a byte number within the page. Let z be the numbr of bytes in a page.
Find alg
ebraic equation that shows p as function of z and w.



iii.

Why is the capability to relocate a process desirable?



iv.

Why is it not possible to enforce memory protection at compile time

(Sep 06)


17.

i.

Discuss the process of Linking using illustrations


ii.

Write about Linkage Editor.


iii.

Write the steps involved in Load Time Dynamic Linking.


iv.

Write in brief about run time dynamic linking.

(Sep 06, May 05)


18.

i.

Explain the operation of paging and translation look
-
aside buffer using a neat sketc
h.


ii.

Explain the address translation in a paging system using a neat sketch.


iii.

Explain using illustration typical memory management formats.

(May 05)


19.

i.

What is Swapping? Explain the need for swapping.


ii.

Explain the general structure of oper
ating system control tables with an example.
(May 05, 04)


20.

i.

Define memory management.


ii.

Explain in detail the requirements that memory management needs to satisfy.

(May 05)


21.

i.

Consider a dynamic partitioning scheme. Prove that on an average t
he memory contain
half as many holes as segments.

(May 05)


ii.

What are the steps involved in loading a program in memory


iii.

Compare and Contrast the different approaches to loading.


22.

i.

Explain in detail about disk cache performance using frequenc
y based replacement.


ii.

The following equation was suggested both for cache memory and disk cache memory



Ts = Tc + M * TD



Generalize this equation to a memory hierarachy with N levels instead of j ust two
levels.

(May05)


23.

i.

Explain the operation
of paging and translation look
-
aside buffer using a neat sketch.


ii.

Explain the address translation in a paging system using a neat sketch.


iii.

Explain using illustration typical memory management formats.

(May 05)


24.

i.

Assume we have a 36 bit virtu
al address. Each page frame in this pure paging system
is 4K in size. Each page table entry is 4 bytes long.

(May 04)



a. What is the total size in bytes of the page table?


ii.

Assume we implement a two level paging scheme with equal number of bits
rep
resenting a page directory and a page number wi thin each page directory. Each
entry i the page directory also occupies 4 bytes.



a. What is the minimum amount of table space in bytes for supporting a physical
addressable range of 4 MB


25.

i.

Consider a

paged logical address space (composed of 32 pages of 2 Kbytes each)
mapped into a 1 Mbytes physical memory space.


(May 04)



a. What is the format of the processor’s logical address.



b. What is the length and width of the page table (disregarding the

access rights bit).



c. What is the effect on the page table if the physical memory space is reduced by
half.


ii.

Discuss the hardware support requirement for the inverted page table structure. How
does this approach affect sharing.


26.


Describe the
following:



(May 04)


i.

Virtual Memory


ii.

Cache Memory


iii.

Auxiliary Memory.


27.

i.

What elements are typically found in a page table entry? Briefly define each element.


ii.

What is the purpose of translation look aside buffer?

(Nov 04)



28
.


What is the difference between resident set management and page replacement policy?
(Nov 04)


29.


Discuss in detail the alternative page fetch policies.

(Nov 03)


30

i.

What is the relationship between FIFO and Clock page replacement algorithm.


ii.

Define pre
-
cleaning.




(Nov 03)


31


Explain the operation of paging and translation look
-
aside buffer using a neat sketch.
(May 03)


32.


Explain the address translation in a paging system using a neat sketch.

(May 03)


33.


Explain using illustrations t
ypical memory management formats.

(May 03)


34.


A Computer system supports 32
-
bit virtual addresses as well as 32
-
bit physical
addresses. Since the virtual address space is of the same size as the physical address
space, the operating system designers dec
ide to get rid of the virtual memory entirely.
which one of the following is true?


i.

Efficient implementation of multi
-
user support is no longer possible


ii.

The processor cache organization can be made efficient now


iii.

Hardwarw support for memory ma
nagement is no longer needed


iv.

CPU scheduling can be made efficient now

(GATE 06)

35.


A CPU has a cache with block size 64 bytes. The main memory has
k
banks, each bank
being
c
bytes wide. Consecutive
c
-

bytes chunks are mapped on consecutive banks
with wrap
-
around. All the
k

banks can be accessed in parallel, but t wo accesses to the
same bank must be seralized. A cache block access may invlove multiple iterators of
parallel bank accesses depending on th
e amount of data obtained by accessing all the
k
banks in parallel. Each iteration requiresdecoding the bank numbers to be accessed in
parallel and this takes k/2 ns. The latency of one bank access is 80 ns. If
c
= 2 and
k
=
24, the latency of retrieving
a cache block starting at address zero from main memory
is:



a) 92 ns b) 104 ns c) 172 ns d) 184 ns

(GATE 06)


36.


A CPU generates 32
-
bit virtual addresses. The is 4 kb. The processor has a translation
look
-
aside buffe
r (TLB) which can hold a total of 128 page table entries and is 4
-
way
set associative. The minimum size of the TLB tag is:



i. 11 bits ii. 13 bits iii. 15 bits iv. 20 bits

(GATE 06)


37.


What is the swap space in the d
isk used for

(GATE 05)


i.

saving temporary html pages


ii.

saving process data


iii.

storing the super block


iv.

storing device drivers


38.


Increasing the RAM of a computer typically improves performance because

(GATE 05)


i.

virtual memory increases


ii.

Larger RAMs are faster


iii.

Fewer page faults occur


iv.

Fewer segmentation faults occur


39.


Consider an operating system capable of loading and executing a single sequential user
process at a time. The disk head scheduling algorithm used is First c
ome First
Serve(FCFS) if FCFS is replaced by Shorest Seek Time First (SSTF) clai med by the
vendor to give 50% better benchmark results ,what is the expected i mprovement in the
I/o performance of user programs?

(GATE 04)



i. 50%


ii. 40%


iii. 25%

iv. 0%


40


The maximum no of page frames that must be allocated to a running process in a
virtual memory environment is determined by


(GATE 04)


i.

the instruction set architecture

ii. page size


iii.

physical memory size



iv. number of processes in
memory


41.


In a system with 32 bit virtual addresses and 1 KB page size, use of one
-
level page t
able for virtual to physical address translation is not practical because of

(GATE 03)


i.

the large amount of internal fragmentation


ii.

the large amount o
f external fragmentation


iii.

the large memory overhead in maintaining page tables


iv.

the large computation overhead in the translation process


42.


Suppose a process has only the following pages in its virtual address space: two
contiguous code pages
starting at virtual address 0x00000000, tow contiguous data
pages starting at virtual address 0x00400000, and a stack page starting at virtual
address 0xFFFFF000. The amount of memory required for storing the page tables of
this process is

(GATE 03)


i. 1.
5 ns


ii. 2 ns


iii. 16 KB


iv. 20 KB



43.


The optimal page replacement algorithm will select the page that

(GATE 02)


i.

Has not been used for the longest ti me in the past.


ii.

Will not be used for the longest time in the future.


iii.

Has been used least number of times.


iv.

Has been used most number of times.


44.


Consider a virtual memory system with FIFO page replacement policy. For an arbitrary
page access pattern, increasing the number of page frames in main memory will
(GATE 01)


i.

always decrease the number of page faults


ii.

always increase the number of page faults


iii.

sometimes increase the number of page faults


iv.

never affect the number of page faults.


45.


Which of the following requires a device driver?

(GATE 01)


i.


Register

ii. Cache



iii. Main memory iv. Disk



46.


Consider a machine with 64 MB physical memory and a 32
-

bit virtual address space.
If the page size is 4 KB, what is the approximate size of the page table?

(GATE 01)


i.

16 MB


ii. 8 MB


iii. 2 MB iv. 24 MB


47.


Suppose the time to service a page fault is on the average 10 milliseconds, while a
memory access takes 1 microsecond. Then a 99.99% hit ratio results in average
memory access time of


i. 1.9999 millise
conds


ii. 1 millisecond


(GATE 2000)


iii. 9.999 microseconds

iv. 1.9999 microseconds


48.


Thrashing






(GATE 97)


i.

reduces page I/O


ii.

decreases the degree of multiprogramming


iii.

implies excessive page I/O


iv.

improves the system performance


49.


Dirty bit for a page in a page table

(GATE 97)


i.

helps avoid unnecessary writes on a paging device


ii.

helps maintain LRU in format ion


iii.

allows only read on a page


iv.

none of the above.


50.


A 1000 Kbyte memory is managed using variable pa
rtitions but to compaction. It
currently has t wo partitions of sizes 200 Kbytes and 260 Kbytes respectively. The
smallest allocation request in Kbytes that could be denied is for

(GATE 96)


i. 151

ii. 181

iii. 231

d. 541


51.


In a paged segmented scheme o
f memory management, the segment table itself must
have a page table because





(GATE 95)


i.

the segment table is often too large to fit in one page


ii.

each segment is spread over a number of pages


iii.

segment tables point to page table and not to t
he physical locations of the segment


iv.

the processor’s description base register points to a page table.


52.


In a virtual memory system the address space specified by the address lines of the CUP
must be .... than the physical memory size and ..... th
an the secondary storage size.
(GATE 95)


i. smaller, smaller


ii. smaller, larger



iii. larger, smaller


iv. larger, larger


53.


The address sequence generated by tracing a particular program executing in a pure
demand paging system wi th 100
records per page with 1 free main memory frame is
recorded as follows. What is the number of page faults?

(GATE 95)



0100, 0200, 0430, 0499, 0510, 0530, 0560, 0120, 0220, 0240, 0260, 0320, 0370


i. 13


ii. 8


iii. 7


iv. 10


54.


A computer installation
has 1000 k of main memory. The jobs arrive and finish in the
following sequence




(GATE 95)



Job 1 requiring 200 k arrives



Job 2 requiring 350 k arrives



Job 3 requiring 300 k arrives



Job 1 Finishes



Job 4 requiring 120 k arrives



Job 5 requiring
150 k arrives



Job 6 requiring 80 k arrives


i.

Draw the memory allocation table using Best Fit and First fit algorithms.


ii.

Which algorithm performs better for this sequence?


55.


A memory page containing a heavily used variable that was initialized v
ery early and
is in constant use is removed when




(GATE 94)


i.

LRU page replacement algorithm is used


ii.

FIFO page replacement algorithm is used


iii.

LFU page replacement algorithm is used


iv.

None of the above.


56.


In the three
-
level memory hiera
rchy shown in the following table, pi denotes the
probability that an access request will refer to Mi

(GATE 93)



Hierarchy Access Probability of Page Transfer



Level (Mi)

Time (ti)


access (pi) time (Ti)



M1



10
-
6



0.99000 0.001 sec



M2



10
-
5



0.00998 0.1 sec



M3



10
-
4



0.00002
-


50.


The following page addresses, in the given sequence, were generated by a program:



1 2

3 4

1 3

5 2

1 5

4 3

2 3



(GATE 93)



This program is run on a demand paged
virtual memory system, with main memory
size equal to 4 pages. Indicate the page references for which page faults occur for the
following page replacement algorithms:


i. LRU


ii. FIFO



Assume that the main memory is empty initially


51


Match the followi
ng.





(GATE 91)


i.

Buddy system


p.

Run
-
ti me type specification


ii.

Interpretation


q.

segmentation


iii.

Pointer type




r.

Memory allocation


iv.

virtual memory


s.

Garbage collection


52.


Under paged memory management scheme ,simple l
ock and key memory protection
arrangement may still be required if the ………processors donot have address mapping
hardware.

(GATE 90)



UNIT VI


1.

i.

Discuss about N
-

step
-

SCAN policy for disk scheduling.

(Nov 07)


ii.

Explain how double bu erin
g improves the performance than a single bu er for I/O.


iii.

Di erentiate between logical I/O and device I/O.



2.

i.

Explain about the key scheduling criteria.


ii.

Give a detail note on short
-
term scheduling.

(Nov 07)


3.

i.

What are preemptive and non
-
preemptive scheduling policies?



ii.

Describe non
-
preemptive scheduling policies

(Apr 07, Feb 07, Nov 06, Nov, May 04)




4.

i.

Discuss about various criteria used for short
-
term scheduling

(Apr 07, Feb 07, Nov 06


ii.

Discuss
about fair share scheduling method



5.


Describe about various disk performance parameters?

(Nov 06)



6.


We noted that successive requests are likely to be from the same cylinder. what does this imply about
the expected performance of the FCFS and SSTF

disk scheduling algorithms.

(Nov 06)


7.

i.

Explain in detail about disk cache performance using frequency based replacement.


ii.

The following equation was suggested both for cache memory and disk cache memory



Ts = Tc + M * TD




Generalize this equat
ion to a memory hierarachy with N levels instead of just two levels

(Nov 06)


8
.


What are the criteria based on which scheduling policies are evaluated.
(Sep 06, May 03)


9.


Describe round robbin and feedback scheduling policies.

(Sep 06, May 03)


10.


Which type of process is generally favoured by a multi
-
level feed back queuing
scheduler, a processor bound process or an I/O bound process? Briefly explain why?


11.


Consider a variation of round robin that we will call priority round
-
robin. In priority
round
-
robin each process has a priority in the range of 1 to 10. When a process is
given a time slice the length of quantum is basic constant (say 50ms) times the priority
of the job. Compare this system with an ordinary priority system.

(Sep 06, May 05)


12.


Write short notes on Random disk scheduling

(Nov 04, May 03)


13.


Write short notes on the following



i.

Priority disk scheduling


ii.

Disk Cache.





(Nov 04, May 03)


14.


Discuss about direct memory access.

(Nov 04)


15.


With neat diagram exp
lain I/O organization model.

(Nov 04)


16.


Describe various short term scheduling policies.

(Nov 04)


17.


What are the important properties of I/O organization? Explain the I/O communication
techniques with an example






(Nov 03)


18.


Differentiate be
tween DMA Vs Interrupt driven I/O

(Nov 03)


19.


Differentiate between programmed I/O Vs Memory Mapped I/O.

(Nov 03)


20.



What are preemtive and non
-
preemptive scheduling.

(May 03)



21.



Discuss about preemptive scheduling policies.

(May 03)



22.


Explain the applications of Windows NT Operating System.

(May 03)


23.


Consider three CPU
-
intensive processes, which require 10, 20 and 30 ti me units and
arrive at ti mes 0, 2 and 6, respectively. How many context switches are needed if the
operating syste
m implements a shortest remaining time first scheduling algorithm? Do
not count the context switches at time zero and at the end.



i. 1 ii. 2 iii. 3 iv. 4


(GATE 06)


24.


Consider three processes (process id 0, 1, 2 respectively) w
ith compute time burts 2, 4
and 8 time units. All processes arrive at time zero. Consider the longest remaining
time first (LRTF) scheduling algorithm. In LRTF ties are broken by giving priorty to
the process to the lowest process id. The average turnaroun
d time is



i. 13 units ii. 14 units iii. 15 units iv. 16 units

(GATE 06)


25.


Consider three processes, all ariving at time zero, with total execution time of 10, 20
and 30 units respectively. Each process spends the first 20% of exe
cution time doing
I/O, the mnext 70% of the time doing computation, and the last 10% of time doing I/O
again. The opeerating system uses a shortest remaining compute time first scheduling
alogarithm and schedules a new process either when the running proce
ss gets blocked
on I/O or when the running process finishes its compute burts assume that all I/O
operations can be overlapped as much as possible for what % of time does the CPU
remain idle?



i. 0% ii. 10.6% iii. 30.0% iv. 89.4%

(GA
TE 06)


26.


Normally user programs are prevented from handling I/o directly by I/O instructions in
them .For CPU s having explicit I/O instructions ,such I/O protection is ensured by
having the I/O instructions privileged. In a CPU with memory mapped I/O
there is no
explicit I/O instruction.which one of the following is true for a CPU with memory
mapped I/O?

(GATE 05)


i.

I/O protection is ensured by operating system routines


ii.

I/O protection is ensured by a hardware trap


iii.

I/O protection is ensured

during system configuration


iv.

I/O protection is not possible


27.


Consider the following set of processes, with the arrival times and the CPU burst times
given in milliseconds.






(GATE 04)



Process


Arrival time

Burst time




P1




0


5




P2




1


3



P3




2


3




P4




4


1


28.


A uni
-
processor computer system only has two processes, both of which alternate 10ms
CPU bursts ith 90 ms I/O bursts. Both the processes were created at nearly the same
time. The I/ O of both processes can
proceed in parallel. Which of the following
scheduling strategies will result in the least CPU utilization (over a long period of
time) for this system.

(GATE 03)


i.

First come first served scheduling


ii.

Shortest remaining time first scheduling


iii.

St
atic priority scheduling with different priorities for the t wo processes


iv.

Round robin scheduling with a time quantum of 5 ms.


29.


Which of the following scheduling algorithms is non
-
preemptive?

(GATE 02)


i.

Round Robin




ii. First
-
in First
-

Out


iii.

Multilevel Queue Scheduling
iv. Multilevel Queue Scheduling with Feedback


30.


To evaluate an expression without any embedded function calls

(GATE 02)


i.

One stack is enough


ii.

Two stacks are needed


iii.

As many stacks as the h
eight of the expression tree are needed


iv.

A Turing machine is needed in the general case.


31.


Consider a set of n tasks with known runtimes r1, r2... rn to be run on a uniprocessor
machine. Which of the following processor scheduling algorithms will r
esult in the
maximum throughput?


i.

Round
-
Robin




ii. Shortest
-
Job
-
First


(GATE 01)


iii.

Highest
-
Response
-
Ratio
-
Next

iv. First
-
come
-
first
-
served


32.


Listed below are some operating system abstractions (in the left column) and the
hardware compo
nents (in the right column)?

(GATE 99)


i.

Thread



1. Interrupt


ii.

Virtual address space


2. Memory


iii.

File system



3. CPU


iv.

Signal



4. Disk


1.

(A)
-
2, (B)
-
4, (C)
-
3, (D)
-
1


2. (A)
-

1, (B)
-
2, (C)
-
3, (D)
-
4


3.

(A)
-
3, (B)
-
2, (C)
-
4, (D)
-
1


4.

(A)
-
4, (B)
-
1, (C)
-
2, (D)
-
3.


33.


Which of the following disk scheduling strategies is likely to give the best through
put?


i. Farthest cylinder next


ii. Nearest cylinder next


iii. First come first served


iv. Elevator algorithm.


34.


Raid config
urations of disks are used to provide

(GATE 99)


i. Fault
-

tolerance

ii. High speed


iii. High data density

iv. None of the above


35.


Calculate the total time required to read 35 sectors on a 2 sided floppy disk. Assume
that each track has 8 sectors

and t he track to track step time is 8 milliseconds. The
first sector to be read is sector 3 on track 10. Assume that the disketter is soft sectored
and the controller has a 1 sector buffer. The diskette spins at 300 RPM and initially,
the head is on trac
k 10.

(GATE 98)


36.


The correct matching for the following pairs is

(GATE 97)


i.

DMA I/O



1. High speed RAM


ii.

Cache




2. Disk


iii.

Interrupt I/O



3. Printer


iv.

Condition Code Register

4. ALU



a.

A
-

4, B
-

3, C
-
1, D
-
2

b.

A
-
2, B
-
1, C
-
3, D
-
4.



c.

A
-
4, B
-
3, C
-
2, D
-
1


d.

A
-
2, B
-
3, C
-
4, D
-
1


37.


I/O redirection





(GATE 97)


i.

implies changing the name of a file


ii.

can be employed to use an existing file as input file for a program


iii.

implies connection2 programs through a pipe


iv.

none

of the above.


38.


The sequence .. is an optimal non preemptive scheduling sequence for the following
jobs which leaves the CPU idle for .... unit (s) of time.

(GATE 96)


Job

Arrival Time

Burst Time



1

0.0


9


2

0.6


5


3

1.0


1


i. {3,2,1},1

ii. {2
, 13}, 0

iii. {3,2,1}, 0

d. {1,2,3}, 5


39.


Four jobs to be executed on a single processor system arrive at time 0+ in the order
A,B,C,D. Their burst CPU time requirements are 4,1,8 1 time units respectively. The
completion time of a A under round robin
scheduling with time slice of one time unmit
is

(GATE 96)


i. 10


ii. 4


iii. 8


iv. 9


40.


Which scheduling policy is most suitable for a time
-
shared operating system?
(GATE 95)


i. Shortest Job First

ii. Round Robin



iii. First Come First Serve


iv.
Elevator


41.


Assume that the following jobs are the be executed on a single processor system
(GATE 93)



Job Id

CPU Burst time




p


4




q


1





r


8





s


1





t


2




The jobs are assumed to have arrived at time 0+ and in the order p,q,r,s,t. Calculate the
departure time (completion time) for job p if scheduling is round robin with time slice
1.



i. 4


ii. 10

iii. 11

iv. 12 v. None of the above


42.


The hi
ghest response ratio next scheduling policy favours ……jobs,but it also li mits
the waiting time of ………jobs.




(GATE 90)



UNIT VII


1.

i.

Explain file system soft ware architecture.



ii.

What are the important criteria in choosing a file organization.
(
Apr 07, Sep 06, May 05,03)


2.


Write about


i.

Free space management


ii.

Reliability of a file allocation

(Apr 07, Sep 06, May 04)


3.

i.

What do you understand by a file directory?


ii.

Explain briefly the information elements of a file directory


iii.

Explain what is tree
-
structured directory?

(Apr 07, Feb 07, Nov 06, 04)


4.

i.

What are the various types of operations that may be performed on the directory.



ii.

What are the various access rights that can be assigned to a particular user for a
part
icular file?



iii.

Explain different methods of record blocking.

(Sep 06, May 05, Nov 03)


5.

i.

Explain in detail the four terms field, record file and database with respect to files


ii.

List the objectives and the requirements for a file managemetn

system

(Sep 06)



6.

i.

What are preallocation, dynamic allocation, portion size w.r.t secondary storage
management?



ii.

Describe various file allocation methods.

(Sep 06, May 05, 04)


7.


Explain the file and sequential file organization.

(May 05, Nov

03)


8.


Write short notes on:



(Mar 05, 03)


i.

Sequential file


ii.

Indexed file


iii.

Indexed sequential file


iv.

Direct file.



9.


Explain user
-
oriented access control.

(May 05, Nov 03)


10.


Explain file system soft ware architecture

(May

05, 04, Nov 03)


11.


Explain the functions of a file management system with a diagram

(May 05, 04)


12.


How resources of a computer system protected?

(May 05, 04)


13.


Explain data
-
oriented access control.

(May 05, Nov 03)


14.


Explain in detail the
four terms field, record, file and database with respect to files.
(Nov 04)


15.


List the objectives and the requirements for a file management system.

(Nov 04)


16.


What are the various types of operations that may be performed on the directory.
(May
04)



17.


What are the various access rights that can be assigned to a particular user for a
particular file?











(May 04)

18.


Explain different methods of record blocking.

(May 04)


19.


Explain briefly the file organization in UNIX system V.

(Nov

03)


20.


What are the important criteria in choosing a file organization

(Nov 03)


21.


Using a larger block size in a fixed block size file system leads to

(GATE 03)


i.

better disk throughput but poorer disk space utilization


ii.

better disk throughpu
t and better disk space utilization


iii.

poorer disk throughput but better disk space utilization


iv.

poorer disk throughput and poorer disk space utilization


22.


In the index allocation scheme of blocks to a file, the maximum possible size of the
file

depends on


i.

the size of the blocks, and the size of the address of the blocks.

(GATE 02)


ii.

the number of blocks used for the index, and the size of the blocks.


iii.

the size of the blocks, the number of blocks used for the index, and the size of t
he
address of the blocks.


iv.

None of the above.


23.


Which of the following is an example of spooled device?

(GATE 96)


i.

A line printer used to print the output of a number of jobs


ii.

A terminal used to enter input data to a running program.


iii.

A

secondary storage device in a virtual memory system


iv.

A graphic display device.


24.


The correct matching of the following pairs is

(GATE 96)


A. Activation record

1. Linking loader


B. Location counter

2. Garbage collection


C. Reference counts

3.
Subroutine call


D. Address relocation

4. Assembler


i. A
-
3, B
-
4, C
-
1, D
-
2

ii. A
-
4, B
-
3, C
-
1, D
-
2


iii. A
-
4, B
-
3, C
-
2, D
-
1

d. A
-
3, B
-
4, C
-
2, D
-
1


25.


For the daisy chain scheme of connecting I/I devices, which of the following
statements is true?


i.

It g
ives non
-
uniform priority to various devices.

(GATE 96)


ii.

It gives uniform priority to all devices.


iii.

It is only useful for connecting slow devices to a processor device.


iv.

It requires a separate interrupt pin on the processor for each device.


2
6.


If the overhead for formatting a disk is 96 bytes for 4000 byte sectormz

(GATE 95)


i.

Computer the unformatted capacity of the disk for the following parameters:



Number diameter of the disk : 8



Outer diameter of the disk : 12 cm



Inner diameter
of the disk : 4 cm



Inter track space : 0.1 mm



Number of sectors per track : 20


ii.

If the disk in (i) is rotating at 3600 rpm, determine the effective data transfer rate
which is


defined as the number of bytes transferred per second bet ween disk
and
memory.


27.


The head of a moving head disk with 100 tracks numbered 0 to 99 is currently serving
a request at rack 55. If the queue of requests kept in FIFO order is

(GATE 95)



10, 70, 75, 26, 65



which of the t wo disk scheduling algorithms FCFS (F
irst Come first Served) and SSTF



(Shortest Seek time First) will require less head movement? Find the total head
movement for each of the algorithms.


28.


The root directory of a disk should be placed

(GATE 93)


i.

at a fixed address in main memory



i
i.

at a fixed location on the disk


iii.

anywhere on the disk


iv.

at a fix location on the system disk


v.

anywhere on the system disk.


29.


An ISAM (index sequential) file consists of records of size 64 bytes each, including
key field of size 14 bytes.
An address of a disk block takes 2 bytes. If the disk block
size is 512 bytes and there are 16 K records, compute the size of the data and index
areas in terms of number of blocks. How many levels of tree do you have for the
index?

(GATE 93)


30.


Write sh
ort answers to the following:

(GATE 92)



Which of the following macros can put a macro assembler into an infinite loop?


.MACRI M1, X

. MACRO M2,X


..IF EQ, X

.IF EQ, X


M1 X +1M2 X


.ENDC

.ENDC


.IF NE, X .IF NE,X


WORD X .WORD X + 1


.END C .ENDC


.ENDM

.ENDM



Give an example of a call that does so.


31.


A certain moving arm disk storage, with one head, has the following specifications.



Number of tracks / recording surface = 200

(GATE 92)



Disk rotation speed = 2400 rpm



Track storage capacity = 62
,500 bits



The average latency of this device is P msec and the data transfer rate is Q bits / sec.



Write the value of P and Q



UNIT VIII


1.

i.

Discuss the three options available in Windows 2000 for requesting access.


ii.

Describe the ge
neric access of Windows 2000.


iii.

How is the AES expected to be an improvement over triple DES?

(Feb 08)


2.

i.

What are the various classes of intruders?


ii.

Discuss about intrusion techniques.

(Apr 07)


3.


What do you unders
tand by Trusted systems? Draw a figure of reference monitor concept and explain.










(Feb 07, Nov,
Sep 06, May 03
)

4.


Write notes on


i.

intrusion detection


ii.

password protection




(Apr 07, Feb 07, Sep 06)


5.


Write short notes on :


i.

Viruses


ii.

Worms


iii.

Logic bomb


iv.

Trap door






(Sep 06, May 05,May, Nov 03)


6.


Write short notes on:


i.

Trojan Horse defense


ii.

Trojan horses

(Sep 06, May 05)


7.


How resources of a computer system protected?

(Sep 06)



8.


Exp
lain user
-
oriented access control

(Sep 06)


9.


Explain data oriented access control

(Sep 06)


10.


What do you understand by Trusted systems? Draw a figure of reference monitor
concept and explain.







(Sep 06)


11.


Discuss about security implementati
on by pass
-
word protection.

(May 03)


12.


Who are the various classes of intruders.

(Nov, May 04)



13.


Discuss about intrusion techniques.

(Nov, May 04)


14.


Explain the nature of viruses.

(May 04)


15.


Discuss about various types of viruses.

(May 04)



16.


Describe the anti
-
virus approaches.

(May 04)


17.


What are the security requirements of a computer and network.

(May 03)



18.


Explain different types of the threats

(May 03)


19.


Explain the computer system assets.

(May 03)


20.


Draw a figure

of reference monitor concept and explain



21.


What is security? How it is achieved in todays OS


22.


What is protection? Explain in terms of OS


23.


Explain the UNIX operating security


24.

Define different techniques to overcome from security proble
ms