4.3 MOSFET Circuits at DC • We study a number of design and ...

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7 Οκτ 2013 (πριν από 4 χρόνια και 1 μήνα)

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Dr. Tamer ElBatt
4.3 MOSFET Circuits at DC
•We study a number of design and analysis examples
of circuits with
DC
voltages and currents only
•In the following examples, we will neglect the
Channel Length Modulation effect, i.e.
λ= 0
•Recall that: VOV
= V
GS
V
t
-For NMOS transistors: Vt
and VOV
are +ve
-For PMOS transistors: Vt
and VOV
are -ve
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith2
4.3 MOSFET Circuits at DC
Example 4.2:
Design the circuit shown so that
the transistor operates at ID
= 0.4 mAand
VD
= +0.5 V. The 0MOS transistor has V
t
= 0.7 V,
µn
Cox
= 100 µA/V
2, L= 1 µm, and W= 32 µm.
In Which Region Does the
0MOS Operate?
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith3
Example 4.3:
Design the circuit shown to obtain a
Current ID
of 80 µA. Find the value required for R
and find the DC voltage VD. Let the 0MOS transistor
have V
t
= 0.6 V, µnCox
= 200 µA/V
2, L= 0.8 µm,
and W= 4 µm.
MOSFET Circuits at DC
cont.
In Which Region Does the
0MOS Operate?
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith4
Exercise:
From the previous example, let the voltage
V
D
be applied to the gate of another transistor Q2
as
shown in the Figure below. Assume that Q2
is identical
to Q1. Find the drain current and voltage of Q
2
.
MOSFET Circuits at DC
cont.
In Which Region Does Q
2
Operate?
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith5
Example 4.4:
Design the circuit in the Figure shown to establish a
drain voltage of 0.1 V. What is the effective resistance between
drain and source at this operating point? Let Vt
= 1 V and
k’
n(W/L)= 1 mA/V
2
MOSFET Circuits at DC
cont.
In Which Region Does the
0MOS Operate?
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith6
Example 4.5:
Analyze the circuit shown in (a) below to
determine the voltages at all nodes and the currents through
all the branches. Let Vt
= 1 V and k’
n(W/L)= 1 mA/V
2.
MOSFET Circuits at DC
cont.
In Which Region Does the 0MOS Operate?
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith7
Example 4.6:
Design the circuit below so that the transistor
operates in saturation with ID
= 0.5 mAand VD
= +3 V. Let the
PMOS transistor have Vt
= >1 V and k’
p(W/L)= 1 mA/V
2.
What is the largest value that RD
can have while
maintaining saturation>region operation?
MOSFET Circuits at DC
cont.
S
D
G
Dr. Tamer ElBatt
•We use MOSFET in the design of amplifier circuits since they
act as a
voltage>controlled current source
in the Saturation
region
-
i.e. Changes in v
GS
gives rise to changes in iD

How to achieve
Linear Amplification
? i.e. an amplifier whose
output signal (i.e. the Drain current
iD)
islinearly related to the
input signal (i.e
vGS
)
>We’ll have to find a way around the highly non-linear (square-law)
relationship of iD
to vGS
:
4.4 The MOSFET as an Amplifier and as a Switch
[
]
2'
)(
2
1
tGSnD
Vv
L
W
ki−=
Dr. Tamer ElBatt
•The technique we use to obtain linear amplification out of a
fundamentally non>linear device is called
DC biasing
-Two Steps:
1. Bias the MOSFET to operate at a certain DC voltage VGS
and
corresponding ID
and then,
2. Superimpose a small AC signal to be amplified vgs
, on top of the DC
bias voltage VGS
DC Biasing is a Fundamental Step towards designing a
Linear MOSFET Amplifier
Before we study the Small>signal operation of the MOSFET
Amplifier, we need to understand its Large>signal operation
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith10
Large>Signal OperationCommon Source (CS) (grounded source) Amplifier •Called Common Sourcesince the
grounded source is common to both
the input port (between G and S) and
the output port (between D and S) •
Changes in vl
= vGS
, causes changes in
iD
and we use a resistor RD
to get an
output voltage vo:
vo
= v
DS
= V
DD
–R
D
iD
•A DC power supply VDD
is needed to
turn the MOSFET on and to supply the
necessary power for its operation
Voltage Amplifier
Dr. Tamer ElBatt
•Governed by the intersection of the MOSFET iD-vDS
characteristic
and the Load Lineimposed by connecting the drain to VDD
via RD
•For any given vl
(=vGS
), we locate the corresponding iD
v
DS
curve and
find vo
from the point of intersection of this curve with the load line
•As vl=v
GS
is increased, the operating point slides on the load line
from point A (cutoff), through Saturation, to point C (Triode)
Large>Signal Operation
cont.
VDD
/R
D
vDS
= v
GS
>V
t
vGS
= V
t
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith12
The Transfer Characteristics –Graphical Derivation
SWITCH O0
SWITCH OFF
Operation as a Switch
•Operate the MOSFET at the
Extreme points of the Transfer
Curve•vl
< V
t
:switch is turned off and
vo
= V
DD
(operate between X
and A)
•vl
= V
DD
: switch is turned on
and vo
is very small (operate at
point C)
MOSFET Operates as a
“Digital Logic Inverter”
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith13
The Transfer Characteristics –Graphical Derivation
Operation as a Linear Amplifier
•We make use of the Saturation-
mode segment of the curve (A
Through B)
•The MOSFET is biased
somewhere in the middle, e.g. point Q•The AC signal to be amplified is
then superimposed on the DC
Voltage VlQ
•By keeping vi
sufficiently small,
we restrict operation to the almost
linear region between A and B•
Gain (A
v):
lQl
Vv
l
o
v
dv
dv
A
=
=
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith14
The Transfer Characteristics –Graphical Derivation
Operation as a Linear Amplifier
•VDSQ
should be of such value
to allow for the required output
signal swing•VDSQ
should be lower than VDD
by sufficient amount to allow for the positive peaks of the output
signal (sufficient headroom)
•VDSQ
should also be away from
the boundary of the Triode region
(point B) to allow for negative peaks (sufficient legroom)
Dr. Tamer ElBatt
Microelectronic Circuits -Fifth Edition Sedra/Smith15
How to Bias a MOSFET Amplifier?
•Bias Point Q1: does not leave sufficient room for positive
signal swing at the drain (too close to VDD)
•Bias Point Q2: too close to the boundary of the Triode region
and might not allow for sufficient negative signal swing
Dr. Tamer ElBatt
Analytical Expressions for the Transfer Characteristics

Derive vo
= f(v
l)
•Cut>off Segment:
Vl
≤V
t
and v
o
= V
DD
•Saturation Segment:
•Triode Segment:
2
)(
2
1
tloxnDDDo
Vv
L
W
CRVv−−=

)(
tlQoxnDv
VV
L
W
CRA−−=





−−−=
2
2
1
)(
ootloxnDDDo
vvVv
L
W
CRVv